US008503207B2
(12) Umted States Patent
Tallam et a].
(54)
(10) Patent N0.:
(45) Date of Patent:
Aug. 6, 2013
DISCONTINUOUS PULSE WIDTH DRIVE
7,164,254 B2
1/2007 Kerkman et a1.
MODULATION METHOD AND APPARATUS
7,187,155 B2 *
3/2007 Matsuo et a1. ......... .. 318/40004
7,190,599 B2*
3/2007
_
Virolainen et a1.
7,738,267 B1 *
6/2010 Wu,
Tallam et a1.
.......................
................. .. 363/35
SYSTEMS
7,759,897 B2 *
7,881,081 B1 *
7/2010
2/2011
IIWBIIIOFSI RangaraJall M- Tallam, GermanIOWn,
Tallam et a1. ..
318/700
363/41
2004/0195995 A1 * 10/2004 Quirion et a1. .
318/811
WI (US); Russel J. Kerkman,
2010/0165674 A1 *
Milwaukee, WI (US); David Leggate,
2010/0172162 A1
New Berlin, WI (Us)
2011/0299308 A1 *
(73)
Assignee: Rockwell Automation Technologies,
Inc” May?eld Heights, OH (Us)
(*)
Notice:
Piippo .......... ..
7/2010 Dai et a1. ...................... .. 363/37
7/2010 Tallam et al.
12/2011 Cheng et a1. .................. .. 363/37
2012/0075892 A1 *
3/2012
2012/0140532 A1 *
2012/0201056 A1 *
6/2012 Tallam et a1. ..
363/37
8/2012 Wei et a1. ...................... .. 363/37
Subject to any disclaimer, the term of this
Tallam et a1. ..
U S C 154(1)) by 386 days
(21) Appl. N0.: 12/893,838
22
)
F1 d:
1e
S
61)
363/37
OTHER PUBLICATIONS
patent is extended or adjusted under 35
(
....... .. 363/98
gglgggggggggg gggeggglggm
_
(75)
US 8,503,207 B2
_
US. Appl. No. 61/143,028, ?led Jan. 7, 2009, Rangarajan Tallam.
* Cited by examiner
. 29 2010
’
Primary Examiner * Jeffrey Sterrett
(65)
Prior Publication Data
US 2012/0075892 A1
Mar 29 2012
(74) Attorney, Agent, or Firm * Fletcher Yoder, PC;
Alexander R. KusZewski; John M. Miller
(51)
Int. Cl.
H02M 7/797
(57)
(52)
(2006.01)
ABSTRACT
US‘ Cl‘
Control systems, methods and power conversion systems are
UISPC ......... .... ...... ... ......................... .. 363/98, 363/37
presented for reducing Common mode Voltages in AC motor
(58) Fleld of Classl?catlon Search
USPC ....
See app lcanon
(56)
loads driven by inverter PWM control using switching
........... ........... "113161364, 37, 98
e or Comp ete Seam lstory'
Sequences with only active Vectors Where a ?rst Vector ofeach
switching sequence differs by one phase switching state from
References Cited
a last vector of a switching sequence of an adjacent sector,
U.S. PATENT DOCUMENTS
along with enhanced deadtime compensation and re?ected
wave reduction techniques in providing pulse width modu
lated switching signals to a switching inverter.
6,819,070 B2
11/2004 Kerkman et 31.
7,102,327
7,034,501 B2
B1**
4/2006
9/2006 H0
Thunes
.............
et a1...
7,106,025 B1
9/2006 Yin et a1.
19 Claims, 7 Drawing Sheets
SECTOR 3
SECTOR 2
r
42
10
SECTOR 4
SECTOR 1
SECTOR 5
SECTOR 6
US. Patent
Aug. 6, 2013
Sheet 1 of7
US 8,503,207 B2
mm
om
US. Patent
Aug. 6, 2013
Sheet 2 of7
US 8,503,207 B2
H12.86
1m0.5m
m10.5m
1m2.0m
US. Patent
Aug. 6, 2013
Sheet 3 0f7
US 8,503,207 B2
[-46
CMR SWITCHING SEQUENCES
48
101
100
110
100
101
110
SECTOR1
100
101
100
110
100
110
010
110
100
010
SECTOR 2
110
100
110
010
110
010
011
010
110
O11
SECTOR 3
010
110
O10
O11
O10
011
001
O11
010
O01
SECTOR 4
O11
O10
O11
O01
O11
001
101
O01
011
101
SECTOR 5
001
O11
001
101
001
101
100
101
001
100
SECTOR 6
101
001
101
100
50
_52
54
56
58
60
62
64
66
68
70
FIG. 4
US. Patent
Aug. 6, 2013
max=u
Sheet 4 of7
US 8,503,207 B2
US. Patent
Aug. 6, 2013
Sheet 5 of7
US 8,503,207 B2
ACTIVE HIGH MODULATION: ¢'
114
____¢'
qb
¢.TS
IDEAL
l
WITH DEAD TIME
NO COMPENSATION
0T3
w?H DEAD W:
AND COMPENSATION
FIG. 8
l
l
l
l
l
l
,r
US. Patent
Aug. 6, 2013
Sheet 6 of7
US 8,503,207 B2
ACTIVE LOW MODULATION: IP’
‘.lI
H
0
NAW
w
m
noHC0
N
Mm
OD
EADI
DMDIE ANDLE A_|S
Wm.
MH
DSN TAI
|»-l?wq
EM
FIG. 9
Il| w:I. .
4
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US. Patent
Aug. 6, 2013
Sheet 7 of7
US 8,503,207 B2
540
BEGIN NEW PWM PERIOD TPWIVI
‘142
DERIVE SIGNALS FOR
AC PHASE OUTPUTS 0
~“144
IF AT SECTOR BOUNDARY TRANSITION,
ACCUMULATE ADJUSTMENT FOR
‘146
USE IN NEXT TPWIVI PERIOD
COMMON
DERIVE PWM
BASED ON
OUTPUTS ¢
MODE REDUCTION:
SWITCHING SIGNALS
DERIVED AC PHASE
AND SVM DIAGRAM
~“148
ADJUST FOR DEADTIME COMPENSATION
L150
ADJUST TO PREVENT
POLARITY REVERSAL AND TO
REDUCE REFLECTED WAVES
~‘152
COMPENSATE BASED ON ANY
ACCUMULATED ADJUSTMENT
FROM PREVIOUS PWM PERIOD
‘154
GENERATE PWM SWITCHING
SIGNALS BY COMPARING WITH THE
TRIANGULAR CARRIER WAVE
‘156
FIG. 10
US 8,503,207 B2
1
2
DISCONTINUOUS PULSE WIDTH DRIVE
MODULATION METHOD AND APPARATUS
FOR REDUCTION OF COMMON-MODE
VOLTAGE IN POWER CONVERSION
SYSTEMS
Without the need to synchroniZe PWM carrier frequencies.
Indeed, the techniques described herein are capable of con
ver‘ting input poWer to output poWer of a desired form, such as
BACKGROUND
In accordance With aspects of the present disclosure, a
poWer conversion system is provided. The poWer conversion
a multi-phase AC poWer, starting a motor, stopping a motor,
regulating the speed of a motor, regulating motor torque,
protecting against overloads or faults, and so forth.
The present invention relates generally to the ?eld of poWer
system includes a DC circuit con?gured to transmit DC
poWer and an inverter coupled to the DC circuit and con?g
conversion systems such as those used convert direct current
(DC) poWer to alternating current (AC) poWer. More particu
larly, the present invention relates to systems and methods for
ured to receive the DC poWer. The inverter also includes one
or more AC terminals for supplying AC poWer and an inverter
using pulse Width modulation (PWM) techniques capable of
sWitching netWork comprising a plurality of inverter
high speed sWitching of electrical energy to drive poWer
electronic devices, such as insulated gate bipolar transistors
sWitches. The poWer conversion system includes a sWitch
controller that uses a ?rst single carrier Wave to control the
(IGBTs).
inverter sWitching netWork for supplying the AC poWer.
Electric drives are used in a Wide range of applications. For
In accordance With further aspects of the disclosure, a
poWer conversion system that includes a DC bus con?gured
example, drives incorporating poWer electronic sWitching cir
cuits are used to poWer AC motors capable of converting
electrical energy for use With centrifuges, magnetic clutches,
20
to transmit a ?rst DC poWer, and a recti?er comprising a
recti?er sWitching netWork having a plurality of recti?er
sWitches. The recti?er is con?gured to receive AC input
pumps and more generally, in electric motor drive controllers
that transform and condition incoming AC poWer for supply
poWer and to deliver a second DC poWer to the DC bus. The
to motor drive circuitry. In certain motor drive circuits, PWM
is utiliZed to redirect and rectify incoming AC poWer and to
deliver variable DC or AC poWer, as Well as in DC/AC and 25
poWer conversion system also includes an inverter coupled to
the DC bus and con?gured to receive the ?rst DC poWer from
AC/AC conversion. Accordingly, PWM techniques may be
the DC bus. The inverter comprises one or more AC terminals
used to sWitch the IGBTs on and off according to different
for supplying AC poWer and an inverter sWitching netWork
having a plurality of inverter sWitches. The poWer conversion
system also includes a sWitch controller. The sWitch control
phases of the incoming AC poWer. HoWever, one drawback of
PWM drives is that they may experience high common-mode
voltages.
30
BRIEF DESCRIPTION
A system and a method for using a discontinuous tWo
phase PWM method are described herein that may enable a
reduction in common-mode voltage (CMV) of a poWer con
version system, such as an electric motor drive. The system
and method described herein may utiliZe a single carrier Wave
35
AC poWer.
In accordance With still other aspects of the disclosure, a
non-transitory computer-readable medium is provided com
prising code adapted to calculate a pulse Width modulation
period TPWM, to receive a signal representative of one or more
(e. g., sinusoidal triangle Wave) in combination With tech
niques such as space vector modulation to selectively drive
(e. g., turn on and off) the sWitches of a motor drive, such as in
an active front end (AFE) to realiZe improved reductions in
ler uses a ?rst single triangle carrier Wave to control the
recti?er sWitching netWork for supplying the second DC
poWer to the DC bus, and a second single triangle carrier Wave
to control the inverter sWitching netWork for supplying the
AC output phases of an inverter, to calculate a sector position
40
of a reference vector in a space vector diagram, the space
vector diagram having six sectors, to derive a pulse Width
modulation (PWM) sWitching sequence based on the sector
CMV. Carrier Wave PWM refers to the use of a carrier Wave,
position of the reference vector, to derive a max, a mid, or a
such as the triangle Wave, and a reference or feedback signal.
min value based on the received signal, to apply an active high
modulation to the max and min values, to apply an active loW
modulation to the mid value, and to generate the PWM
sWitching sequence by using a single carrier Wave and the
Comparator techniques may be used to compare the triangle
45
Wave With the reference signal, resulting in a PWM signal
suitable for modulating or driving an electric motor. Space
vector modulation (SVM) and space vector With PWM
(SVPWM) refers to the use of diagrams including eight pos
sible output vectors or voltages. Six vectors are active vectors
50
applied active high modulation and active loW modulation.
The generated PWM sWitching sequence comprises sWitch
ing a sWitching netWork.
While tWo vectors are Zero vectors. The vectors are divided
using in a hexagonal model having six sectors, and the model
DRAWINGS
may then be used to de?ne a sWitching sequence that uses
only the active vectors suitable for reducing CMV.
Additionally, the techniques described herein may be used
to compensate for re?ected Waves, prevent polarity reversals,
These and other features, aspects, and advantages of the
55
accompanying draWings in Which like characters represent
like parts throughout the draWings, Wherein:
and compensate for dead time. Re?ected Waves refer to the
presence of certain Waves traveling through, for example,
system cabling. Increased cabling distances may result in
Wave pattern interference. Dead time refers to the effect asso
ciated With a time betWeen the actuation of one sWitch and the
60
FIG. 2 is a schematic diagram illustrating an exemplary
IGBT sWitch for use With the techniques set forth in the
or pole of the poWer converter. Dead time may distort the
voltage delivered to the motor. Polarity reversals refer to
applied to an inverter and/or a recti?er of a motor drive,
FIG. 1 is a schematic diagram illustrating an exemplary
poWer conversion system, according to certain aspects of the
present disclosure;
actuation of another sWitch, for example, from the same “leg”
instantaneous reversal of the polarity of the voltage delivered
to the motor. Further, the techniques disclosed herein may be
present invention Will become better understood When the
folloWing detailed description is read With reference to the
present disclosure;
65
FIG. 3 is an exemplary SVM diagram having six sectors
and a rotating reference vector, according to certain aspects of
the present disclosure;
US 8,503,207 B2
3
4
FIG. 4 is a block diagram illustrating an exemplary set of
common-mode reduction switching sequences for the six
sectors in the diagram of FIG. 3;
respect to ground, and can be expressed as CMVICMVF
CMVR:(Vu0+Vv0+VW0)/3—(V,0+VS0+Vt0)/3. Fast switching
feedback signals or values and a triangle carrier wave, with
selective use of active high or active low PWM, according to
time and high DC bus voltage levels may result in CMV with
high rise-time, which leads to high common-mode currents.
High common-mode currents may result in bearing problems
and/or noise developing in the driven motor. Accordingly, in
certain aspects of the present disclosure;
certain embodiments, the inverter controller 22 may use a
FIG. 5. is a timing diagram illustrating exemplary phase
FIG. 6. is another timing diagram illustrating exemplary
single carrier wave (e.g., triangle wave) to drive an inverter
phase feedback signals or values and a triangle carrier wave,
with selective use of active high or active low PWM, accord
switching network having the switches S7, S8, S9, S10, S11,
and S12. Indeed, the switching controller 18 may use a dis
continuous PWM switching method capable of improved
ing to certain aspects of the present disclosure;
FIG. 7 is a timing diagram illustrating the mitigation of
re?ected waves and the prevention of polarity reversals,
according to certain aspects of the present disclosure;
FIG. 8 is a timing diagram illustrating active high PWM
deadtime compensation, according to certain aspects of the
CMV reduction, dead time compensation, re?ected wave
compensation, and prevention of polarity reversal.
present disclosure;
FIG. 9 is a timing diagram illustrating active low PWM
deadtime compensation, according to certain aspects of the
present disclosure; and
FIG. 10 is a ?ow chart illustrating exemplary logic to
obtain common-mode voltage reduction, according to certain
aspects of the present disclosure.
DETAILED DESCRIPTION
20
The carrier frequency used to modulate the inverter 14 may
be independent of the carrier frequency used to modulate the
recti?er 12. That is, PWM synchronization between the rec
ti?er 12 and the inverter 14 may not be required. Accordingly,
a higher carrier frequency may be used in the recti?er 12 to
optimiZe ?lter design, and a lower carrier frequency may be
used in the inverter 14 to increase rating at low output fre
quencies. The inverter 14 may produce a multi-phase AC
power, one phase of power for each pole u, v, and W. Accord
ingly, the motor 16 may be operated by redirecting AC power
25
through the poles u, v, and W. Control modalities of the switch
controller 18 may thus start or stop the motor, regulate the
speed of the motor, regulate the motor’s torque, and provide
FIG. 1 illustrates an embodiment of a three-phase power
conversion system, such as a motor drive 10. The motor drive
10 may include a recti?er circuit 12 coupled to an inverter
circuit 14, which may be used to drive a three-phase motor 16.
protection against overloads or faults.
FIG. 2 illustrates an IGBT-type switch 32. The switching
devices Sl-S6, and 87-812 may be any suitable electrically
30
In the illustrated embodiment, the recti?er circuit 12 and the
inverter circuit 14 are controlled by a switch controller 18,
having a recti?er controller 20 and an inverter controller 22.
The recti?er controller 20 controls the recti?er circuit 12
while the inverter controller controls the inverter circuit 14.
controllable switch, such as the IGBT 32. The IGBT 32 may
be controlled according to any suitable type or form of
switching signals from the switch controller 18. In the illus
trated example, the IGBT 32 includes an anti-parallel or ?y
back diode 34 connected in parallel across the switching
35
terminals 36 and 38. The IGBT 32 also includes a base or
Three phases ofAC power from the supply mains VA, VB, and
VC may be directed through the line reactors LA, LB, and LC,
control gate terminal 40 that will be connected to the switch
respectively. The line reactors LA, LB, and LC are used as
trol signal to regulate the conductive state of the switch. It is
to be understood that other electrically-controllable switch
controller 18 so as to receive a corresponding switching con
?lters to smooth converted power signals and to improve the
harmonics of the circuit. The AC power may then be con
ver‘ted into DC power by the recti?er 12. In one embodiment,
40
the recti?er 12 may provide for AC recti?cation and braking
FIG. 3 is an exemplary SVM diagram 42. The SVM dia
gram 42 includes six stationary active space vectors 100, 110,
regeneration. The recti?er circuit 12 may include a recti?er
switching network having solid state switches S1, S2, S3, S4,
S5, and S6. During recti?cation, the switches 81-86 of the
010, 011, 001, and 101 positioned counterclockwise around
45
circuit may be switched so as to convert the incoming AC
power into DC power. Common-mode voltage CMV gener
ated by the recti?er circuit 12 may be de?ned as the potential
of the center node 26 (O) of the DC bus 24 with respect to
ground, and can be expressed as CMVR:(V,0+VS0+Vt0)/3. In
50
one embodiment, the recti?er controller 22 may use a single
carrier wave (e.g., triangle wave) to drive the switches 81-86
by using a discontinuous PWM switching method capable of
improved CMV reduction, dead time compensation, re?ected
wave compensation, and the prevention of polarity reversal.
55
The DC power from the recti?er 12 is transferred to a
common DC bus 24 having a center node 26. The DC power
the periphery of the diagram 42 as well as two stationary Zero
vectors 000 and 11 1 located at the diagram origin. The active
and Zero vectors represent unique switching states for the
switches S 1 -S6 of the recti?er 12 and/or the switches 87-8 1 2 of
the inverter 14. That is, when applied to the inverter 14, the
?rst digit of the vector may correspond to the u phase, the
second digit of the vector may correspond to the v phase, and
the third digit of the inverter may correspond to the w phase.
For example, the vector 110, when applied to the inverter 14,
may denote that the upper switch of u phase is switched on,
the upper switch of v phase is switched on, and the lower
switch of w phase is switched on. Likewise, the space vector
digits represent unique switching states for the recti?er 12.
That is, when applied to the recti?er 12, the ?rst digit of the
may then be converted into AC power by the inverter 14. A set
of bus capacitors 28 and 30 may be connected between the
two DC bus lines and are used to create a low impedance
ing devices may be used, such as thyristors (e. g., gate tum-off
thyristor, integrated gate commutated thyristor).
60
vector may correspond to r phase, the second digit may cor
respond to s phase, and the third digit may correspond to t
source, which also helps ?lter DC ripples. The DC bus may
phase.
then transfer power to the inverter 14 for conversion to AC
power. CMV may be de?ned as a potential of the neutral point
The SVM diagram 42 also de?nes six triangular sectors
(labeled sector 1 through sector 6 in FIG. 3) positioned
around the origin, each of which is de?ned by a 60° angle
having two edges sharing the common origin endpoint and
bifurcating the triangular segments corresponding to the
of the load (e.g., motor 16) with respect to the center node 26
of the DC bus 24, and can be expressed as CMVII(VMO+VVO+
VW0)/3. The total CMV generated by the motor drive 10 may
be de?ned as the potential of the neutral point of the load with
65
active space vectors 001-110. That is, each edge of a sector
US 8,503,207 B2
5
6
may be at the approximate middle of a triangle de?ned by tWo
at beginning With a clockWise rotation of the active vector
adjacent active vectors in the depicted hexagon. For example,
adjacent to the selected sector, moving through the active
sector 1 is de?ned by a ?rst edge that bifurcates the triangle
bounded by the active vectors 100 and 1 10, and a second edge
that bifurcates the triangle bounded by the active vectors 100
and 101. To operate the recti?er 12 and/or the inverter 14, a
controller, such as the sWitch controller 18 provides sWitching
control signals according to a selected sWitching sequence,
such as the sWitching sequences depicted in FIG. 4 beloW. The
selected sWitching sequence or pattern may correspond to the
diagram sector in Which a reference vector 44 is currently
located. A desired motor position and torque may be repre
sented in terms of the magnitude and angle of the reference
vector in the center of the selected sector, and ending in
adjacent vector opposite to the starting vector. In this second
pattern, the rotation is then reversed to a counterclockWise
rotation moving back through the active vector in the center of
the selected sector, and ending in the starting adjacent vector.
For example, the second pattern (e.g., 110-100-101-100-110)
for sector 1 may be arrived at by starting With adjacent vector
110, moving in clockWise direction to vector 100, ending in
vector 101, returning in a counterclockWise direction to vec
tor 100, and stopping at vector 110. LikeWise, the second
pattern (e.g., 010-110-100-110-010) for sector 2 may be
arrived at by starting With adjacent vector 010, moving in
clockWise direction to vector 110, ending in vector 100,
voltage vector 44. Accordingly, the selected sWitching
sequence may drive the motor in accordance to the properties
of the reference vector 44 (e. g., magnitude and angle).
In certain CMV reduction embodiments, each sWitching
sequence, such as the sWitching sequences depicted in FIG. 4,
returning in a counterclockWise direction to vector 110, and
stopping at vector 010.
As can be observed in the tWo patterns of sector 1, the ?rst
digit of the tWo patterns has a value of one. Accordingly, the
uses only active vectors. That is, the active space vectors 100,
110, 010, 011, 001, and 101 are used, and stationary space
vectors 000 and 1 1 1 are not used. Additionally, the sWitching
sequences may latch one of the phases (e. g., u, v, or W for the
inverter 14 and/or r, s, ort for the recti?er 12) as alWays on or
alWays off. That is, one of the phase u, v, or W for the inverter
14 and/or r, s, or t for the recti?er 12 may alWays be either
sWitched on or off. This discontinuous tWo-phase PWM tech
nique results in an improved reduction of CMV. As mentioned
above in relation to FIG. 1, CMV may be de?ned as CMV:
20
25
state. The same is true for the sequences corresponding to
sectors 2-6. Thus, the exemplary sWitching sequences
depicted in FIG. 4 do not cause concurrent sWitching of tWo
(Vu0+Vv0+VW0)/3—(V,O+VSO+VtO)/3. Accordingly, CMVR
and CMV, may theoretically include peak values approxi
mately equal to :VDC/2, and CMV may include peak values
approximately equal to :VDC, Where VDC is the peak voltage
of the DC bus. The sWitching techniques disclosed herein
may reduce the peak CMVR and the peak CMV, to approxi
mately :VDC/ 6, and the peak CMV to approximately :VDC/
30
phase (or line states) states in the recti?er 12 and/or the
inverter 14, even at sector transitions (i.e., When moving from
35
one sector to another sector), thereby further reducing com
mon mode voltages at the motor 16.
FIG. 4 is a block diagram 46 illustrating an exemplary set
of CMR sWitching sequences for the six sectors in the SVM
diagram 42 of FIG. 3. As shoWn in FIG. 4, the sectors 1-6
3. The minimum modulation index for the sWitching tech
nique disclosed herein is 313/ (3/3) 0.61. The recti?er 12 is
normally operated at a modulation index higher than the
include sWitching sequences 48,50, 52, 54, 56, 58, 60, 62, 64,
66, 68, and 70. SWitching sequences 48, 52, 56, 60, 64, and 68
may have been arrived at beginning With a counterclockWise
rotation, While sWitching sequences 50, 54, 58, 62, 66, and 70
above minimum value. To operate the inverter 14 at a modu
lation index loWer than the above minimum value, any of the
Well knoWn prior art modulation techniques can be used.
40
sector, and ending in adjacent vector opposite to the starting
sector 1 uses the active vectors 101, 100 and 110 that are
45
are not used. Moreover, each of the tWo sequences for each
sector 1-6, such as the sequences 48 and 50 begin and end
With the same active vector (e.g., 101 or 110). This active
50
55
returning in a clockWise direction to vector 100, and then
?nishing With the starting adjacent vector 101. LikeWise, a
?rst pattern (e.g., 100-110-010-110-100) for sector 2 may be
arrived at by starting With adjacent vector 100, moving in a
counterclockWise direction to vector 110, then ending in the
adjacent vector 010, then returning in a clockWise direction to
vector 110, and then ?nishing With the starting adjacent vec
tor 100.
A second pattern for each sector 1-6 that may be used With
the discontinuous tWo-phase PWM technique may be arrived
adjacent to or in the sector 1. As a result of using only the
active vectors, the sequences reduce the CMV because the
middle vectors 000 and 111 corresponding to peak voltages
vector. In this ?rst pattern, the rotation is then reversed to a
clockWise rotation moving back through the active vector in
the center of the selected sector, and ending in the starting
adjacent vector. For example, a ?rst pattern (e.g., 101-100
110-100-101) for sector 1 may be arrived at by starting With
adjacent vector 101, moving in a counterclockWise direction
to vector 100, then ending in the adjacent vector 110, then
may have been arrived at beginning With a clockWise rotation.
Further, each of the sWitching sequences 48-70 uses only
active vectors. For instance, the sWitching sequence 48 for
To implement this discontinuous tWo-phase PWM tech
nique, the sWitching patterns may be arrived at in each of the
six sectors 1-6 by a clockWise rotation of the vectors adjacent
to or in the selected sector, folloWed by a counterclockWise
rotation. TWo such patterns may be arrived at for each sector,
one pattern is arrived at by beginning With a counterclockWise
rotation of the active vector adjacent to the selected sector,
moving through the active vector in the center of the selected
u phase is alWays on When using this sector for sWitching.
LikeWise, the tWo patterns of sector 2 shoW that the third digit
alWays has a value of Zero.Accordingly, the phase W is alWays
off When using this sector for sWitching. Further, the sequen
tial vectors selected by this discontinuous tWo-phase PWM
technique differ from one another by only one sWitching
60
vector differs by one phase sWitching state from the last
vector of the sWitching sequences associated With its adjacent
sectors (e.g., sectors 2 and 6). For example, the last vector 101
of sector 1 sequence 48 differs by one sWitching state from the
?rst vector 100 in the sequence 52 of neighbor sector 2.
LikeWise, the ?rst vector 101 in sequence 48 for sector 1
differs by only one sWitching state from the last vector 001 in
the sequence 68 of the other adjacent sector 6.
Accordingly, more e?icient and faster sWitching may be
achieved by sWitching from sequence to sequence. Indeed,
When moving from a sequence (e.g., sequence 48 to another
sequence (e.g., sequence 52), less sWitching energy may be
used. In addition, the sequences 48-70 each begin in a coun
terclockWise direction, and ?nish in a clockWise direction, or
vice versa. Thus, the exemplary CMR sWitching sequences
65
48-70 used by the sWitch controller 18 do not cause concur
rent sWitching of tWo phase states in the inverter 14 or line
states in the recti?er 12, even at sector transitions, thereby
US 8,503,207 B2
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8
further reducing switching losses and polarity voltage rever
interval betWeen time 82 and time 84, as illustrated. The mid
modulating signal or value Wave (e.g., 1—W) is used in con
sals at the motor 120. In operation, the avoidance of the Zero
vectors may be effective in reducing common mode voltages
at the motor 16 load. Accordingly, the switching sequences
junction With AL modulation. Accordingly, When the mid
level is greater than the triangle Wave 80 (e.g., betWeen time
48-70 are referred to as CMR sequences, and PWM using
these is referred to as discontinuous CMRPWM. It is to be
86 and time 88), the value for GW Will be a Zero. When the mid
level is not greater than the triangle Wave (e.g., before time 86
noted that any one of the sWitching patterns of FIG. 4 may be
and after time 88), the value for GW Will be unity. Indeed, the
generated using the method described above With respect to
and 22, may be capable of using sWitching schemes corre
sponding to the SVM diagram 42 and the sector sWitching
use of the technique described herein alloWs for a generation
of all of the sWitching patterns shoWn in FIG. 4.
FIG. 6 is a timing diagram 90 that further illustrates the use
of a single triangle carrier Wave 92, and assignments to max
methodology to modulate the recti?er 12 and/ or the inverter
14. Further, the method described in relation to FIG. 3 may
include non-transitory machine readable code or computer
94, mid 96, and min 98, to generate a sWitching pattern. More
speci?cally, FIG. 6 illustrates the generation of the sWitching
pattern 54 of sector 2. As mentioned above, AH modulation is
instructions that may be used by a computing device (e.g.,
controllers 18, 20, and 22) to transform computed or sensor
inputs, such as phase value inputs, into outputs, such as
used for the max 94 and the min 98 Waves. Accordingly, GM
Will have values set to unity When the max 94 values are
greater than the triangle Wave 92 (e.g., betWeen time 100 and
sWitching outputs suitable for driving sWitches (e.g., SI-SIZ).
time 102). The GM values before time 100 and after time 102
FIG. 3. Further, a controller, such as the controllers 18, 20,
FIG. 5 illustrates an embodiment of a timing diagram 72
that may be used to generate the sequences 48-70 of FIG. 4,
Will then be set to Zero. The min 98 values are latched at Zero,
20
shoWing exemplary phase feedback signals or values labeled
max 74, mid 76, and min 78, along With a single triangle
carrier Wave 80 (e.g., sine triangle Wave). Indeed, a single
carrier Wave 80 may be used in conjunction With a derivation
of max 74, mid 76 and min 78 to derive any one of the
25
sWitching patterns shoWn in FIG. 4. In the depicted diagram
72, the max 74, mid 76, and min 78 curves represent the three
output phase values (I) (e. g., u, v, and W for the inverter 14 or
r, s, and t for the recti?er 12) at a given point in time When the
feedback signals or values are obtained by the sWitch control
ler 18. The three modulating gate signals are used as shoWn in
generation of the sWitching pattern 54 (e.g., counterclock
30
sWitching function used to generate a sWitching sequence, for
example, sequence 48 of sector 1 (e.g., 101, 100, 110, 100,
35
techniques exclusively employ active high PWM (e.g., gating
signal high state When the modulating signal is greater than
the triangle Wave such that the upper phase sWitch is on and
the loWer phase sWitch is off), the illustrated CMRPWM
technique employed in the controller 18 selectively employs
40
(e. g., u, v, and W for the inverter 14 or r, s, and t for the recti?er
12), as depicted. AH modulation is used With the max 74 and
the min 78 modulating feedback signals or value Waves (e. g.,
FIG. 7 depicts an embodiment of the timing diagram 72
With the addition of a line-to-line output voltage curve VVW.
That is, the voltage curve VvW may result from the modulation
45
of the recti?er 14 by using the illustrated sWitching pattern 48
of sector 1. As the modulating Waveform v approaches W, for
instance, thenVvW approaches Zero, Where the resulting pulse
Width modulation can lead to an undesirable polarity reversal
50
u and v signals in the depicted diagram 72), and AL modula
tion is used in the mid 76 feedback signal or value Wave (e. g.,
W signal in the depicted diagram). Consequently, the gener
ated function GM will result in upper phase sWitch S7 being
method described above With respect to FIGS. 5 and 6. Fur
ther, a controller, such as the controllers 18, 20, and 22, may
be capable of using the single triangle carrier Wave 92 and the
observed phase values (I) to sWitch the recti?er 12 and/ or the
inverter 14. Further, the method described in relation to FIGS.
5 and 6 may include non-transitory machine readable code or
computer instructions that may be used by a computing
device (e.g., controllers 18, 20 and 22) to transform sensor
inputs, such as phase value inputs, into outputs, such as
sWitching outputs suitable for driving sWitches (e.g., S l-S12).
both active high (AH) and active loW (AL) modulation. InAL
modulation, the upper phase sWitch (e.g., sWitch S7, S8, S9, or
sWitch S1, S2, S3) is turned off and the loWer phase sWitch
(e.g., sWitch S10, S11, S12, or sWitch S4, S5, S6) is turned on
When the modulating feedback signal or value Wave is greater
than the triangle carrier Wave 80.
In one embodiment, the max 74, mid 76 and min 78 sets of
signals are used based on the received output phase values (I)
Wise pattern) of sector 2. It is to be noted that any one of the
sWitching patterns of FIG. 4 may be generated using the
the timing diagram 72, in Which G represents the phase
and 101). It is to be noted that While conventional PWM
and thus min 98 Will never be greater than the triangle Wave
92. Consequently, GW Will be set to Zero during the illustrated
time. The mid 96 signal or value Wave (e. g., 1—v) Will undergo
AL modulation. During AL modulation, the mid 96 level Will
be compared to the triangle Wave 92, and if the mid 96 level is
greater than the triangle Wave 92 (e.g., betWeen time 104 and
time 106), the value for Gv Will be set to Zero. As illustrated,
the use of a single triangle carrier Wave 92, and assignments
of the observed output phase values (I), may result in the
(i.e., direct transition from positive to negative or vice versa).
In normal operation, absent re?ected Wave compensation, all
of the phase voltages Will cross one another periodically, and
Will be close to one another just before and just after they
cross. Ab sent re?ected Wave compensation, moreover, When
ever this occurs, a direct transition in the line-to-line voltage
55
turned on and the loWer phase sWitch S 10 being turned off
When the u signal is greater than the triangle Wave 80. In the
output from positive to negative Will happen, resulting in
creation of a re?ected Wave in the cable betWeen the poWer
conversion system 10 and the motor 16, With the motor 16
depicted timing interval, the u signal is alWays greater then
experiencing potentially high voltages. HoWever, polarity
the triangle Wave 80. Accordingly, GM is set to unity such that
the upper phase sWitch S7 is turned on and the loWer phase
sWitch S10 is turned off during the depicted time interval of
the diagram 72.
The min modulating signal or value Wave 78 (e.g., v) is also
used in conjunction With AH modulation. Accordingly, When
the min level 78 is greater than the triangle Wave 80 (e.g.,
betWeen time 82 and time 84), the value for Gv Will be a unity.
reversal may be eliminated and re?ected Waves may also be
reduced or eliminated by using the method as described
beloW.
LikeWise, the value for Gv Will be a Zero outside of the time
60
A limit on the timing in the resulting line-to-line voltage
curve VvW (and curves VW and VWH) may be imposed in order
to eliminate polarity reversal and to reduce or eliminate
65
re?ected Waves. That is, the duty cycle may be adjusted so
that certain conditions are met. When in sectors 1, 3, and 5 of
the SVM diagram, a value of min-mid should be greater than
US 8,503,207 B2
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10
HoWever, through change in the polarity of this compen
(2*TdWeH/TPWM), Where Tdwe” is a predetermined dwell time
and TPWMis the PWM period. Also, When in sectors 1, 3, and
5 of the SVM diagram, min should be greater than T dWeH/
TPWM. When in sectors 2, 4, and 6 of the SVM diagram,
sation equation (2) for the active loW modulation case, the
curve 138 shoWing the resulting sWitching pulse for the case
With the deadtime and the compensation, the pulse Width is
max-mid should be greater than (2*TdWeH/TPWM). Likewise,
maintained the same as the ideal case, While the entire pulse
When in sectors 2, 4, and 6 of the SVM diagram, max should
is shifted in time. In this manner, the adjusted feedback sig
nals or values CI)‘ are generated by the deadtime compensation
be less than (l—TdWeH/TPWM). In this implementation, the
timing in the voltage curves VVW, VW, and VWM are held at all
method described herein prior to using the PWM sWitching
phase signals or values (I). This prevents direct transition from
techniques described above. By this technique, the optional
sector boundary deadtime compensation is selectively per
positive to negative in the sWitching patterns for each phase,
and advantageously mitigates re?ected Waves in conjunction
more detail beloW With respect to FIG. 10 further describes
times through selective adjustment of one or more of the
formed if a sector transition is occurring. A logic described in
With the sWitching sequences of FIG. 4. Accordingly,
unWanted high voltage sWitching pulses may be reduced or
the use of the techniques presented herein.
eliminated.
The re?ected Wave reduction and polarity reversal preven
tion method described above may accumulate re?ected Wave
adjustment amounts for each phase signal or value (I) . Accord
ingly, the method may adjust one or more feedback signals or
values (I) higher or loWer in a subsequent PWM period TPWM
to compensate for the re?ected Wave reduction adjustments in
a previous PWM period. In other Words, any accumulated
volt-second differences due to imposing the conditions
described above With respect to FIG. 7 may be compensated
in the next PWM period. To avoid distortion, the compensat
ing adjustment accounts for an accumulated volt- second error
techniques described herein, including the use of the SVM
FIG. 10 is an embodiment ofa logic 140 that may use the
diagram, the triangle Wave sWitching techniques, polarity
reversal prevention and re?ective Wave reduction techniques,
and deadtime compensation techniques described With
20
that may be used by a computing device (e. g., controllers 18,
20 and 2) to transform sensor inputs, such as phase value
inputs, into outputs, such as sWitching outputs suitable for
driving sWitches (e.g., Sl-Slz). A neW PWM period TPWM
25
frequency (i.e., TPWMII/ frequency). Signals for the AC
phase outputs (I) (e.g., u, v, and W) may be derived (block
30
uncompensated signal or value q) for AH PWM control, thus
providing for deadtime compensation. As a result, a curve 1 12
representing the adjusted signal/value CI)‘ crosses a carrier
triangle at a higher value than does an uncompensated curve
116, and thus the active high modulation causes the creation
of a sWitching pulse in curve 118 of FIG. 8 With the dead time
35
and compensation time delayed relative to an ideal case curve
120, but having the same pulse Width (ID-Ts. This represents an
improvement over the uncompensated case shoWn in curve
may begin at block 142 The TPWMperiod may be any suitable
period, such as a period of 500 usec With a resultant 2 kHZ
(e. g., a difference in sWitch on-time), and compensates by that
amount in the next PWM period by again adjusting the modu
lating signals the other Way.
FIG. 8 illustrates a timing diagram 110 that may be used to
selectively raise a feedback signal or value CI)‘ above the
respect to FIGS. 1-9 above. The logic 140 may include non
transitory machine readable code or computer instructions
40
122 in FIG. 8, Which has a different (shorter) pulse Width,
144), by one of several control methods Well knoWn in the art.
In certain embodiments, the derivation of signals based on the
AC phase outputs (I) of the inverter 14 may include determin
ing the location of the reference vector 44 in the SVM dia
gram 42. For instance, the desired motor position and torque
may be represented in terms of the magnitude and angle of the
reference vector 44 for inverter 14. A controller, such as the
controller 22, may generate signals or values Which represent
the AC phase outputs (I) (e.g., u, v, and W) of the inverter 14
based on the reference vector 44. In certain embodiments, the
derivation of signals may be based on the AC phase outputs (I)
(e.g., r, s, and t) of the recti?er 12, and may also include
determining the location of the reference vector 44 in the
thereby causing output voltage distortion. In the illustrated
SVM diagram 42. For instance, the desired voltage of the
embodiment, deadtime compensation may occur by selec
tively adjusting the feedback signals or values (I) according to
common DC bus 24 may be represented in terms of the
reference vector 44 for recti?er 12. Similarly, a controller,
such as the controller 20, may generate signals or values
the folloWing equation (1) for active high pulse Width modu
45
Which represent theAC phase outputs (I) (e.g., r, s, and t) of the
lation:
recti?er 12 based on the reference vector 44. Accordingly, the
¢v:¢+Sign(i¢)*(Td/TPWZV1)
(1)
Where id, is a corresponding phase current, Td is a predeter
mined deadtime value (e.g., 2 usec in one example), and
method described herein is capable of controlling the recti?er
12 and/or the inverter 14 by using a reference vector 44 and a
50
SVM diagram 42.
55
If the derived signals indicate that the reference vector 44 is
at a sector boundary transition, then the logic 140 may accu
mulate an adjustment value for use in the next TPWM period
(block 146) as described in more detail above With respect to
FIG. 7. Common-mode reduction PWM may be applied
TPWMis a pulse Width modulation period (e.g., 500 usec). For
active loW modulation, the compensation is described in more
detail beloW With respect to FIG. 9.
FIG. 9 illustrates a timing diagram 126 that may be used to
compensate for deadtime during AL PWM modulation. The
diagram 126 of FIG. 9 shoWs the carrier Waveform 128, the
uncompensated phase signal or value 130 (CID) and the com
pensated phase signal or value 132 (CIJ'). As seen in this active
loW modulation case, Without compensation, the deadtime
included in the resulting pulse curve 134 results in a pulse
Width Which is longer than that of the ideal curve 136. In the
illustrated embodiment, deadtime compensation may occur
(block 148) by deriving a desired PWM sWitching pattern
based on the derived AC phase outputs (I), the SVM diagram
42, and the sector of the SVM diagram 42 having the refer
ence vector 44. Such a sWitching pattern may enable a reduc
60
ment (block 150) may be used as described above With
respect to FIGS. 8-9. The deadtime compensation adjustment
may reduce or eliminate, for example, output voltage distor
by selectively adjusting the feedback signals or values (I)
according to the folloWing equation (2) for active loW pulse
Width modulation:
tion in common-mode voltage.
In certain embodiments, a deadtime compensation adjust
65
tions, resulting in a smoother and more e?icient motor drive.
An adjustment to prevent polarity reversals and to reduce or
eliminate re?ected Waves may be used (block 152), as
US 8,503,207 B2
11
12
7. The system of claim 6, wherein the switch controller
described in more detail with respect to FIG. 7. Any accumu
lated adjustments, for example, adjustments due to sector
uses a second single carrier wave to control the recti?er
boundary transitions, may be compensated for (block 154).
switching network for supplying the DC power.
8. The system of claim 6, wherein the switch controller
applies control signals to the recti?er switching network in
accordance with the selected switching sequence correspond
The logic 140 may then generate PWM switching signals, for
example, by assigning the u, V, and W phases to a max, mid,
and min set of values, as described above with respect to
FIGS. 5 and 6. AnAH modulation may then be applied to the
ing to the desired sector of a switching scheme in which the
reference vector is currently located.
9. The system of claim 8, wherein the switch controller
comprises a re?ected wave reduction component operative at
each pulse width modulation period TPWM to determine a
max and min values, and an AL modulation may be applied to
the mid value. The max, mid, and min values may then be
compared to the triangular carrier wave, for example, by
using a single compare register per phase u, V, W. The com
max, a mid, and a min value based on the one or more AC
parison may then generate a PWM switching pattern suitable
for controlling the recti?er and/or inverter switches. Further,
terminals and to adjust a duty cycle for sectors one, three, and
?ve based on the relationships:
the switching pattern may enable a reduction of common
mode voltage by avoiding the use of vectors 000 and l l l . The
logic 140 may then iterate or loop to begin a new PWM period
(min—mid)>2* (Tdwell/ TPWM); and
TPWM (block 142).
While only certain features of the invention have been
illustrated and described herein, many modi?cations and
changes will occur to those skilled in the art. It is, therefore, to
and to adjust a duty cycle for sectors two, four, and six
20
based on the relationships:
(max—mid)>2* (Tdwell/ TPWM); and
be understood that the appended claims are intended to cover
all such modi?cations and changes as fall within the true spirit
of the invention.
where Tdwell is a predetermined dwell time.
10. The system of claim 5, wherein controller uses a ?rst
frequency to control the inverter switching network and a
The invention claimed is:
1. A power conversion system comprising:
a DC circuit con?gured to transmit DC power;
an inverter coupled to the DC circuit and con?gured to
receive the DC power, the inverter comprising one or
more AC terminals for supplying AC power and an
second frequency to control the recti?er switching network.
11. The system of claim 10, wherein the ?rst and the second
30
12. A power conversion system comprising:
a recti?er comprising a recti?er switching network having
inverter switching network comprising a plurality of
inverter switches for converting the DC power to the AC
power; and
a switch controller, wherein the switch controller uses a 35
?rst single carrier wave to control the inverter switching
network for supplying the AC power, and wherein the
switch controller applies control signals to the inverter
switching network in accordance with a selected switch
ing sequence corresponding to a desired sector of a
switching scheme in which a reference vector is cur
frequencies are not equal to each other.
a plurality of recti?er switches con?gured to receive AC
input power and to convert the AC input power to DC
power applied to a DC bus;
an inverter con?gured to receive the DC power from the
DC bus, the inverter comprising an inverter switching
network having a plurality of inverter switches con?g
40
ured to receive the DC power and to convert the DC
power to output AC power; and
a switch controller con?gured to control the recti?er
rently located, the switching scheme corresponding to
switching network for conversion of the AC input power
the reference vector in a space vector modulation
to the DC power based upon a ?rst single triangle carrier
wave, and to control the inverter switching network for
conversion of the DC power to the output AC power
based upon a second single triangle carrier wave,
scheme having six stationary active space vectors
around the periphery and two stationary Zero vectors at
45
an origin, the scheme having six triangular sectors posi
tioned around the origin, each sector de?ned by a 60°
wherein the switch controller applies control signals to
angle having two edges sharing a common origin end
the inverter switching network or to the recti?er switch
point and bifurcating triangular segments corresponding
to the six active space vectors.
ing network in accordance with a selected switching
50
2. The system of claim 1, wherein the switch controller
sequence corresponding to a desired sector of a switch
ing scheme in which a ?rst reference vector is currently
uses an active high modulation and an active low modulation
located, the switching scheme corresponding to the ?rst
to control the inverter switching network for supplying the
reference vector in a space vector modulation scheme
having six stationary active space vectors around the
AC power.
3. The system of claim 2, wherein the active high modula
tion is applied to a max and a min wave, and the active low
modulation is applied to a mid wave.
4. The system of claim 3, wherein the one or more AC
terminals comprise a u, v, and w terminals, and wherein the
max, mid and min waves are derived from the u, v, and w
55
the scheme having six triangular sectors positioned
around the origin, each sector de?ned by a 600 angle
having two edges sharing a common origin endpoint and
bifurcating triangular segments corresponding to the six
60
carrier wave and the second single triangle carrier wave have
different carrier wave frequencies.
14. The system of claim 12, wherein the switch controller
one or more AC mains and to the DC circuit, the recti?er
recti?er switching network comprising a plurality of recti?er
switches.
active space vectors.
13. The system of claim 12, wherein the ?rst single triangle
terminals.
5. The system of claim 1, comprising a recti?er coupled to
con?gured to provide the DC power to the DC circuit.
6. The system of claim 5, wherein the recti?er comprises a
periphery and two stationary Zero vectors at an origin,
65
uses an active high modulation and an active low modulation
to control the recti?er switching network, the inverter switch
ing network, or both.
US 8,503,207 B2
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13
15. The system of claim 12, wherein the switch controller
calculate a sector position of a reference vector in accor
applies control signals to the recti?er switching network in
accordance with the selected switching sequence correspond
dance with a space vector switching scheme having six
sectors, wherein the space vector switching scheme
comprises six stationary active space vectors around the
periphery and two stationary Zero vectors at an origin,
the six sectors positioned around the origin, each sector
de?ned by a 60° angle having two edges sharing a com
ing to the desired sector of a switching scheme in which a
second reference vector is currently located.
16. The system of claim 15, wherein the switch controller
comprises a re?ected wave reduction component operative at
each pulse width modulation period TPWM to determine a
mon origin endpoint and bifurcating triangular segments
corresponding to the six active space vectors;
derive a PWM switching sequence based on the position of
the reference vector;
max, a mid, and a min value based on the one or more AC
terminals and to adjust a duty cycle for sectors one, three, and
?ve based on the relationships:
derive a max, a mid, or a min value based on the received
(min—mid)>2* (Tdwell/TPWM); and
signal;
apply an active high modulation to the max and min values;
apply an active low modulation to the mid value;
and to adjust a duty cycle for sectors two, four, and six
generate the PWM switching sequence by using a single
based on the relationships:
carrier wave and the applied active high modulation and
active low modulation; and
apply the PWM switching sequence to a switching net
(max—mid)>2*(Tdwell/TPWM); and
work.
where Tdwell is a predetermined dwell time.
17. A non-transitory computer-readable medium compris
ing code adapted to:
calculate a PWM period TPWM;
receive a signal representative of one or more AC output
phases of an inverter, of a recti?er, or a combination
thereof;
25
18. The non-transitory computer-readable medium of
claim 17, wherein the switching network comprises an
inverter switching network.
19. The non-transitory computer-readable medium of
claim 17, wherein switching network comprises a recti?er
switching network.