materials
Article
The Development of High-Density Vertical Silicon
Nanowires and Their Application in a
Heterojunction Diode
Wen-Chung Chang 1 , Sheng-Chien Su 1 and Chia-Ching Wu 2, *
1
2
*
Department of Electronic Engineering, Southern Taiwan University of Science and Technology, Tainan 71005,
Taiwan; changwc@stust.edu.tw (W.-C.C.); ct6288@gmail.com (S.-C.S.)
Department of Electronic Engineering, Kao Yuan University, Kaohsiung 82151, Taiwan
Correspondence: t10068@cc.kyu.edu.tw; Tel.: +88-7-60-77002
Academic Editor: Mady Elbahri
Received: 24 March 2016; Accepted: 24 June 2016; Published: 30 June 2016
Abstract: Vertically aligned p-type silicon nanowire (SiNW) arrays were fabricated through
metal-assisted chemical etching (MACE) of Si wafers. An indium tin oxide/indium zinc oxide/silicon
nanowire (ITO/IZO/SiNW) heterojunction diode was formed by depositing ITO and IZO thin films
on the vertically aligned SiNW arrays. The structural and electrical properties of the resulting
ITO/IZO/SiNW heterojunction diode were characterized by field emission scanning electron
microscopy (FE-SEM), X-ray diffraction (XRD), and current´voltage (I´V) measurements. Nonlinear
and rectifying I´V properties confirmed that a heterojunction diode was successfully formed in the
ITO/IZO/SiNW structure. The diode had a well-defined rectifying behavior, with a rectification ratio
of 550.7 at 3 V and a turn-on voltage of 2.53 V under dark conditions.
Keywords: silicon nanowire; indium tin oxide; indium zinc oxide; heterojunction diode
1. Introduction
Nanostructured solar cells (containing nanospheres [1], nanowires [2–4], or nanopillars [5])
have recently been proposed as promising candidates for solar energy harvesting. Silicon (Si) is
still the leading material in today’s photovoltaic industry. As the process has matured, silicon
nanowire (SiNW) or silicon nanorod (SiNR) structures have become the focus of nanowire solar
cells. Si is by far the most versatile and widely used semiconductor—despite the development of many
compound semiconductors—due to its distinct advantages, such as abundance, stability, and ease
of processing [6–8]. Uniform, vertically aligned SiNWs are promising building blocks for a range of
vertical devices, including surround-gate field-effect transistors [9], solar cells [10], and thermoelectric
modules [11]. Nanostructured solar cells made using low-cost materials are expected to be used in the
industry. Polycrystalline nanowire-array solar cells are expected to enhance solar cell efficiency despite
their very low material cost, due to their enlarged p–n junction area and suppressed light reflection.
Vertically aligned SiNWs can be fabricated with a relatively high degree of control and uniformity
through both top-down etching and bottom-up epitaxial growth methods [12]. However, SiNW solar
cells have major drawbacks: their carrier collection efficiency is low, and fabricated nanowire cannot
be easily coated with a transparent electrode.
Zinc oxide (ZnO) is an n-type semiconductor with a large binding energy of 60 meV and a wide
bandgap of 3.3 eV in the UV range. ZnO has numerous applications in optoelectronic devices, including
ultraviolet (UV) visible photodetectors [13,14], solar cells [15], light-emitting diodes (LEDs) [16], and
flat-panel displays [17]. Fabricating p-type ZnO is difficult, due to the low solubility of the dopants.
Most ZnO-based optoelectronic devices rely on heterojunctions between n-type ZnO and p-type
Materials 2016, 9, 534; doi:10.3390/ma9070534
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Materials 2016, 9, 534
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semiconducting materials, the most common choice being p-type silicon. Heterojunction n-ZnO/p-Si
devices have been employed as UV visible photodetectors [18], solar cells [19–21], and LEDs [22].
In this work, we fabricated silicon nanowires using a top-down method: metal-assisted chemical
etching (MACE) [23]. This approach is simple and can produce homogenous silicon nanowires. Silver
is the most commonly used metal catalyst. Previously, researchers have reported depositing ZnO on
SiNW substrates using various techniques, such as atomic layer deposition (ALD) [11,24–26], chemical
vapor deposition [27], solution synthesis [28], and radio frequency (RF) sputtering [29,30], to fabricate
ZnO/SiNW heterojunction devices. We deposited an IZO thin film on SiNW substrates using RF
sputtering to form IZO/SiNW heterojunction diodes. Previous studies have shown that the ITO/p-Si
heterojunction device exhibits great photovoltaic effect and rectifying behavior [31]. Therefore, the
resulting ITO-coated SiNW-based heterojunction device had a very large surface area and a short
carrier collection path that enhanced light trapping and increased carrier collection efficiency. Thus,
we achieved a significant enhancement in heterojunction diode properties using ITO/IZO/SiNWs.
2. Experimental Procedures
P-type silicon nanowires (SiNWs) were fabricated through metal-assisted chemical etching
(MACE) [23]. Figure 1 shows a schematic illustration of the procedure for fabricating SiNW-based
heterojunction devices. Briefly, single crystalline p-Si (100) wafers (2–4 Ω¨ cm) were cut into rectangular
slices of 2 ˆ 2 cm2 ; the slices were subsequently cleaned ultrasonically in acetone, isopropyl alcohol,
and deionized water, then dried with nitrogen (N2 ) gas, as shown in Figure 1a. The cleaned silicon
slices were immersed in a solution containing hydrogen fluoride (HF) and silver nitrate (AgNO3 )
(HF:AgNO3 = 5:0.02 M) to deposit silver (Ag) particles, which acted as the catalyst in the following
etching process. Subsequently, (Figure 1b,d), this silicon with Ag particles was etched in an aqueous
solution of HF:AgNO3 for 10 min to produce a vertical p-Si nanowire. To remove the capped silver,
the as-prepared SiNWs were dipped in a nitric acid (HNO3 ) aqueous solution for 90 s. Finally, the
SiNWs were rinsed with deionized water and blown dry in N2 . Figure 1e represents an indium zinc
oxide (IZO) thin film being deposited on a SiNW substrate to form a heterojunction diode with a
ZnO:In2 O2 = 98:2 mol % ceramic target (Shonan Electron Material Laboratory Corporation, Kanagawa,
Japan) using a radio frequency (RF) magnetron sputtering system. The working distance between
the SiNW substrate, and the target was fixed at 15 cm. The base pressure was 8 ˆ 10´ 6 torr, and
the working pressure was 2 ˆ 10´2 torr. The deposition temperature of the IZO thin films was
room temperature, the RF power was 100 W, and the deposition time was 1 h. The ITO thin films
were then deposited on the IZO/SiNW substrates under the same deposition conditions, except
that the deposition time was extended to 2 h (Figure 1f). Finally, aluminum (Al) electrodes were
deposited on the top and bottom using a thermal evaporation method (Figure 1g). The morphologies
of the SiNWs, ITO, IZO, and ITO/IZO/SiNWs were observed using field emission scanning electron
microscopy (FESEM, JEOL JSM-6700F, Akishima-shi, Japan). The core/shell nanowire structure of the
ITO/IZO/SiNWs was observed using the focused ion beam microscopy (FIB, FEI 650, Hillsboro,
OR, USA). The crystalline structures of the ITO and IZO thin films were determined with an
X-ray diffractometer (XRD, LabX, Midland, ON, Canada) using CuKα radiation (Kα = 1.5418 Å).
Current–voltage (I–V) measurements were performed for the IZO/Si, ITO/IZO/Si, IZO/SiNW and
ITO/IZO/SiNW heterojunction structures at room temperature using a Keithley 2400 SourceMeter
(Keithley, Beaverton, OR, USA).
Materials 2016, 9, 534
Materials 2016, 9, 534
Materials 2016, 9, 534
(a)
(a)
(b)
(b)
P-Si substrate
P-Si substrate
(f)
(f)
V
ITO
ITOV
V
V V V
V V
V
V V V V V V V
V V V
V
V V V V V V V V V
P-Si substrate
P-Si substrate
Ag-Nps
Ag-Nps
P-Si substrate
P-Si substrate
(e)
(e)
V
IZO
VIZO
V V
V V V
V V
V V V V V V V
V V V
V
V V V V V V V V V
P-Si substrate
P-Si substrate
3 of 10
3 of 10
3 of 10
(c)
(c)
V
V V V V V V V V
V V V V V V V
V V V
V
V V V V V V V V V
P-Si substrate
P-Si substrate
(d)
(d)
V
V V V V V V V V
V V V V V V V
V
V V V
V V V V V V V V V
P-Si substrate
P-Si substrate
(g)
(g)
V
V
V V
V
V V
Al
V V VAlV V V V
V V V V V V V
V
V V V V V V V
P-Si substrate
P-Si substrate
Figure 1. A schematic illustration of the procedure for fabricating the ITO/IZO/silicon nanowire
Figure
A
illustration
of the procedure for fabricating the ITO/IZO/silicon nanowire
Figure 1.
1.
A schematic
schematic diode
illustration
(SiNW)
heterojunction
device.of the procedure for fabricating the ITO/IZO/silicon nanowire
(SiNW) heterojunction diode device.
(SiNW) heterojunction diode device.
3. Discussion
3.
Discussion
3. Discussion
The surface morphologies of the ITO, IZO, and ITO/IZO thin films deposited on the Si substrate
The
morphologies
of
ITO,
IZO, and
ITO/IZO thin
thin films deposited
deposited on
on the
the Si
Si substrate
substrate
The surface
surface
morphologies
of the
the
ITO,
and
are shown
in Figure
2. The ITO thin
film
in IZO,
Figure
2aITO/IZO
shows that thefilms
Si substrate was
entirely
covered
are
shown
in
Figure
2.
The
ITO
thin
film
in
Figure
2a
shows
that
the
Si
substrate
was
entirely
covered
are
shown
in
Figure
2.
The
ITO
thin
film
in
Figure
2a
shows
that
the
Si
substrate
was
entirely
covered
with grains of different shapes and sizes, ranging from about 40 to 90 nm. The surface morphology
with
grains
of
different
shapes
and
sizes,
ranging
from
about
40
to
90
nm.
The
surface
morphology
with
of different
shapes
and sizes,with
ranging
from about
40 to
90have
nm. The
surface grain
morphology
of
thegrains
IZO film
is smooth
and compact,
cobble-type
grains
that
an average
size of
of
the
IZO
film
is
smooth
and
compact,
with
cobble-type
grains
that
have
an
average
grain
size of
of
the
IZO
film
is
smooth
and
compact,
with
cobble-type
grains
that
have
an
average
grain
of
about 52 nm (Figure 2b). However, the ITO/IZO thin film has a larger grain size; abnormal size
grains
about
52
nm
(Figure
2b).
However,
the
ITO/IZO
thin
film
has
a
larger
grain
size;
abnormal
grains
aboutformed
52 nm and
(Figure
2b). However,
the ITO/IZO
thininfilm
has2c.
a larger grain size; abnormal grains
were
the roughness
increased,
as shown
Figure
were
were formed
formed and
and the
the roughness
roughness increased,
increased, as
as shown
shown in
in Figure
Figure2c.
2c.
Figure 2. Surface scanning electron microscopy (SEM) images of the thin films: (a) ITO/Si; (b) IZO/Si;
Figure
2.
Surface scanning electron microscopy (SEM) images of the thin films: (a) ITO/Si; (b) IZO/Si;
and
(c) 2.
ITO/IZO/Si.
Figure
Surface scanning electron microscopy (SEM) images of the thin films: (a) ITO/Si; (b) IZO/Si;
and
(c)
ITO/IZO/Si.
and (c) ITO/IZO/Si.
Figure 3 presents the sectional morphologies of the ITO, IZO, and ITO/IZO thin films deposited
Figure
3 presents
the sectional
morphologies
of
the ITO, IZO,
and ITO/IZO
thin films deposited
on the
Si substrate.
Thickness
of themorphologies
ITO thin filmof
was
250 nm
the deposition
time was
Figure
3 presents
the sectional
theabout
ITO, IZO,
andwhen
ITO/IZO
thin films deposited
on
the
Si
substrate.
Thickness
of
the
ITO
thin
film
was
about
250
nm
when
the
deposition
was
1 h the
Figure
3a. At 2 h,Thickness
as shown of
in Figure
thickness
of about
the IZO
thin
wasthe
about
150time
nm.time
The
on
Si substrate.
the ITO3b,
thin
film was
250
nmfilm
when
deposition
1
h
Figure
3a.
At
2
h,
as
shown
in
Figure
3b,
thickness
of
the
IZO
thin
film
was
about
150
nm.
The
crystallization
in
the
ITO
and
IZO
thin
films
displayed
preferential
orientation
growth
with
a
was 1 h Figure 3a. At 2 h, as shown in Figure 3b, thickness of the IZO thin film was about 150 nm.
crystallization
in
the
ITO
and
IZO
thin
films
displayed
preferential
orientation
growth
with
a
columnar
structure.
Figure
3c
shows
that
the
ITO
thin
film
deposited
on
the
IZO/Si
substrate
was
The crystallization in the ITO and IZO thin films displayed preferential orientation growth with a
columnar
structure.
3c shows that the ITO thin film deposited on the IZO/Si substrate was
about
400 nm
thick. Figure
columnar
structure.
about 400 nm
thick. Figure 3c shows that the ITO thin film deposited on the IZO/Si substrate was
about 400 nm thick.
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Figure 3. Cross-sectional SEM images of the thin films: (a) ITO/Si; (b) IZO/Si; and (c) ITO/IZO/Si.
Figure 3. Cross-sectional SEM images of the thin films: (a) ITO/Si; (b) IZO/Si; and (c) ITO/IZO/Si.
Figure 3. Cross-sectional SEM images of the thin films: (a) ITO/Si; (b) IZO/Si; and (c) ITO/IZO/Si.
The X-ray diffraction (XRD) patterns of the ITO and IZO films deposited on the Si substrate are
The X-ray
diffraction
andof
IZO
films
deposited
on the
Si substrate
patterns
ofat
the
are
presented
in Figure
4. The (XRD)
diffraction
peaks
2θITO
values
21.4°,
30.3°,
35.1°, 37.2°,
41.7°,
45.4°, 51.6°,
˝ , 30.3˝ , 35.1˝ , 37.2˝ , 41.7˝ , 45.4˝ , 51.6˝ ,
presented
in
Figure
4.
The
diffraction
peaks
at
2θ
values
of
21.4
presented
Figure
4. The4a
diffraction
peaks
at 2θ
values
of 21.4°,
55.6°, and in
60.4°
in Figure
correspond
to the
(211),
(222),
(400),30.3°,
(411),35.1°,
(332),37.2°,
(431),41.7°,
(440),45.4°,
(411),51.6°,
and
˝,
˝ in
55.6
60.4
(211),
(222),
(400),
(411),
(332),
(431),
(440),
(411),
and
55.6°,
and
60.4°
in
Figure
4a
correspond
to
the
(422) planes of the ITO thin film (JCPDS No. 6-416), respectively. No second phase was present in this
(422)
planes
offilm
the ITO
thin film
respectively.
No second
phase
was
in this
(JCPDS No.
film. The
IZO
exhibited
a dominant
(002)6-416),
peak, respectively.
with slight (102)
and (103)
peaks
in present
the diffraction
film.
diffraction
filmofexhibited
a dominant
(002) peak,
with slight
(102) 4b.
andThe
(103)
peaks
inpeak
the diffraction
angleThe
(2θ)IZO
range
20°–70° (JCPDS
No. S6-314),
as shown
in Figure
IZO
(002)
indicated
˝ –70˝ (JCPDS No. S6-314), as shown in Figure 4b. The IZO (002) peak indicated a
angle
(2θ)
range
of
20
(2θ)
range
of
20°–70°
(JCPDS
No.
S6-314),
as
shown
in
Figure
4b.
The
IZO
(002)
peak
indicated
a preferential crystallization orientation with a hexagonal structure along the c-axis at diffraction
preferential
with
a hexagonal
structure
alongalong
the c-axis
at diffraction
angles
aangles
preferential
crystallization
orientation
with
hexagonal
structure
the c-axis
at diffraction
(2θ) crystallization
near
34.1°; no orientation
characteristic
peak
ofa the
In2O
3 phase was found. As shown in Figure 4c,
˝
(2θ)
near
34.1
; no
characteristic
peak ofpeak
the
Inof2 were
Othe
found.
As
shown
in Figure
4c,
for
the
angles
(2θ)
near
34.1°;
no ITO
characteristic
In
2O3 was
phase
found.
As
shown
Figure
4c,
3 phase
for the
ITO/IZO
thin
film,
diffraction
peaks
observed
atwas
21.4°,
30.3°,
35.1°,
37.2°,in41.7°,
45.4°,
˝at
˝ , 35.1
˝ , 37.2
˝ , 41.7
˝ , 45.4
˝ , 45.4°,
˝,
ITO/IZO
thin
film,
ITO
diffraction
peaks
were
observed
at
21.4
,
30.3
51.6
for
the
ITO/IZO
thin
film,
ITO
diffraction
peaks
were
observed
21.4°,
30.3°,
35.1°,
37.2°,
41.7°,
51.6°, 55.6°, and 60.4°, along with IZO diffraction peaks at 33.7° and 62.1°.
˝ , 55.6°,
˝ , 60.4°,
˝ and
˝ . 62.1°.
55.6
and 60.4
along along
with IZO
peaks peaks
at 33.7at
51.6°,
and
withdiffraction
IZO diffraction
33.7°62.1
and
20
20
30
30
2Degree
(622)
(622)
(013)
(013)
40
50
40
50
2Degree
(611)
(611)
(440)
(440)
(102)
(102)
(431)
(431)
(332)
(332)
(222)
(222)
(400)
(400)
(002)
(002)
(411)
(411)
(c)
(c)
(211)
(211)
Intensity
Intensity(a.u.)
(a.u.)
ITO
ITO
IZO
IZO
60
60
(b)
(b)
(a)
(a)
70
70
Figure 4. X-ray diffraction (XRD) analyses of thin films: (a) ITO; (b) IZO; and (c) ITO/IZO.
Figure 4.
4. X-ray
X-ray diffraction
diffraction (XRD)
(XRD) analyses
analyses of
of thin
thin films:
films: (a)
(a) ITO;
ITO; (b)
(b) IZO;
IZO; and
and (c)
(c) ITO/IZO.
ITO/IZO.
Figure
The SEM images in Figure 5 show cross sections of the SiNWs formed after 10 min of etching.
The
SEM
in Figure
5 show
cross
sections
the SiNWs
formed
10 min of
etching.
The large
areaimages
of vertically
aligned
SiNW
arrays
withof
length
wasafter
successfully
fabricated
The SEM
images
in Figure
5 show
cross
sections
ofuniform
the SiNWs
formed
after
10 min of
etching.
The
large
area
of
vertically
aligned
SiNW
arrays
with
uniform
length
was
successfully
fabricated
through
metal-assisted
chemical
etching
(MACE)
of
Si
wafers.
Figure
5a
indicates
that
the
length
of
The large area of vertically aligned SiNW arrays with uniform length was successfully fabricated
through
metal-assisted
chemical
etching
(MACE)
of Si wafers.
Figure
5a(full
indicates
that
the length
of
the
SiNWs
is
about
1.7
μm,
and
the
average
diameter
is
about
120
nm
width
at
half
length
of
through metal-assisted chemical etching (MACE) of Si wafers. Figure 5a indicates that the length of
the
SiNWs
is about 1.7
μm,
and the average
diameter
is about
120 no
nm (full width
at half
length of
SiNW).
In addition,
theµm,
SiNWs
smooth diameter
surfaces with
almost
as shown
in Figure
the
SiNWs
is about 1.7
andhave
the average
is about
120 nmpores
(full width
at half
length5b.
of
SiNW).
In
addition,
the
SiNWs
have
smooth
surfaces
with
almost
no
pores
as
shown
in
Figure
5b.
The result
is identical
that produced
by Xiaopeng
Qi etalmost
al. [32].no pores as shown in Figure 5b. The
SiNW).
In addition,
thetoSiNWs
have smooth
surfaces with
The result is identical to that produced by Xiaopeng Qi et al. [32].
result is identical to that produced by Xiaopeng Qi et al. [32].
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Figure 5. Cross-sectional SEM images of the SiNWs. (a) Low rate and (b) high rate.
Figure 5. Cross-sectional SEM images of the SiNWs. (a) Low rate and (b) high rate.
Figure
5. Cross-sectional
SEM images
of the SiNWs.
(a) Low rate and (b)
high rate.
Figure 6a
presents
a cross-sectional
SEM image
of the ITO/IZO/SiNW
heterojunction
structure,
Figure
6aa presents
a cross-sectional
image
of the of
ITO/IZO/SiNW
heterojunction
structure,
showing
“chicken thigh”
morphology;SEM
because
the degree
step coverage in the
sputtering method
Figure
5. Cross-sectional
SEM images
of the SiNWs.
(a) Low rate and heterojunction
(b) high rate.
6a
presents
amorphology;
cross-sectional
SEMcover
image
ofSiNWs.
the ITO/IZO/SiNW
was aFigure
not
good,
the
ions
could
not uniformly
The focused
ioninbeam
(FIB)structure,
imagemethod
of
showing
“chicken
thigh”
because
thethe
degree
of step
coverage
the sputtering
showing
a the
“chicken
thigh”
morphology;
because
degree
step
coverage
in the
sputtering
method
the good,
ITO/IZO/SiNW
heterojunction
structure
is the
shown
in of
Figure
6b. It can
be
observed
that
theof the
was not
ions
could
not
uniformly
cover
the
SiNWs.
The
focused
ion
beam
(FIB)
image
Figure
6a presents
a cross-sectional
SEMcover
image
ofSiNWs.
the ITO/IZO/SiNW
heterojunction
structure,
was
not
good,
the
ions could
not120
uniformly
the
The focused
ion
beam
image
of
diameter
of the
SiNWs
is about
nm is
(full
width
atFigure
half length
of
SiNW)
and
the (FIB)
ITO
IZOITO/IZO/SiNW
heterojunction
structure
shown
in
6b. It
can
be in
observed
thatand
the
diameter
showing
a
“chicken
thigh”
morphology;
because
the
degree
of
step
coverage
the
sputtering
method
the
ITO/IZO/SiNW
heterojunction
structure
is
shown
in
Figure
6b.
It
can
be
observed
that
the
coated radial Si NW heterojunction structure.
of thewas
SiNWs
is
about
120 nm
(full
at halfwidth
length
ofhalf
SiNW)
and
the ITOand
and
IZO-coated
radial
Si
not good,
ions
could
notwidth
uniformly
theatSiNWs.
The
focused
beam
image
of
diameter
of thethe
SiNWs
is about
120
nm (fullcover
length
of SiNW)ion
the (FIB)
ITO and
IZOthe
ITO/IZO/SiNW
heterojunction
structure is shown in Figure 6b. It can be observed that the
NW heterojunction
structure.
coated
radial Si NW
heterojunction structure.
diameter of the SiNWs is about 120 nm (full width at half length of SiNW) and the ITO and IZOcoated radial Si NW heterojunction structure.
Figure 6. (a) Cross-sectional SEM image of the SiNWs and (b) the FIB image of the ITO/IZO/SiNWs.
Reflectance
(%) (%) (%)
Reflectance
Reflectance
Figure 6.7(a)
Cross-sectional
SEM image
of the
SiNWs and
(b) the
FIB image of
Figure
shows
the reflectance
of the
different
Si-base
structures.
Inthe
theITO/IZO/SiNWs.
visible light range
Figure 6. (a) Cross-sectional SEM image of the SiNWs and (b) the FIB image of the ITO/IZO/SiNWs.
(450–750 nm), compared to the Si wafer (average reflectance about 28%), the SiNW shows a lower
Figure 6.7 (a)
Cross-sectional
SEM image
of the
SiNWs and
the
FIB image of
Figure
shows
the the
reflectance
of the
different
Si-base
structures.
In the
theITO/IZO/SiNWs.
visible
light of
range
average
reflectance
and
reflectance
is
about
1.6%.
In(b)addition,
the average
reflectance
the
(450–750
nm),
compared
to
the
Si
wafer
(average
reflectance
about
28%),
the
SiNW
shows
a
lower
Figure
7
shows
the
reflectance
of
the
different
Si-base
structures.
In
the
visible
light
IZO/SiNWs and ITO/IZO/SiNWs are 1.2% and 0.7%, respectively. From the above results, it isrange
Figure
7 showsand
the the
reflectance
of the
different
Si-base
structures.
In the visible
light of
range
average
reflectance
is about
1.6%.
addition,
average
reflectance
(450–750
nm),
compared
thereflectance
Si wafer
(average
reflectance
aboutthe
28%),
the SiNW
shows the
a lower
demonstrated
that the to
suppressed
light reflection
is
due In
to the
nanowire
structure.
(450–750
nm),
compared
to
the
Si
wafer
(average
reflectance
about
28%),
the
SiNW
shows
a
lower
IZO/SiNWs
and and
ITO/IZO/SiNWs
are 1.2%
and 1.6%.
0.7%, respectively.
the abovereflectance
results, it isof the
average
reflectance
the reflectance
is about
In addition,From
the average
average
reflectance
and
the reflectance
is about is
1.6%.
addition,
the structure.
average reflectance of the
60
demonstrated
that the
suppressed
light reflection
due In
to the
nanowire
IZO/SiNWs
and
ITO/IZO/SiNWs
are
1.2%
and
0.7%,
respectively.
From
above
results,
Si
wafer
IZO/SiNWs and ITO/IZO/SiNWs are 1.2% and 0.7%, respectively. From the the
above
results,
it is it is
Si NWs
50
demonstrated
that
the
suppressed
light
reflection
is
due
to
the
nanowire
structure.
60
demonstrated that the suppressed light reflection is due toIZO/Si
the nanowire
structure.
NWs
Si wafer
ITO/IZO/Si
NWs
Si
NWs
IZO/Si
Si
waferNWs
ITO/IZO/Si
NWs
Si
NWs
40
50
60
30
40
50
IZO/Si NWs
ITO/IZO/Si NWs
20
30
40
10
20
30
100
20
100
400
500
600
700
800
900
Wavelength (nm)
400
500
600
700
800
900
400
500
600
700
800
900
Figure7. Reflectance of the different structures:
Si wafer, SiNWs,
Wavelength
(nm) IZO/SiNWs, and ITO/IZO/SiNWs.
0
Figure7. Reflectance of the different structures:
Si wafer, SiNWs,
Wavelength
(nm) IZO/SiNWs, and ITO/IZO/SiNWs.
Figure7. Reflectance of the different structures: Si wafer, SiNWs, IZO/SiNWs, and ITO/IZO/SiNWs.
Figure 7. Reflectance of the different structures: Si wafer, SiNWs, IZO/SiNWs, and ITO/IZO/SiNWs.
R=
Forward current
Reverse current
(1)
Figure 8a shows the I−V characteristics of the IZO/Si heterojunction diode. The I−V curve for the
turn-on voltages in the forward bias range is indistinct. These indicate that the I−V characteristics of
the IZO/Si heterojunction diode did not follow a typical p–n diode curve. Figure 8b shows that under
Materials 2016, 9, 534
6 of 10
forward bias, the low value of the turn-on voltage for the ITO/IZO/Si heterojunction diode has a low
value of about 1.42 V and a higher rectification ratio. The log(|I|)−log(V) curve is plotted in Figure 8c
2
1 V for and
the ITO/IZO/Si
heterojunction
and
shows a leakage(I–V)
current
of 1.07 × 10−9 A/cm
Current–voltage
characterization
of theatIZO/Si
ITO/IZO/Si
was carried diode
out atand
room
smaller than the IZO/Si heterojunction diode. The roles of the ITO layer are interpreted with the help
temperature, as shown in Figure 8. The nonlinear and rectifying I–V characteristics shown in Figure 8
of the following key parameters: The electrode area ratio of the ITO/IZO/Si heterojunction diode is
confirmed that a p–n junction structure had been formed in IZO/Si and ITO/IZO/Si. In Figure 8a, the
much larger than that of the IZO/Si heterojunction diode. As the ITO layer covers the entire surface
rectification properties of the IZO/Si heterojunction diode is−3not obtained. The rectification ratios (R)
of the IZO/Si, although the resistivity of ITO film (5 × 10 Ω·cm) is larger than that of Al film
of the−5ITO/IZO/Si heterojunction diode (at ˘3 V) were calculated using Equation (3), yielding values
(10 Ω·cm), the generated carriers are readily collected via the shortest path between the p–n
of 125.6 [33]:
heterojunction and the ITO layer and effectively transported to the Al finger electrode via ITO
Forward current
“
without recombination. Therefore, theRITO/IZO/Si
heterojunction diode obtained the rectifying I–V(1)
Reverse current
curve and small leakage current.
-7
-4
x
2.0x10
-4
x
1.0x10
(a)
x
3.0x10
IZO/Si
-7
x
2.5x10
-7
-4
x
-1.0x10
-4
x
-2.0x10
-4
x
-3.0x10
-7
x
1.5x10
-7
x
1.0x10
-8
x
5.0x10
-4
x
-4.0x10
0.0
-4
x
-5.0x10
-4
x
-6.0x10
ITO/IZO/Si
x
2.0x10
Current (A)
Current (A)
0.0
(b)
-8
-4
-2
0
2
x
-5.0x10
4
-4
Voltage (V)
-2
0
Voltage (V)
2
4
-6
10
(c)
ITO/IZO/Si
-7
Current (A)
10
-8
10
-9
10
-10
10
1.07x10-9
-11
10
-3
-2
-1
0
Voltage (V)
1
2
3
Figure 8. I−V characterization curves of the (a) IZO/Si and (b) ITO/IZO/Si heterojunction diodes;
Figure 8. I´V characterization curves of the (a) IZO/Si and (b) ITO/IZO/Si heterojunction diodes;
(c) the log(|I|)−V curve of the ITO/IZO/Si heterojunction diode.
(c) the log(|I|)´V curve of the ITO/IZO/Si heterojunction diode.
Figure 8a shows the I´V characteristics of the IZO/Si heterojunction diode. The I´V curve for the
turn-on voltages in the forward bias range is indistinct. These indicate that the I´V characteristics of
the IZO/Si heterojunction diode did not follow a typical p–n diode curve. Figure 8b shows that under
forward bias, the low value of the turn-on voltage for the ITO/IZO/Si heterojunction diode has a low
value of about 1.42 V and a higher rectification ratio. The log(|I|)´log(V) curve is plotted in Figure 8c
and shows a leakage current of 1.07 ˆ 10´9 A/cm2 at 1 V for the ITO/IZO/Si heterojunction diode
and smaller than the IZO/Si heterojunction diode. The roles of the ITO layer are interpreted with
the help of the following key parameters: The electrode area ratio of the ITO/IZO/Si heterojunction
diode is much larger than that of the IZO/Si heterojunction diode. As the ITO layer covers the entire
surface of the IZO/Si, although the resistivity of ITO film (5 ˆ 10´ 3 Ω¨ cm) is larger than that of Al
film (10´ 5 Ω¨ cm), the generated carriers are readily collected via the shortest path between the p–n
heterojunction and the ITO layer and effectively transported to the Al finger electrode via ITO without
recombination. Therefore, the ITO/IZO/Si heterojunction diode obtained the rectifying I–V curve and
small leakage current.
Materials 2016, 9, 534
Materials 2016, 9, 534
Materials 2016, 9, 534
7 of 10
7 of 10
7 of 10
improve the properties of the heterojunction diode, SiNWs were used.
presents the
To
To improve the properties of the heterojunction diode, SiNWs were used. Figure
Figure 99 presents the
I–V characteristics
of
the
ITO/IZO/SiNW
heterojunction
diode.
The
I–V
curve
of
ITO/IZO/SiNWs
I–V characteristics
characteristics of
of the
the ITO/IZO/SiNW
ITO/IZO/SiNW heterojunction diode. The
The I–V
I–V curve
curve of
of ITO/IZO/SiNWs
ITO/IZO/SiNWs
excellent rectification
rectification behavior,
behavior, with
with aa rectification
rectification ratio
ratio of
of about
about 550.7
550.7 at 33 V.
V. The
clearly
shows
excellent
clearly shows excellent rectification behavior, with a rectification ratio of about 550.7 at
at 3 V. The
ITO/IZO/SiNWheterojunction
heterojunctiondiode
diodeshows
showsa aturn-on
turn-onvoltage
voltageofof2.53
2.53VVin
inthe
the forward
forward bias
bias range.
range.
ITO/IZO/SiNW
ITO/IZO/SiNW heterojunction diode shows a turn-on voltage of 2.53 V in the forward bias range.
When compared
with
the
ITO/IZO/Si
heterojunction
diode,
the
ITO/IZO/SiNW
heterojunction
diode
When compared
compared with
with the
the ITO/IZO/Si
ITO/IZO/Si heterojunction
heterojunction diode,
diode, the
the ITO/IZO/SiNW
ITO/IZO/SiNW heterojunction
heterojunction diode
small leakage
the reverse bias region.
the
shows
shows a
a small leakage current
current in
in the reverse bias region. This
This is
is caused
caused by
by the
the junction
junction area
area of
of the
ITO/IZO/SiNW
heterojunction
diode
being
larger
than
that
of
the
ITO/IZO/Si
heterojunction
diode.
ITO/IZO/SiNW
ITO/IZO/SiNW heterojunction
heterojunction diode
diode being
being larger
larger than
than that of the ITO/IZO/Si
ITO/IZO/Si heterojunction
heterojunction diode.
diode.
The junction area of
the
heterojunction
diode
is
characterized
using
the
capacitance–voltage
(C´V)
of
the
heterojunction
diode
is
characterized
using
the
capacitance–voltage
The junction area of the heterojunction diode is characterized using the capacitance–voltage (C−V)
(C−V)
[34,35], as shown
in Figure
10. The
maximum capacitance
(Cmax
)) of
method
ofthe
theITO/IZO/SiNW
ITO/IZO/SiNW
method [34,35], as
as shown
shown in
in Figure
Figure 10.
10. 2The
The maximum
maximum capacitance
capacitance (C
(Cmax
max) of the ITO/IZO/SiNW
heterojunction diode is about 6.21
nF/cm22 and is larger
than that
of the
ITO/IZO/Si heterojunction
6.21
heterojunction diode is about
about
6.21 nF/cm
nF/cm and is larger
larger than
than that
that of
of the
the ITO/IZO/Si
ITO/IZO/Si heterojunction
2
2
(about 3.58nF/cm
nF/cm The
). The ratio
of Cmax
is proportional
the ratio
thejunction
p–n junction
areas
diode
is proportional
to thetoratio
of theofp–n
areas of
the
diode (about
(about 3.58
3.58 nF/cm2).
). The ratio
ratio of
of C
Cmax
max is proportional to the ratio of the p–n junction areas of the
of the ITO/IZO/SiNWs
and the ITO/IZO/Si
heterojunction
diode
[35]. It is that
understood
thatarea
the
ITO/IZO/SiNWs
and
the
ITO/IZO/Si
heterojunction
diode
[35].
It
is
understood
the
junction
ITO/IZO/SiNWs and the ITO/IZO/Si heterojunction diode [35]. It is understood that the junction area
junction
area of the ITO/IZO/SiNW heterojunction
diodetimes
is about 1.73
times that of the
ITO/IZO/Si
of
of the
the ITO/IZO/SiNW
ITO/IZO/SiNW heterojunction
heterojunction diode
diode is
is about
about 1.73
1.73 times that
that of
of the
the ITO/IZO/Si
ITO/IZO/Si heterojunction
heterojunction
heterojunction diode.
diode.
diode.
-4
-5
Current
Current(A)
(A)
x -5
8.0x10
x
8.0x10
-5
(a)
(a)
10-5
10
ITO/IZO/Si
ITO/IZO/Si NWs
NWs
-6
10-6
10
-5
x -5
6.0x10
x
6.0x10
-5
x -5
4.0x10
x
4.0x10
-5
x -5
2.0x10
x
2.0x10
(b)
(b)
-7
-8
10-8
10
-9
10-9
10
-10
9.92x10
9.92x10-10
-10
10-10
10
0.0
0.0
ITO/IZO/Si
ITO/IZO/Si NWs
NWs
10-7
10
Current
Current(A)
(A)
x -4
1.0x10
x
1.0x10
-11
-4
-4
-2
-2
0
0
Voltage
Voltage (V)
(V)
2
2
10-11
10 -3
-3
4
4
-2
-2
-1
-1
0
0
Voltage
Voltage (V)
(V)
1
1
2
2
3
3
Figure
9.
(a)
I−V
characterization
curve
ITO/IZO/SiNWs;
(b)
log(|I|)−V
of
ITO/IZO/SiNWs.
Figure
curve of
Figure 9.
9. (a)
(a)I´V
I−V characterization
characterizationcurve
curveofof
ofITO/IZO/SiNWs;
ITO/IZO/SiNWs; (b)
(b)log(|I|)´V
log(|I|)−V curve
curve
of ITO/IZO/SiNWs.
ITO/IZO/SiNWs.
-9
Capacitance
Capacitance(F/cm
(F/cm2)2)
x -9
7.0x10
x
7.0x10
-9
x -9
6.0x10
x
6.0x10
-9
x -9
5.0x10
x
5.0x10
-9
x -9
4.0x10
x
4.0x10
-9
x -9
3.0x10
x
3.0x10
-9
-9
x
2.0x10
x
2.0x10
-5
-5
ITO/IZO/SiNWs
ITO/IZO/SiNWs
ITO/IZO/Si
ITO/IZO/Si
-4
-4
-3
-3
-2
-2
-1
-1
Voltage
Voltage (V)
(V)
0
0
1
1
Figure
10.
C–V
measurement
the
ITO/IZO/Si
ITO/IZO/SiNW heterojunction
diode.
Figure10.
10.C–V
C–Vmeasurement
measurementofof
ofthe
theITO/IZO/Si
ITO/IZO/Si and
and
Figure
and ITO/IZO/SiNW
ITO/IZO/SiNWheterojunction
heterojunctiondiode.
diode.
The
The nonlinear
nonlinear I–V
I–V characteristics
characteristics with
with diode
diode behavior
behavior can
can be
be described
described by
by aa thermionic
thermionic emission
emission
The
nonlinear
I–V
characteristics
with
diodecan
behavior
can be described
by a thermionic emission
(TE)
model
theory.
The
current
in
such
a
device
be
expressed
as
[36]
(TE) model theory. The current in such a device can be expressed as [36]
(TE) model theory. The current in such a device can be expressed as [36]
=
(2)
” −
ı
=
−1
1
(2)
qV
I “ Is ep nkT q ´ 1
s is the saturation current; k is the Boltzmann constant; n is the ideality factor; T is
where,
I
where, Is is the saturation current; k is the Boltzmann constant; n is the ideality factor; T is
temperature
temperature in
in Kelvin;
Kelvin; qq is
is the
the electron
electron charge;
charge; and
and V
V is
is the
the applied
applied voltage.
voltage. The
The IIss of
of
heterojunction
heterojunction diode
diode is
is expressed
expressed by
by the
the following
following equation
equation [37]:
[37]:
=
=
∗
∗
(2)
the
the
the
the
(3)
(3)
Materials 2016, 9, 534
8 of 10
where, Is is the saturation current; k is the Boltzmann constant; n is the ideality factor; T is the
temperature in Kelvin; q is the electron charge; and V is the applied voltage. The Is of the heterojunction
diode is expressed by the following equation [37]:
Is “ AA˚ T 2 ep
´qϕb
kT q
(3)
where A is the device area; A* is the Richardson constant; and ϕb is the barrier height. The plot of
log I vs. V gives the value of the ideality factor. The ϕb is obtained by rewriting Equation (3) as
„

kT
AA˚ T 2
ϕb “
ln
q
Is
(4)
Using Equations (2)–(4), the values of ϕb and n of the ITO/IZO/SiNW heterojunction diode were
calculated. The n = 1.53 can be calculated from the slope of the linear region of the I–V curve in the
forward bias region, and the value of ϕb is estimated to be 0.91 eV. The high ideality factor could be
due to the accelerated recombination of electrons and holes in the depletion region or by the presence
of the interfacial layer [38].
4. Conclusions
In this study, the rectifying current–voltage (I–V) characteristics confirmed that a p–n junction
structure had been formed in ITO/IZO/Si and ITO/IZO/SiNW heterojunction structures. To enhance
the properties of the ITO/IZO/Si heterojunction diodes, an array of vertically aligned SiNWs was
fabricated through metal-assisted chemical etching. Subsequently, ITO and IZO thin films were de ϕb
posited onto the SiNWs using a radio frequency sputtering technique to create an ITO/IZO/SiNW
heterojunction diode. The ITO/IZO/SiNW heterojunction diode showed a lower turn-on voltage
(2.53 V) in the forward bias range and a small leakage current in the reverse bias range. Its rectification
ratio is 550.7 at 3 V. The ideality factor (n = 1.53) can be calculated from the slope of the linear region of
the I–V curve in the forward bias region and the barrier height (ϕb ) is estimated to be 0.91 eV.
Acknowledgments: The authors acknowledge the financial support of the Ministry of Science and Technology
(MOST 104-2221-E-244-005).
Author Contributions: Wen-Chung Chang gave the suggestion for the paper organization and English grammar
correction. Sheng-Chien Su carried out the experimental procedures, including the depositions of ITO and IZO on
silicon nanowire and measurements of SEM and X-ray patterns. Chia-Ching Wu participated in the measurement
and prediction of the I–V curve of ITO/IZO/silicon nanowire heterojunction diodes. All authors read and
approved the final manuscript.
Conflicts of Interest: The authors have no conflict of interest. The funding sponsors had no role in the design of
the study, in the collection, analyses, or interpretation of data; in the writing of the manuscript; or in the decision
to publish the results.
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