OPTO−ELECTRONICS REVIEW 19(4), 486–490
DOI: 10.2478/s11772−011−0047−x
Concept of epitaxial silicon structures for edge illuminated solar cells
J. SARNECKI*1, G. GAWLIK1, M. TEODORCZYK1, O. JEREMIASZ2, R. KOZŁOWSKI1,
D. LIPIŃSKI1, K. KRZYŻAK1, and A. BRZOZOWSKI1
1Institute
of Electronic Materials Technology, 133 Wólczyńska Str., 01−919 Warsaw, Poland
2ABRAXAS, 27 Piaskowa Str., 44−300 Wodzisław Śląski, Poland
A new concept of edge illuminated solar cells (EISC) based on silicon epitaxial technique has been proposed. In this kind of
photovoltaic (PV) devices, sun−light illuminates directly a p−n junction through the edge of the structure which is perpendicu−
lar to junction surface. The main motivation of the presented work is preparation of a working model of an edge−illuminated
silicon epitaxial solar cell sufficient to cooperation with a luminescent solar concentrator (LSC) consisted of a polymer foil
doped with a luminescent material. The technological processes affecting the cell I–V characteristic and PV parameters are
considered.
Keywords: silicon epitaxy, solar cell, edge illuminated silicon solar cell.
1. Introduction
Edge illuminated solar cells (EISC) are an alternative to
conventional planar solar cells. The vertical geometry of
these cells causes the illuminated surface is not obstructed
by contact stripes. Moreover, in edge illuminated cells, the
area of p−n junction is much larger than the area of illumi−
nated surface. This makes the junction current density in
these cells relatively smaller comparing to the conventional
planar cells under the same illumination. Also the contact
serial resistance can be small comparing to the regular pla−
nar cells due to the large contact area. The high voltage solar
batteries can be created by serial connection of many edge−
−illuminated solar cells in the form of compact stack of
many edge illuminated cells soldered side by side creating
vertical−multijunction module (VMJ) [1]. Taking into ac−
count properties of the edge illuminated PV cells it seems
that cells of such geometry are especially useful for applica−
tions with light concentrators. The application potential of
such design caused that the edge illuminated solar cells have
been investigated for about ten years starting from the early
70’s [2–7]. Recently, the similar edge illuminated solar cells
have been developed and investigated by Sater at the
beginning of the 21st century [8].
Photovoltaic characteristics of the VMJ under high inten−
sity illumination was previously examined using a structure
of serial connected 16 edge illuminated unit cells under 100
suns AM0 light intensity [3,4]. The VMJ ability to work un−
der high light intensity was then checked by Sater using
a module constructed from 40 serial connected vertical cells
[8]. The working surface of the area of 0.78 cm2 has been il−
luminated with 2500 suns of AM1.5. Under such illumina−
*e−mail:
486
jerzy.sarnecki@itme.edu.pl
tion, the VMJ module produced 31.8 W at 25.5 V, i.e., very
good conversion efficiency of about 20% was reached. This
corresponds to a very high ratio of output power to silicon
weight of PV module of about 300 W/g. For a regular PV c−sili−
con planar cell under AM1.5 illumination, the power to silicon
weight ratio is about 0.2 W/g. The detailed review of theoreti−
cal and experimental works on edge illuminated solar cells
published up to the year 2006 has been presented by Rafat [1].
The concept of edge illuminated silicon PV cells, made
using silicon epitaxial p and n layers grown on p+ or n+ sili−
con substrates, has been proposed in this work. The p−n junc−
tion has been created directly during sequential epitaxial
growth of silicon p and n type layers. The relatively low dop−
ing level (1015–1017 cm–3) in both n and p type epi−layers pro−
motes long diffusion length of minority carriers. The thick−
ness of the cell has been settled at about 0.1 mm with p−n
junction located at about middle of the cell thickness. Dis−
tance from a junction to the contact plane is essentially smal−
ler than minority carrier diffusion length in the proposed
structure. The l−h junctions of p−p+ and n−n+ type have been
applied under both contacts creating back surface field re−
gions directing charge carriers to the p−n junction and de−
creasing the structure serial resistance. Taking into account
that minority carrier diffusion length is essentially longer than
a distance between a contact and p−n junction, the l−h junction
may essentially increase the number of minority carriers which
pass through p−n junction. The l−h junctions have been pro−
duced during the same epitaxial process as p and n epi−layers.
The main advantage of the CVD epitaxial process is the
unique quality of the silicon crystalline structure. Moreover,
both p and n layers are created by doping of pure silicon
without compensation with the opposite dopant. Conse−
quently, the diffusion length of minority carriers in both p
and n type layers is high and may be close to a theoretical
Opto−Electron. Rev., 19, no. 4, 2011
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value. So, the layers of both types may contribute to PV
transformation efficiently.
The unit edge illuminated PV cells have been fabricated
in the form of 5–8 cm long, 0.2–0.3 cm wide and about 0.01
cm thin stripes. The thickness of an individual stripe corre−
sponds to the total thickness of an epitaxial layer, so in the
cell manufacturing process almost the whole substrate has
been removed using mechanical process. Contact metalliza−
tion was evaporated on both sides of the thinned epitaxial
wafers. After thermal processing of the contact, the epi−
−wafers ware then cut on 2–3 mm wide stripes. Finally, the
illuminating edge surface of the unit cell with an area of
about (5–8 cm)×0.01 cm = 0.05 cm2 – 0.08 cm2 has been
finished by chemical and plasma processing.
The geometry of the edge illuminated solar cells (EISC)
is well suited for cooperation with foil luminescent solar
collectors (LSC) [9]. However, taking into account a thick−
ness of the unit EISC, the modules of more serial connected
EISCs with the total thickness matched to the thickness of
LSC will be used for the best cooperation with luminescent
collector foil.
2. Fabrication of EISC
Fig. 1. Majority carriers concentration profile in n+/n/p/p+ epitaxial
structure.
surface and metal contact, the additional n+ sub−micron
layer was deposited on n type layer (emitter). The acceptors
and donors concentration profile vs. depth in epitaxial
multilayers structure p++/p/n deposited on n+ substrate is
presented on Fig. 2. Additionally, for same epitaxy run per−
formed on highly doped (~5×1018 cm–3) p type substrate
was deposited a back surface field (BSF) layer between the
substrate and a p layer as shown in Fig. 3.
2.1. Deposition of silicon epitaxial layers
The epitaxial layers of EISC structure were grown by means
of chemical vapour deposition technique (CVD) in the
industrial Gemini 1 two−chamber inductive heated vertical
reactors equipped with rotated susceptor. The used equip−
ment ensures high uniformity of silicon epitaxial layer thic−
kness (±2.5%) and resistivity (±5%). The silicon tetrachlo−
ride (SiCl4) was used as a silicon source. The diborane
(B2H6) and the phosphine (PH3) were used as dopant sour−
ces. The epitaxial layers were grown on the substrates of
different conductivity type, resistivity and orientation. We
have used p (1016–1017 cm–3), p+ (~5×1018 cm–3) and n+
(~2×1018 cm–3) type, Czochralski grown (Cz Si) <111> or
<100> oriented, 4” diameter Si substrates with the thickness
in the range of 300–350 mm. During epitaxial growth, the
temperature of susceptor was in the range 1080–1110°C.
Such conditions and a proper SiCl4 concentration ensure
a growth rate close to 1 μm/min. To select a most suitable
multilayer epitaxial structures for EISC application, the
three types of epitaxial structures such as n+/n/p/p+, n+/n/p/
p++/p+ and p+/p/n/n+ with different layer thickness and
resistivity have been performed in several epitaxy runs.
Fig. 2. Majority carriers concentration profile in p++/p/n/n+ epitaxial
structure.
2.2. Characterization of epitaxial structures
The majority carrier concentrations, the thickness of depo−
sited epitaxial layers and the p−n junction width were mea−
sured by spreading resistance (SR) method. The doping pro−
file of p type layer (base) deposited on p+ type Si Cz <111>
oriented substrate followed by n type layer has been pre−
sented in Fig. 1. To ensure high phosphorus surface concen−
tration, which enables low contact resistance between Si
Opto−Electron. Rev., 19, no. 4, 2011
Fig. 3. Majority carriers concentration profile in n+/n/p/p++/p+
epitaxial structure with BSF layer between the substrate and p base
layer.
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J. Sarnecki
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Concept of epitaxial silicon structures for edge illuminated solar cells
The quality of epitaxial structures was determined with
deep level transient spectroscopy (DLTS) method. Concen−
tration of metal contaminants in the epitaxial layer was
below DLTS sensitivity < 1×1012 cm–3.
2.3. EISC technological cycles
Six groups of epitaxial structures have been fabricated. The to−
tal thickness of deposited layers in each epitaxial structure was
about 100 μm. The wafers p, p+, and n+ type with deposited
epitaxial layers n+/n, n+/n/p, n+/n/p/p++ and p+/p/n were thinned
up to about 105–110 μm. For parts of thinned structures, the
chemical etching of grinded surface in HF:HNO3: H2O mix−
ture follows the thinning operation. The etching in Ar plasma
preceded the deposition of 0.4 μm thick Ni/Al layers on both
surfaces of thinned wafers. The metal contacts were deposited
in sputtering processes. After deposition, the Ni/Al contacts
were annealed in Ar atmosphere in about 500°C for a few
minutes to form an ohmic contact.
Table 1. Technological cycles employed for fabrication of
epitaxial stripe cells.
3. Experimental results
The influence of technological processes on stripe cells PV
performance was evaluated by using computerized sun simu−
lator at the Photovoltaic Laboratory of the Institute of Meta−
llurgy and Material Science Polish Academy of Sciences in
Cracow. The set of four halogen lamp was used as a light
source which ensures the standardized light power density
of 100 mW/cm2 at the illuminated edge surface of the mea−
sured stripe. The cell temperature during measurements was
kept constant at 25°C. It should be noted that the light spec−
trum of simulator differs from the real sunlight spectrum as
illustrated in Fig. 4. The maximum intensity of simulator
spectrum is shifted towards the red and simultaneously the
intensity of the NIR part is slightly lower than in the solar
spectrum. Here, total energy of the light from the simulator
is supplied by photons of mean energy lower compared to
the sun light.
Table 2 summarises the PV parameters of different
stripe cells performed by means of technological operations
designed as I–III. All stripes were of the same shape, 2−mm
width and about 0.1−mm thick.
Technological cycles
I II III IV V VI
Grinding
+ + + + + +
Chemical etching of grinded surface
+ + + +
Deposition and annealing of contacts
+ + + + + +
Cutting into stripes
+ + + + + +
Chemical etching of stripe edges
+ + +
Ar plasma etching of stripe edges
+ +
+
+
Deposition SiO2 layers on stripe edges
Technological operation
Finally, the wafers were cut by diamond saw into
40–100 mm long and 2–4 mm width stripes which form unit
cells. Edges of some samples after cutting process were sub−
jected to further chemical and plasma etching processes. In
selected samples, edges were then covered with 180−nm−
−thick SiO2 layer. Table 1 lists technological cycles used for
fabrication of edge illuminated stripe cells.
Fig. 4. Comparison of sun light spectrum and simulator spectrum.
Table 2. An example of PV parameters of individual stripe obtained from different epitaxial structures after processing sequences.
L (cm)
Pmax (mW)
FF
h (%)
I–1 n /n/p/p <111>
4
0.134
0.42
3.4
I–3 n++/n/p/p+<111>
5
0.21
0.41
4.0
5
0.23
0.45
4.6
5
0.21
0.47
4.1
6
0.424
0.56
7.7
6
0.33
0.53
5.4
6
0.42
0.52
7.7
Technological cycle – No. of epitaxial structure
++
+
+
I–5 n /n/p d<100>
++/n/p/p+<111>
II–1 n
++/n/p/p++/p+
II–2 n
<111>
II–6 p++/p/n+<111>
++/p/n/n+ <111>
II–7 p
p++
= BSF
III–1 n
++/n/p/p+
<111>
6
0.22
0.50
3.7
III–3 n
++/n/p/p+
<111>
4.5
0.21
0.47
4.7
7.5
0.43
0.53
5.6
5
0.26
0.44
5.0
III–5 n+/n/p <111>
III–7 p
488
++/p/n/n+ <111>
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A series resistance of single stripe structure was esti−
mated from the dark I–V characteristics of the PV structure.
The measured resistance was in the range 0.1–0.2 Wcm2.
The values of main PV parameters of EISC fabricated in
the above mentioned technological cycles from the epitaxial
structures n+/n/p/p++/p+ and n+/n/p/p+ are listed in Table 3.
Table 3. PV parameters of individual stripe obtained from epitaxial
structures No. 3 (n+/n/p/p+ – see Fig. 1) and No. 4 (n+/n/p/p++/p+ –
see Fig. 3) after different processing sequences.
Technological L (cm)
cycle
No. 4 No. 3
I
5
3.5
II
6
6
III
8
5
IV
8
5
V
8
6
VI
6
5
Pmax (mW)
No. 4
0.16
0.37
0.36
0.95
0.93
0.89
No. 3
0.22
0.43
0.29
0.69
0.92
0.85
FF
No. 4
0.43
0.54
0.45
0.61
0.64
0.61
No. 3
0.46
0.56
0.50
0.64
0.65
0.62
h (%)
No. 4 No. 3
3.3 4.2
6.1 7.7
4.2 5.8
11.7 13.6
14.8 18.5
11.7 14.1
where L is the length of stripe, Pm is the maximal generated
power, FF is the fill factor, and h is the energy conversion
efficiency.
The examples of illuminated I–V characteristics of the
stripes originated from the same epitaxial structure No. 7
and fabricated in IV and V technological cycles are shown
in Fig. 5. The doping profile of outgoing p+/p/n/n+ structure
No. 7 is presented in Fig. 2.
The results presented in Fig. 5 indicate that the open cir−
cuit voltage (VOC) reaches only about 0.4 V. This low VOC
value was attributed to relatively low concentration of major−
ity carriers in base and emitter. The weak effect of outgoing
epitaxial structures on VOC can be explained by low p and n
dopant concentration in active part of all investigated struc−
tures. Moreover, the deep part of the structure (from illumi−
nated surface) is very low illuminated and may cause dimi−
nishing of resulting value of the VOC. The data given in
Table 3 show that the proper technological operations im−
proved the conversion efficiency up to several percent.
Fig. 5. Illuminated I–V curves of stripes processed from epitaxial
structures No. 7 by means of technological IV and V cycles. The
doping profile of outgoing p++/p/n/n+ structure is presented in
Fig. 2. A and B denote different grinding conditions.
Opto−Electron. Rev., 19, no. 4, 2011
The energy conversion efficiency of about 19.0% and
the FF value equal to 0.70 were observed for samples series
V – 7A. Generally, for all stripes fabricated according to the
cycle denoted as V, the FF values were estimated above 0.6.
The satisfactory values of h and FF in connection with
insufficient open circuit voltage result probably from high
quality of epitaxial structures and relatively low concentra−
tion of majority carriers in n and p type epitaxial layers.
The chemical and plasma etching of stripe edges after
cutting operation improved PV cell performance. The etch−
ing processes caused significant reduction of surface recom−
bination effects which result on increasing PV parameters.
4. Discussion
In the EISC, the p−n junction plane is perpendicular to the
illuminated surface. So, the area of the p−n junction may be
many times higher than the area of illuminated surface. In
the proposed design, the p−n junction area is about 20–30
times higher than illuminated area. Incident light is guided
parallel to the junction plane inside a cell and generates
electron – hole pairs in the whole volume of the silicon
material in close vicinity to the junction defined by the
thickness of the epi−layers. So, generated minority carriers
can reach the p−n junction with the same probability inde−
pendently of the energy of incident photon if its energy is
higher than silicon energy gap Eg. Consequently, photons
with the energy only slightly higher than Eg may effectively
contribute to the PV effect, if the depth (from illuminated
surface) of the cell is high enough. In the proposed cell
design, this distance has been settled at 2–3 mm, taking into
account optimization of the measured cell external
efficiency.
The p−n junction area is many times higher than illumi−
nated area. So, under regular 1 sun illumination, the EISC
junction is working under low illumination level and den−
sity of current passing through the p−n junction is relatively
low. It creates a potential for working with concentrated
light. On the other hand, under 1 sun illumination, the
parameters of EISC like FF and open circuit voltage VOC
may be smaller than the same parameters for conventional
planar PV silicon cells under the same illumination.
The conversion efficiency of a PV cell defined as the
proportion of sunlight energy that the cell converts to elec−
trical energy may be confusing in case of EISC because the
area of illuminated p−n junction of EISC is many times
larger than illuminated cell surface. So, the conversion effi−
ciency per unit area of illuminated EISC surface may be
very high even when conversion efficiency per unit area of
the junction is small. Consequently, the conversion effi−
ciency per unit illuminated area of EISC may be higher than
for planar PV cells under illumination of the same light
power density, but the conversion efficiency per unit vol−
ume of EISC is usually lower. However, ability of EISC to
work with concentrated light may increase the conversion
efficiency per unit volume of the EISC cell material by
using effective light concentrator.
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J. Sarnecki
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Concept of epitaxial silicon structures for edge illuminated solar cells
Stripe geometry of the edge illuminated silicon epitaxial
solar cells is well fitted to the foil luminescent solar collec−
tors (LSC). The LSC consisted of polymer transparent sheet
with embedded organic dyes, quantum dots (QD) and rare
earth doped oxide nanocrystals has been investigated simul−
taneously at our Institute [10].
5. Conclusions
The presented results concerning the edge illuminated stripe
solar cell show that a CVD epitaxy is a proper technique to
fabricate them. The used technological operations (contact
deposition, etching, cutting and passivation of illuminated
surface of stripe edges) affecting PV parameters need at this
time optimization.
To explain our observations and the obtained results it
should be stated that:
in epitaxial structures, the thickness of p and n type layer
is much smaller than diffusion length of majority carrier
holes and electrons, respectively,
distribution (distance to the junction) of carrier pairs
generated by incident photons is independent of energy
(wavelength).
These properties are responsible for high amount of light
generated charge carriers passing through the p−n junction.
The relatively high value of power conversion efficiency for
the same best stripes was reached despite low open circuit
voltage.
Technological processes presented in this paper have
been used to create, in laboratory scale, the working models
of epitaxial edge illuminated PV cells. It should be noted
that the used thinning procedure by substrate grinding is
a silicon consuming process and such operation can only be
approved by the model developed in the laboratory
conditions.
The very promising energy conversion efficiency of the
investigated EISC structures justifies the developing thin−
ning methods which allow at least on partial preservation of
the substrate for the next epitaxial runs. An exfoliation from
porous silicon substrate is considered as an alternative
method for production of epitaxial PV cells. Such approach
may limit consumption of silicon substrate in EISC manu−
facturing process.
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490
Acknowledgements
The authors would like to express their thanks to Dr P.
Panek, D.M. Lipinski, and Dr K. Drabczyk from the Photo−
voltaic Laboratory (the Institute of Metallurgy and Material
Science Polish Academy of Sciences in Cracow) for help
with I–V characteristics and photovoltaic conversion mea−
surements and valuable discussions as well.
This work has been supported by the National Centre for
Research and Development within the research project NR
15−0030−04.
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