IDT74ALVCH162827
3.3V CMOS 20-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS
EXTENDED COMMERCIAL TEMPERATURE RANGE
IDT74ALVCH162827
3.3V CMOS 20-BIT
BUFFER/DRIVER WITH
3-STATE OUTPUTS AND
BUS-HOLD
FEATURES:
DESCRIPTION:
–
–
–
0.5 MICRON CMOS Technology
Typical tSK(0) (Output Skew) < 250ps
ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
– 0.635mm pitch SSOP, 0.50mm pitch TSSOP,
and 0.40mm pitch TVSOP packages
– Extended commercial range of – 40°C to + 85°C
– VCC = 3.3V ± 0.3V, Normal Range
– VCC = 2.7V to 3.6V, Extended Range
– VCC = 2.5V ± 0.2V
– CMOS power levels (0.4µ W typ. static)
– Rail-to-Rail output swing for increased noise margin
Drive Features for ALVCH162827:
– Balanced Output Drivers: ±12mA
– Low switching noise
This 20-bit buffer/driver is built using advanced dual metal CMOS
technology. The ALVCH162827 device provides high-performance bus
interface buffering for wide data/address paths or busses carrying parity.
Two pairs of NAND-ed output enable controls offer maximum control
flexibility and are organized to operate the device as two 10-bit buffers or
one 20-bit buffer. Flow-through organization of signal pins facilitates
ease of layout. All inputs are designed with hysteresis for improved noise
margin.
The ALVCH162827 has series resistors in the device output structure
which will significantly reduce line noise when used with light loads. This
driver has been designed to drive ±12mA at the designated threshold
levels.
The ALVCH162827 has “bus-hold” which retains the inputs’ last state
whenever the input bus goes to a high impedance. This prevents floating
inputs and eliminates the need for pull-up/down resistors.
APPLICATIONS:
• 3.3V High Speed Systems
• 3.3V and lower voltage computing systems
Functional Block Diagram
1 OE 1
1 OE 2
1A 1
1
2 OE 1
56
2 OE 2
55
2
2A 1
1Y 1
TO N INE OTHER C HANN ELS
28
29
42
15
2Y 1
TO N INE OTHER C HANN ELS
EXTENDED COMMERCIAL TEMPERATURE RANGE
MARCH 1999
1
c
1999 Integrated Device Technology, Inc.
DSC-4567/1
IDT74ALVCH162827
3.3V CMOS 20-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS
EXTENDED COMMERCIAL TEMPERATURE RANGE
PIN CONFIGURATION
ABSOLUTE MAXIMUM RATING
Symbol
VTERM(2)
1Y 2
3
54
1A 2
TSTG
Description
Terminal Voltage
with Respect to GND
Terminal Voltage
with Respect to GND
Storage Temperature
GND
4
53
GND
IOUT
DC Output Current
1Y 3
5
52
1A 3
IIK
mA
6
51
1A 4
V CC
7
50
V CC
IOK
Continuous Clamp Current,
VI < 0 or VI > VCC
Continuous Clamp Current, VO < 0
± 50
1Y 4
– 50
mA
ICC
ISS
Continuous Current through
each VCC or GND
±100
mA
1 OE 1
1
56
1 OE 2
1Y 1
2
55
1A 1
VTERM(3)
1Y 5
8
49
1A 5
1Y 6
9
48
1A 6
1Y 7
10
47
1A 7
GND
11
46
GND
1Y 8
12
45
1A 8
1Y 9
13
14
2Y 1
15
SO56-1 44
SO56-2 43
SO56-3
42
1A 9
1 Y 10
2A 1
2Y 2
16
41
2A 2
2Y 3
17
40
2A 3
GND
18
39
GND
2Y 4
19
38
2A 4
2Y 5
20
37
2A 5
21
36
2A 6
V CC
22
35
V CC
2Y 7
23
34
2A 7
2Y 8
24
33
2A 8
GND
25
32
GND
2Y 9
26
31
2A 9
2 Y 10
27
30
2 A 10
2 OE 1
28
29
2 OE 2
xAx
xYx
– 0.5 to
VCC + 0.5
– 65 to + 150
V
°C
– 50 to + 50
mA
CAPACITANCE (TA = +25oC, f = 1.0MHz)
Symbol
CIN
Parameter(1)
Input Capacitance
Conditions
VIN = 0V
Typ.
5
Max.
7
Unit
pF
COUT
Output
Capacitance
I/O Port
Capacitance
VOUT = 0V
7
9
pF
VIN = 0V
7
9
pF
CI/O
NEW16link
NOTE:
1. As applicable to the device type.
FUNCTION TABLE
Inputs
Description
Output Enable Inputs (Active LOW)
(1)
Data Inputs
3-State Outputs
NOTE:
1. These pins have “Bus-Hold.” All other pins are standard inputs,
outputs, or I/Os.
2
(each 10-bit section)
Output
xOE1
L
xOE2
L
xAx
L
xYx
L
L
L
H
H
H
X
X
Z
X
H
X
Z
NOTE:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
Z = High-Impedance
PIN DESCRIPTION
Pin Names
Unit
V
NEW16link
1 A 10
2Y 6
Max.
– 0.5 to + 4.6
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or
any other conditions above those indicated in the operational sections
of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability.
2. VCC terminals.
3. All terminals except VCC.
SSOP/
TSSOP/TVSOP
TOP VIEW
xOEx
(1)
(1)
IDT74ALVCH162827
3.3V CMOS 20-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS
EXTENDED COMMERCIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Operating Condition: TA = – 40°C to +85°C
Symbol
VIH
VIL
Parameter
Input HIGH Voltage Level
Input LOW Voltage Level
VCC = 2.3V to 2.7V
Min.
1.7
Typ.(1)
—
Max.
—
VCC = 2.7V to 3.6V
2
—
—
VCC = 2.3V to 2.7V
—
—
0.7
VCC = 2.7V to 3.6V
—
—
0.8
Test Conditions
Unit
V
V
IIH
Input HIGH Current
VCC = 3.6V
VI = VCC
—
—
±5
IIL
Input LOW Current
VCC = 3.6V
VI = GND
—
—
±5
IOZH
High Impedance Output Current
VCC = 3.6V
VO = VCC
—
—
± 10
µA
IOZL
(3-State Output pins)
—
—
± 10
µA
VIK
Clamp Diode Voltage
VCC = 2.3V, IIN = – 18mA
—
– 0.7
– 1.2
V
VH
Input Hysteresis
VCC = 3.3V
—
100
—
mV
VCC = 3.6V
VIN = GND or VCC
—
0.1
40
µA
Quiescent Power Supply Current
Quiescent Power Supply
Current Variation
One input at VCC − 0.6V,
other inputs at VCC or GND
—
—
750
µA
ICCL
ICCH
ICCZ
∆ICC
VO = GND
µA
NEW16link
NOTE:
1. Typical values are at VCC = 3.3V, +25°C ambient.
BUS-HOLD CHARACTERISTICS
Symbol
IBHH
Parameter(1)
Bus-Hold Input Sustain Current
VCC = 3.0V
Bus-Hold Input Sustain Current
VCC = 2.3V
Bus-Hold Input Overdrive Current
VCC = 3.6V
75
—
—
– 45
—
—
VI = 0.8V
VI = 1.7V
IBHL
IBHHO
Max.
—
Min.
– 75
IBHL
IBHH
Typ.(2)
—
Test Conditions
VI = 2.0V
VI = 0.7V
45
—
—
VI = 0 to 3.6V
—
—
± 500
Unit
µA
µA
µA
IBHLO
NEW16link
NOTES:
1. Pins with Bus-hold are identified in the pin description.
2. Typical values are at VCC = 3.3V, +25°C ambient.
3
IDT74ALVCH162827
3.3V CMOS 20-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS
EXTENDED COMMERCIAL TEMPERATURE RANGE
OUTPUT DRIVE CHARACTERISTICS
Symbol
VOH
Parameter
Output HIGH Voltage
VCC
Test Conditions(1)
= 2.3V to 3.6V
IOH = – 0.1mA
VCC = 2.3V
VCC = 2.7V
VCC = 3.0V
VOL
Output LOW Voltage
Min.
VCC – 0.2
Max.
—
IOH = – 4mA
1.9
—
IOH = – 6mA
1.7
—
IOH = – 4mA
2.2
—
IOH = – 8mA
2
—
IOH = – 6mA
2.4
—
IOH = – 12mA
2
—
VCC = 2.3V to 3.6V
IOL = 0.1mA
—
0.2
VCC = 2.3V
IOL = 4mA
—
0.4
IOL = 6mA
—
0.55
VCC = 2.7V
VCC = 3.0V
Unit
V
V
IOL = 4mA
—
0.4
IOL = 8mA
—
0.6
IOL = 6mA
—
0.55
IOL = 12mA
—
0.8
NEW16link
NOTE:
1. VIH and VIL must be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table for the
appropriate VCC range. TA = – 40°C to + 85°C.
OPERATING CHARACTERISTICS, TA = 25oC
Symbol
CPD
CPD
Parameter
Power Dissipation Capacitance
Outputs enabled
Power Dissipation Capacitance
Outputs disabled
Test Conditions
CL = 0pF, f = 10Mhz
SWITCHING CHARACTERISTICS
Parameter
Propagation Delay
xAx to xYx
Output Enable Time
xOEx to xYx
Output Disable Time
xOEx to xYx
Output Skew(2)
VCC = 3.3V ± 0.3V
Typical
16
Typical
18
4
6
Unit
pF
pF
(1)
VCC = 2.5V ± 0.2V
Symbol
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
tSK(o)
VCC = 2.5V ± 0.2V
VCC = 2.7V
VCC = 3.3V ± 0.3V
Min.
1
Max.
4.4
Min.
—
Max.
4.4
Min.
1.5
Max.
3.8
1.4
6.3
—
6.2
1.6
5.1
1.7
5.9
—
5.2
1.8
4.7
—
—
—
—
—
500
NOTES:
1. See test circuits and waveforms. TA = – 40°C to + 85°C.
2. Skew between any two outputs of the same package and switching in the same direction.
4
Unit
ns
ns
ns
ps
IDT74ALVCH162827
3.3V CMOS 20-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS
EXTENDED COMMERCIAL TEMPERATURE RANGE
TEST CIRCUITS AND WAVEFORMS:
TEST CONDITIONS
PROPAGATION DELAY
Symbol
VLOAD
VCC(1)= 3.3V±0.3V
VCC(1)= 2.7V
VCC(2)= 2.5V±0.2V
6
6
2 x Vcc
VIH
2.7
2.7
Vcc
V
SAM E PHAS E
INPUT TRANSITION
VT
1.5
1.5
Vcc / 2
V
OUTPUT
VLZ
300
300
150
mV
VHZ
300
300
150
mV
CL
50
50
Unit
V
30
tPLH
tPH L
tPLH
tPH L
V IH
VT
0V
V OH
VT
V OL
V IH
VT
0V
OPPOSITE PHASE
INPUT TRANSITION
pF
NEW16link
ALV C Link
TEST CIRCUITS FOR ALL OUTPUTS
ENABLE AND DISABLE TIMES
V LOAD
V CC
500 Ω
(1, 2)
V IN
CONTROL
INPUT
GND
tPZL
V OU T
Pulse
Generator
D.U.T.
OUTPUT
SW ITCH
NORM ALLY
CLOSE D
LOW
tPZH
OUTPUT
SW ITCH
NORM ALLY
OPEN
HIGH
500 Ω
RT
DISABLE
ENABLE
Open
CL
ALV C Link
DEFINITIONS:
CL= Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse
Generator.
NOTES:
1. Pulse Generator for All Pulses: Rate ≤ 10MHz; tF ≤ 2.5ns; tR ≤ 2.5ns.
2. Pulse Generator for All Pulses: Rate ≤ 10MHz; tF ≤ 2ns; tR ≤ 2ns.
V LOAD /2
V LOAD /2
VT
V LZ
V OL
tPH Z
VT
V OH
V HZ
0V
0V
SET-UP, HOLD, AND RELEASE TIMES
DATA
INPUT
Switch
VLOAD
tS U
tH
tR EM
ASYNCHRONOUS
CONTROL
SYNCHRONOUS
CONTROL
Open
tS U
tH
NEW16link
INPUT
TSK
ALV C Link
(x)
V IH
VT
0V
tPH L1
tPLH1
PULSE WIDTH
V OH
OUTPUT 1
tSK (x)
V IH
VT
0V
V IH
VT
0V
V IH
VT
0V
V IH
VT
0V
TIMING
INPUT
GND
OUTPUT SKEW -
0V
ALV C Link
NOTE:
1. Diagram shown for input Control Enable-LOW and input Control
Disable-HIGH.
SWITCH POSITION
Test
Open Drain
Disable Low
Enable Low
Disable High
Enable High
All Other tests
tPLZ
V IH
VT
LOW -HIGH-LOW
PULSE
VT
V OL
tSK (x)
tW
V OH
VT
V OL
OUTPUT 2
VT
HIGH-LOW -HIGH
PULSE
VT
ALV C Link
tPLH2
tPH L2
tSK (x) = t PLH2 - tP LH1 or tPH L2 - tP HL1
ALV C Link
NOTES:
1. For tSK(o) OUTPUT1 and OUTPUT2 are any two outputs.
2. For tSK(b) OUTPUT1 and OUTPUT2 are in the same bank.
5
IDT74ALVCH162827
3.3V CMOS 20-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS
EXTENDED COMMERCIAL TEMPERATURE RANGE
ORDERING INFORMATION
IDT
XX
X
XXX
XXX
XX
Bus-Hold
Family
Device Type
Package
ALVC
Temp. Range
CORPORATE HEADQUARTERS
2975 Stender Way
Santa Clara, CA 95054
PV
PA
PF
Shrink Small Outline Package (SO56-1)
Thin Shrink Small Outline Package (SO56-2)
Thin Very Small Outline Package (SO56-3)
827
20-Bit Buffer/Driver with 3-State Outputs
162
Double-Density with Resistors, ±12mA
H
Bus-Hold
74
– 40°C to +85°C
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800-345-7015 or 408-727-6116
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6