Performance comparison of Hall Effect Sensors
obtained by regular bulk or SOI CMOS technology
Dr. Maria-Alexandra PAUN
Visiting Researcher
High Voltage Microelectronics and Sensors (HVMS) Group, Department of
Engineering, University of Cambridge, United Kingdom
Secretary, IEEE Switzerland ExCom
Chair, IEEE WIE Switzerland
Maria-Alexandra Paun - CAM
OUTLINE
 Different Hall cells have been integrated in both bulk and SOI
CMOS technology and analyzed in terms of their specific
parameters.
 The first one is XFAB regular bulk CMOS XH 0.35 µm and the
second one is XFAB SOI XI10 1 µm non-fully depleted.
 Geometry plays an important role in Hall cells performance. The
focus of this work is on the XL Hall cell.
 The most important parameters of a specific Hall cell, based on
both regular bulk and SOI structures, are evaluated through
three-dimensional physical simulations.
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Maria-Alexandra Paun - CAM
Hall Effect Sensors
A
Ibias
Ibias
B
L
D
VHall
t
y
(1)
V HALL  S A B
z
B
x
S
W
C
SA 
Gr H
 low-power applications
 current sensing
 position detection & contactless switching
3
nqt
I bias
(2)
Maria-Alexandra Paun - CAM
Hall Cells Design Selection
.
 Different 3D Hall sensors were integrated in both
regular bulk and SOI CMOS.
 They are all symmetrical and orthogonal structures.
 The geometry plays an important role in the sensors
performance.
G  1
16

valid if
4
2
 H2
8
  L 
  L 
exp  
 1  exp  
   1 
9
3
 2 W 
 2 W 
0 . 85  L / W  
and




0   H  0 . 45
(3)
Maria-Alexandra Paun - CAM
Hall Effect Sensors Measurements
 Measurements results on nine different Hall Effect
sensors in regular bulk CMOS
 Similar results expected soon for the SOI counterparts
Objectives: offset @ T=300 K < ±30 T & offset drift < ±0.3 T/°C
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Maria-Alexandra Paun - CAM
Single Phase and Residual Offset
 Cell polarization and the corresponding phases
Phases
Ibias
VHALL
Phase 1
a to c
b to d
Phase 2
d to b
a to c
Phase 3
c to a
d to b
Phase 4
b to d
c to a
 Single phase offset and residual offset
V out  V HALL ( B )  V offset
Offset
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residual ( 4 phase )

V P1  V P 2  V P 3  V P 4
4
(4)
(5)
Maria-Alexandra Paun - CAM
Offset measurements
 Measured for XL regular bulk CMOS, results expected
soon for XL SOI
cell 4
cell 5
cell 20
cell 21
cell 36
cell 37
cell 52
cell 53
Voffset, residual (V)
2.5E-06
2.0E-06
1.5E-06
1.0E-06
Magnetic equivalent offset (T)
3.0E-06
XL
5.0E-07
1.7E-20
-5.0E-07
0
2.5E-04
2.0E-04
1.5E-04
1.0E-04
0.0E+00
0.00 0.01 0.02 0.03 0.04 0.05 0.06
0.1 0.2 0.3 0.4 0.5 0.6 0.7
Ibias (mA)
SA (V/T)
3.0E-05
Vresidual (T)
XL
5.0E-05
3.5E-05
2.5E-05
2.0E-05
1.5E-05
1.0E-05
5.0E-06
0.0E+00
7
cell 4
cell 5
cell 20
cell 21
cell 36
cell 37
cell 52
cell 53
cell 4 (XL )
cell 5 (XL)
25 35 45 55 65 75 85 95
Temperature (˚C)
Maria-Alexandra Paun - CAM
Regular bulk vs. SOI CMOS technology
The sensors fabricated in SOI (Silicon On Insulator)
technology have obvious benefits, with respect to
the bulk Hall sensors.
higher magnetic sensitivity
less noise generation
possibility to use lower biasing voltage
smaller leakage current through the dielectric
enhanced radiation resistance etc.
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Maria-Alexandra Paun - CAM
The 3D Simulation of regular bulk Hall Cells
The XL structure follows the XFAB XH 0.35 fabrication process.
active n-well region: Arsenic doping
 Gauss profile implantation
 1.5*10+17 cm-3
Parameter
L (µm)
W (µm)
Contacts
dimension s (µm)
Value
43.2
19
18.3
electrical contacts
p-substrate: Boron doping
concentration of 10+15 cm-3
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The 3D model of XL regular bulk Hall cell
SOI CMOS technology
Maria-Alexandra Paun - CAM
 The stacking of the layers, according to a SOI XFAB XI10 fabrication
process.
The active silicon layer is found on top of the dielectric buried silicon
oxide (SiO2) layer, which is in its turn found on the silicon substrate, or
handle wafer.
DOPING CONCENTRATIONS IN THE SOI HALL CELL FABRICATION
Layer
10
Wafer (handle)
substrate
Dielectric
p-substrate in
active Silicon
layer
n-well in active
Silicon layer
Type
Numerical value
Si, p-doped
6.5 E+14 cm-3
(Boron)
Buried Silicon Oxide, Si02
Si, p-doped
(Boron)
1E+15 cm-3
Si, n-doped
(Arsenic)
5E+16 cm-3
Maria-Alexandra Paun - CAM
3D Simulations results (II)
XL SOI cell
0.1
SOI XL cell:
I-V characteristics
VHALL estimation
Sensitivity numerical estimation
XL SOI
Voutput (V)
0.08
Linear (XL SOI)
0.06
y = 42643x - 9E-05
0.04
0.02
0
0.0E+00
1.0E-06
2.0E-06
Ibias (A)
3.0E-06
V-I characteristics, SOI XL, Rinput=42 kΩ
XL SOI cell
0.003
0.0025
XL SOI
0.006
0.005
0.0015
0.004
y = 0.0247x + 8E-07
0.001
0.0005
0
0.0E+00 2.0E-02 4.0E-02 6.0E-02 8.0E-02 1.0E-01
Vbias (V)
Hall voltage vs. biasing voltage, SOI XL
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XL SOI
Linear (XL SOI)
SA (V/T)
VHALL (V)
Linear (XL SOI)
0.002
XL SOI cell
0.003
y = 0.0493x + 2E-06
0.002
0.001
0
0.0E+00 2.0E-02 4.0E-02 6.0E-02 8.0E-02 1.0E-01
Vbias (V)
Sensitivity vs. biasing voltage, SOI XL
Maria-Alexandra Paun - CAM
3D Simulations results (III)
2.5
XL regular bulk cell
XL regular bulk
2
Voutput (V)
Regular bulk XL:
I-V characteristics
VHALL estimation
Sensitivity numerical estimation
Linear (XL
regular bulk)
1.5
1
y = 2303.1x - 0.0141
0.5
0
0.0E+00
5.0E-04
1.0E-03
Ibias (A)
V-I characteristics, regular bulk XL, Rinput=2.2 kΩ
0.05
XL regular bulk cell
XL regular bulk
0.1
0.03
XL regular bulk
Linear (XL regular
bulk)
0.08
SA (V/T)
VHALL (V)
0.04
y = 0.019x + 0.0002
0.02
0.01
0
0.0E+00
0.06
Linear (XL
regular bulk)
y = 0.038x + 0.0003
0.04
0.02
1.0E+00
2.0E+00
3.0E+00
Vbias (V)
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XL regular bulk cell
VHall vs. biasing voltage, regular bulk XL
0
0.0E+00
1.0E+00
2.0E+00
3.0E+00
Vbias (V)
SA vs. biasing voltage, regular bulk XL
Maria-Alexandra Paun - CAM
Conclusions
 This work was intended to analyze the behaviour of the
XL Hall cell in both regular bulk and SOI CMOS
fabrication process, by performing three-dimensional
physical simulations.
 The Hall voltage, absolute sensitivity and input resistance
were extracted through simulations.
 With respect to equivalent devices fabricated in regular
bulk, the Hall devices built in SOI technology offer higher
absolute sensitivity.
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Maria-Alexandra Paun - CAM
References (selective list)
[1] Paun, M.A, Udrea, F., “SOI Hall cells design selection using three
dimensional physical simulations”, Journal of Magnetism and Magnetic
Materials, Volume 372, Issue 12, December 2014, pp. 141-146.
[2] Paun, M.A., Sallese, J.M., Kayal, M., “Evaluation of characteristic
parameters for high performance Hall cells”, Microelectronics Journal,
Volume 45, Issue 9, September 2014, pp. 1194-1201.
[3] Paun, M.A., Sallese, J.M., Kayal, M., “Comparative Study on the
Performance of Five Different Hall Effect Devices”, Sensors, ISSN 14248220, Vol. 13, Issue 2, 2013, pp. 2093-2112.
[4] Paun, M.A., Sallese, J.M., Kayal, M., “Temperature considerations on
Hall Effect sensors current-related sensitivity behaviour”, Analog Integrated
Circuits and Signal Processing: Vol. 77, Issue 3, pp. 355-364, 2013.
[5] Paun M.A., Hall Cells Offset Analysis and Modeling Approaches, PhD
Thesis, EPFL, Switzerland, 2013.
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Maria-Alexandra Paun - CAM
Acknowledgements:
The author, Maria-Alexandra Paun, wishes to
thank the Swiss National Science Foundation
(SNSF) from Switzerland for the promotion and
encouragement of the scientific research of
young doctors, respectively by providing the
funding for her postdoctoral fellowship at
Cambridge University.
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Maria-Alexandra Paun - CAM
Thank you for your
attention!
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