DISS.ETHNo. 13135
Rotary Switch
and
Current Monitor
Hall-Based
by
Microsystems
A thesis submitted to the
SWrSS FEDERAL INSTITUTE OF TECHNOLOGY ZURICH
for the
degree
of
Doctor of Natural Sciences
presented by
Ralph
Steiner Van ha
Dipl. Phys.
Born
ET H Zürich
August 2. 1966
Citizen of Winterthtir. Switzerland
accepted
on
the recommendation of
Prof. Dr. H. Baltes, examiner
Prof.
em.
Dr. Dr. h.
c.
Simon Middeihoek, co-examiner
Dr. R. Voet, co-examiner
1999
Contents
Abstract
1
Zusammenfassung
2
1 Introduction
3
3
1.1 State of the Art
1.2
1.3
1.4
4
Magnetic Field Sensors
Scope of Thesis
Major Results
8
9
11
1.5 References
2
Physics of Integrated CMOS
2.1
Galvanomagnetic
2.2
Input
2.3 The
2.4 The
of the
18
Effects
Resistance and
Theory
Theory
17
Hall Devices
24
Sensitivity
Spinning
39
Current Method
54
of the Double-Hall Sensor
59
2.5 References
65
3 Lateral CMOS Hall Devices
3.1
Design
3.2 Electrical and
3.3
3.4
65
Considerations
Magnetic
Implementation
Implementation
70
Performance
Cont.
of Offset Reduction
by
of Offset Reduction
Using
a
Spinning
Current
Double-Hall Sensor
77
89
93
3.5 References
l
4 Vertical CMOS Trench-Hall Devices
4.1
Design
102
Technology
4.3 Electrical and
5
96
Considerations
4.2 Fabrication
95
Magnetic
Performance
108
4.4 References
111
Applications
113
5.1 Current Monitor
114
5.2 Wear-free
Angle
127
Measurement
131
5.3 References
135
6 Conclusion and Outlook
6.1 Conclusion
135
6.2 Outlook
138
Appendices
139
A.l Basic Field
A.2 List of
A.3
Equations
and Unit Conversions
140
Symbols
Physical
139
143
Constants
A.4 List of Abbreviations
144
Acknowledgments
145
Curriculum Vitae
147
n
Abstract
development
This thesis reports the
switch and
a
monitor. These
current
commercial TC
exploiting
established
evant to
an
the
of
voltage.
reduction
a
using
double-Hall
device
The
the
technique
Hall
and
are
treated in
spinning
and
general
for the
sensor
detail: offset
more
current
numerical model is
associated
trench-Hall devices, sensitive to
chip surface, respectively,
of 200 to 300 V/AT and
to
methods
a
discussed. This includes
through
presented
to
use
of
predict
of the thesis deals with the fabrication and characterization of
sensors
cross-sensitivity
are
aspects rel¬
sensors, theoretical
from fabrication process simulations.
performance
CMOS
packaging solutions,
compensation techniques
as
of continuous
Furthermore,
sensor.
remaining part
well
compensation
Two
magnetic
Hall de\ ices
as
In
have been realized.
superior performance
integrated
of merit
performance figures
offset
with
chip-surface.
the
to
rotary
effective batch fabrication with well
cost
introduction to the field of
design
parallel
is utilized. Combined with dedicated
reliability
inexpensive microsystems
Following
technology,
or
a
CMOS Hall
microsystems employ integrated
perpendicular
devices sensitive to fields either
microsystems:
of two Hall-based
are
application
magnetic
presented.
fields
demonstrators.
perpendicular
Both devices
yield
from 0.01 to 0.1 % in
linearity
out-of-plane magnetic
a
and
Lateral
parallel
excellent
and
to the
sensitivity
±0.3 T range. The low
induction makes trench-Hall devices
well suited for vector field measurements.
The first demonstrator
reported
trench-Hall device. The
application
accuracy in
a
harsh environment
perature range. The
to an
Bx
axis of rotation.
and
ances
measurement
shows
a
rotary switch
is intended for
involving
principle implies
By detecting
over
360°. The second
mass
loading
manufacturing.
lated current detection up to 20 A with
an
1
and
a
high
wide tem¬
permanent magnet attached
robustness
magnetic induction
against
mechanical toler¬
demonstrator exhibits
application example
using lead-on-chip packaging technology.
with commercial 1C
a
measurement of
the two components of the
BY parallel to the sensor chip surface,
of the packaging is obtained. The
smaller than 0.2°
angular
mechanical
the vertical
employing
is
a
a
resolution
current
monitor
The entire system fabrication is in line
The system features
galvanically
accuracy of 150 mA at 100 Hz.
iso¬
Zusammenfassung
Zusammenfassung
Im Zentrum dieser Arbeit stehen zwei
Mikrosysteme:
Ein Drehschalter und ein
Stromsensor, deren Messprinzip auf integrierten Hall Sensoren beruht. Die Hall
Sensoren, hergestellt in einem CMOS Fabrikationsprozess, weisen eine Sensitivität senkrecht oder
Einführung
delt
Aspekte
es
sich
zur
um
set-Reduktion.
Spinning
in das Gebiet der
Funktion
allgemeine
hoher
zur
werden theoreti¬
um
Verfahren der Off¬
Daten
Prozess-Simulationen
aus
von
Doppel-Hall
vorgestellt,
Sensor.
welche als
benötigt.
Herstellung und Charakterisierung
der
Anwendung.
Der verwendete laterale
200 V/AT senkrecht
von etwa
zur
Chipober¬
(Linearität: 0.01% für ±0.3T). Der Trench-Hall Sensor reagiert auf
magnetische
ermöglicht
eine
Hall Sensoren diskutiert. Dabei han¬
Simulation eines Hall Sensors
Hall Sensor weist eine Sensitivität
(Linearität:
erlaubt
von
Zuverlässigkeit.
Kenndaten der Sensoren und
CMOS Hall Sensoren, sowie deren
fläche auf
Verwendung
Magnetfeldsensoren
integrierten
von
Weitere Teile dieser Arbeit handeln
Felder in der
mit einer Sensitivität
Chipebene
0.1% für +0.3T). Die starke
dabei eine
Vektormessung
des
In dieser Arbeit wird ein Drehschalter
basiert.
Zur
gemessen, das
von
einem
360°. Dabei wird die
Temperaturänderungen
Stromsensor
wurde. Der gesamte
wird
Messauflösung
mit
dem
ter-
Herstellungsmethoden.
bis
zu
Mit dem
Genauigkeit
welcher auf Trench-Hall Sen¬
Richtung
des
Magnetfeldes
auf einer Achse erzeugt wird.
kleiner 0.2° über einen Bereich
beeinträchtigt.
o
Weiter wird ein
'Lead-On-Chip'-Verfahren hergestellt
150
gemessen werden.
Einflüsse,
deckt sich mit kommerziellen Halblei¬
vorgestellten
von
300 V/AT
der Sensitivität
weder durch äussere mechanische
Herstellungsprozess
20 A, mit einer
die
oder Gehäusetoleranzen
der
ca.
Magnetfeldes.
Permanentmagneten
Auflösung
vorgestellt,
von
Richtungsabhängigkeit
vorgestellt,
Winkelbestimmung
Diese Methode erlaubt eine hohe
von
Die
Current'-Verfahren und das Verfahren mit einem
Randbedingung lediglich
soren
auf.
Reduktionsverfahren werden erläutert: das 'Continuous
Folgende
Weiter wird die Theorie
von
gleichzeitig
Massenfabrikation bei
kostengünstige
Nach einer
Chipoberfläche
zur
massgeschneiderten Verpackungslösungen
und
IC-Technologie
sche
parallel
mA
Stromsensor können Ströme
bei 100 Hz,
galvanisch getrennt
1.1 State of the Art
1 Introduction
1.1
State of the Art
microsensors offer
Integrated
features such
unique
cost effective sensor batch
as
fabrication, miniaturization with unique reliability, and co-integration of dedi¬
cated electronics
[1,2). Integrated
ago with the introduction of
ogy. More
of
photodiodes
recently piezoresistors
in silicon [4].
piezoresistivity
ing [5]. system
cost
sensor
and Hall devices
By
use
of ÏC
have
has been
post-processing steps,
formed after
between the
facturing
already
become routine
discovery
manufactur¬
a
fabrica¬
with additional
[6. 7]. Preferably, additional
deposition,
thin film
or
requires
micromachining
pushed
a
per¬
are
[8]. Also, CMOS
close collaboration
features for
new
of different materials
been demonstrated [12]. The
on
a
with
sensor
new
materials
design.
of additional
common
IC
manu¬
micromachining
die manufactured in
deposition
piezoelectric films, in line
well established
to
and surface
technologies [10, 11]. Also,
enabling
technology
IC process sequence
for microtransdueers have been
in the IC process
and
regular
sensor
technol¬
and the IC manufacturer [61.
designer
standards. Bulk
troplating
etching
has been demonstrated [9| but this
sensor
Technologies
of the
for
the
gradually improved. Here,
demonstrated
which include
completion
pre-processing
successfully
[3] in silicon
following
technology
tion scheme which combines conventional CMOS IC
processing steps
has been initiated decades
have been introduced
performance
and
development
As
a
an
are
have
introduced
example,
elec¬
CMOS process has
layers, such
technologies,
as
polymers
has proven to be
feasible [13, 14].
IC
sensors are
their
potential
superior
for
in many aspects
growth
compared
in the market
place,
industry
and academic institutions is critical.
engaged
in many aspects of
yet
to be
microsystems
fully exploited [16].
promising methods
versity research,
are
recruitment of
new
solutions. Due to
increased research activities in
Evenlhough
research [15],
the latter is
technology,
has
three
start-up companies spinned-off from uni¬
qualified engineers by companies,
in research
actively
technology transfer
In order to enhance the transfer of
suggested:
sity-industry collaboration
to discrete
projects [ 17].
and univer¬
1 Introduction
Field Sensors
Magnetic
1.2
A magnetic
applications magnetic
detect
change
a
or
sensors
displacement,
or an
categories:
arc
used
disturbance in the
physical signal. Examples
broad
magnetic field into
sensor converts a
of
low-field
magnetic
bias field transducers (mT) (see
by
field caused
include
Magnetic
position,
sensors can
(nT-range),
sensors
19). They
tandem transducers [18,
as
physical signals
electrical current.
electrical signal. In most
an
a
non-magnetic
linear and
angular
be classified in three
Earth's field
sensors
(ptT), and
Fig. 1.1) [20].
applications, magnetic sensing provides a means of rugged, reliable, and
maintenance free technology compared to other sensing techniques. Magnetic
In many
a
sensors
exploit
a
broad range of
many aspects, such
choice of
a
as
particular
of the various
frequency
and
physics
chemistry disciplines.
are
response, size, and power, that could affect the
concept best suited for
sensor
There
application.
an
A
description
types is described in the following.
sensor
Low-Field Sensors
The
ence
family
of the low-field
devices,
search coil
includes
sensors
sensor
It is based
on
is the
superconducting quantum interference
cooling
transition temperature. In such materials,
which is not
subject
to any
superconducting ring,
The
field. The
resistance.
sensor can
respond
to
field induces
magnetic
as
a
material below its
Josephson
a
a
current,
contact in the
function of the
applied
changes in the magnetic flux in the
10~13T.
fiber-optic magnetometer employs
field, causing
an
glass
[22, 23]. One of the
has
a
change
fibers that
are
arranged
two fibers is coated with
under the influence of
detection range from
optically pumped magnetometer
lines of atoms
two
a
a
as
a
mag¬
mag¬
interference pattern at the interferometer output. The
fiber-optic magnetometer
spectral
a
superconducting
By introducing
netostrictive material whose dimensions
The
a
the current starts to oscillate
Mach-Zender interferometer
netic
and
magnetometers.
device (SQUID) [21].
order of
interfer¬
fiber-optic magnetometers, optically pumped magnetometers,
The most sensitive low field
magnetic
superconducting quantum
are
split
when
is based
placed
4
in
on
a
10"l()
to
10° T.
the Zeeman effect where the
magnetic
field. Here,
light
pass-
1.2
Sensor
Magnetic
Detectable Field
Technology
!
Low-Field Sensors
Range [Tesla]
|()6
10-4
1()2
1()0
S
j
i
i
j
!
I
101210101(>8
[
1
'
'
\
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{
l-L'~ U1
-
-
|
Anisotropic Resistivity
-
"*
«
i
1
j
1
!
j
Sensor
[
1
Hall-Effect Sensor
Electric Current
magnetic
field
size and
sensor
or
high
power
_Z=IZ]
1
:
-
^
:
.
!
i
i
j
j
S
i
1
[==::=;
s
i
i
and their detection
different
groups
capabilities [20j.
of field ranges: low field (nT),
field (niT).
helium gas
strength.
.
,„
!
I
technologies'
divided iti three
cesium
„—.
»fTL-"^«
i
|
Field
and bias
i
\
Magnet
(/LIT),
j
»
tl—
I
Field Sources
sensors are
i
1
Magnetoresistive
Magnetic
1
l
L_
1
Magnetic
i
!
i
j
Magneto-Optical
large
!
—j
_
Magnetodiode
the
~]
S
Magnetotransistor
Earth's field
—~
1
—
Bias Field Sensors
ing through
—"
Cr
Flux Gate
The
"
It'll
I
1.1:
*
——
Earth's Field Sensors
Fig.
—'
:
Search-Coil
Permanent
i
|
\
Nuclear Precession
2
,,
«.
-J
1
Optically Pumped
Earth's
|
'
'
Fiber-Optic
Magnetic
JO4
102
!
Squid
Giant
Field Sensors
The
undergoes
different
absorption depending
optically pumped magnetometer
consumption.
10~4T|24].
5
It has
a
on
suffers from
detection range form
10"l2
a
to
I Introduction
The nuclear
precession magnetometer exploits the
of the nuclei of atoms in
angular
along
hydrocarbon fluid such
the protons in the fluid
momentum
off the field for
Switching
netic field.
a
magnetic field.
the ambient
nitude of the field, which
can
The search-coil magnetometer
through
flux
magnetic
minals.
Typically,
change
of
the coil is
current
a
improved by
magnetic flux, fields
as
temporarily aligned by
alignment,
Faraday's
coil induces
a
benzene. Due to their
as
range of 10"
a
uses
be
magnetic field
a
the protons
begin
precession frequency depends
The
be in
can
response to
weak
a
as
to 10
to
on
a
own
mag¬
precess
the mag¬
T.
law of induction. A
which generates
a
in the
change
voltage
at its ter¬
ferromagnetic core. Depending
ÎO"1" T can be detected [25].
on
the
Earth's Field Sensors
Magnetometers
toresistive
causing
sensors.
change
a
resistivity.
but
magnetic
The
tion and
a
magnetic
core,
coil
are
wrapped
which oscillates between
early
with the
\31, 32].
pick-up
coil. The
on
of
barberpole
a common
points
magnitude
are
Bias
sensors
realized in
Magnetic
Most industrial
magnetic
a
[28].
magnetic
field.
An excita¬
high-permeability
a
ferro¬
a
second
of the second harmonic varies lin-
detection range from 10
available in
(bulk) macroscopic
to
10"" T
form and
[33, 34]. Recently, flux
commercial CMOS process have been
reported [35).
Field Sensors
applications
make
use
of permanent magnets
field [36, 37]. Common bias field
sible devices which fit this group of
diodes,
the
of saturation. An external mag¬
in microfabricated versions with dedicated electronics
gate
on
on
structures
oscillating signal generating
applied magnetic field, with
Flux gate magnetometers
first observed in
flux gate magnetometers.
around
netic field disturbs the symmetry in the
harmonic at the
use
was
quadratic dependence
an
navigation systems rely
pick-up
the
by
a
angular dependence
10~l ] to 10~2 T [29. 30].
these structures show
based
magnetoresistive effect
be linearized
can
field deflects the current in the material
This effect shows
[26, 27].
The detectable field range is from
Compass
resistance summarize the group of magne-
anisotropic
An external
in
magnetic field,
Additionally,
on
materials
ferromagnetic
the
based
magneto-optical
sensors,
strengths
sensors
are
are
6
of the
in the order of mT. Pos¬
magnelotransistors, magneto-
giant magnetoresistive
devices.
as a source
sensors,
and
Hall
1.2 Magnetic Field Sensors
A
magnetotransistor is
two
a
An external
nology [38, 39].
fabricated, e.g., in CMOS tech¬
collector transistor
induction
magnetic
causes an
imbalance in the col¬
lector currents due to the Lorentz force. The
magnetotransistor
netic induction down to 10"^ T.
the offset,
Recently,
even
major
a
detect mag-
can
drawback of the
device, has been drastically reduced [40. 41].
A
magnetodiode
are
separated by
bounded
by
essentially
is
of intrinsic
region
a
high-injection conditions,
region.
phire technology
with
a
sensitivity
Magneto-optical
tion of
or
doped silicon.
low
n-regions
region
This intrinsic
surfaces with different surface recombination rates.
two
in the intrinsic
semiconductor diode where its p- and
a
the Lorentz force leads to
general, magnetodiodes
In
a
are
modulation of
exploits
sensor
polarization
of
the
on
sap¬
technology
reported [44].
Faraday polarization
light changes
Under
conductivity
fabricated in silicon
[42, 431. However, de\ ices manufactured in CMOS
of 25 V/T have also been
is
when
effect where the direc¬
certain
travelling through
magnetic
materials [45].
Giant-magnetoresistive magnelosensors show
depending
70%
the
on
devices consist of
magnetic
of
a
field.
scattering
at
can
be altered
by changing
free
path
Layers
with
parallel magnetic
the interfaces.
They
of electrons in the
In most industrial
are not as
applications,
high, Hall-effect
devices [48]. Hall
offset
sensors
compensation
over
dedicated electronics.
have
a
are
where the
are
requirements
easy in terms of
by
an
electric
current
in
are
perfecll}
the
a
few niT,
can
or
voltage
applications requiring
7
field
[47].
magnitude
giant magnetoresistive
be
allow
magnetic
magnetic
in
an
dynamic
co-integrated
A-range. Their operation
a
nm
for the field
suited to detect the
Lorentz-deflection of carriers which generates
tion to the current flow. In
be smaller than the
operation, they
small, and
external
an
path, and, therefore,
must
be used instead of
their life-time,
They
free
magnetic
lower likelihood
a
which is smaller than 10
layer,
sensors can
have
The
non-ferromag¬
in the
parallel by
to
mean
given layer
a
thin
a
alignment
moments
longer
permanent magnet, which is in the range of
ated
the
ferromagnetic layers from antiparallel
decrease in resistance. The thickness of
mean
[46]. Giant magnetoresistive
field
ferromagnetic layers, separated by
conducting layer,
moments of the
of resistance up to
large change
ferromagnetic/non-ferromagnetic multilayer system.
a
resistance of two thin
netic
applied magnetic
a
field of
a
fields gener¬
is based
orthogonal
strength
with
on
the
direc¬
in the range of
1 Introduction
mT, the
integrated
Hall
is the best candidate in terms of overall
sensor
perfor¬
mance.
Integrated magnetic
field
for standard silicon IC
ciated with IC
commercial
field
lent reviews
which
In
particular,
silicon
on
magnetic
explains
can
on
exploit
all the
provided
advantages
asso¬
the intensive research effort and their
technology, integrated magnetic
highest reliability
at minimum cost.
given
in
[18, 48
development
of
integrated magnetic
sensors are
to
Excel¬
53].
of Thesis
the Hall effect.
Although
previous
many
research results
be found in literature, many aspects associated with the
CMOS
ects
of materials and processes
because of IC
This thesis aims to contribute to the
based
use
Such devices
have been boosted to the
Scope
1.3
make
technology.
technology,
success.
sensors
sensors
technology
have been
such as, geometry
this
on
topic
implementation
This work, therefore,
neglected.
sensors
emphasizes
in
asp¬
non-idealities and their
optimization, CMOS-specific
compensation, and, finally, packaging concepts suited for batch fabrication. Fur¬
thermore, work
sensitive to
on
process
magnetic
inductions
satisfyingly
to date. Such a
ments on a
single chip
parallel
was
presented
to the
configuration
to
embedded into
an
can
realize
chip surface,
problem
a
be
European
dynamic offset
should
to
were
motivated
by
a sensor
for best
solved
measure¬
compensa¬
ESPRIT
project together
subjects
with other
treated in
the issues relevant to commercialization. This work
help application designers
design
not
outstanding.
Universities and industrial partners. Therefore, many of the
this work
structures
sensor
allows multidimensional field
and in combination with, e.g.
tion, the performance of Hall devices
This thesis
is
technology
to understand
the
performance, particularly
discussed.
8
physics
of Hall devices and
for the
sample applications
1.4
1.4
Major
Greek
Results
Description of the
A Numerical
ctoss
Performance of
layout
ical model
highly degrade
the device
Offset Reduction
f24
/j 4
=
=
concerning
by
the Continuous
A
are
10
p:T,
separated
which
from the
corresponds
contact
periodic
to a
theoretically.
Current Method
i.e.
a
Hall device is the
the output
compensation
voltages,
offset
was
voltage
and may
plate
is
A
generated by
Residual offsets
fraction of the earth's
magnetic
change
spinning
currents
the almost constant Hall
voltage.
zero
dynamic
periodic biasing
two
at
high
voltage depends
developed.
in the Hall
superimposing
be
Further¬
geometry.
physical properties
current vector
can
numer¬
operating
the device life-time. A method for
offset
resulting
wide
a
induction. This offset
various
over
From the
opti¬
which describes the
over
of its
drawback of
voltage,
magnetic
on
[54, 55].
developed
treated
Spinning
major
offset
/0 sin((p)
CMOS Hall device. A
device
a
an
mechanical stress and temperature effects, which
performance,
if) COS(cp)
a
independent
range
non-idealities
of
was
behavior of
Hall Device
a
have to be considered for
Many aspects
Hall device
mized
more,
Results
Major
voltage
are
below
field.
The Double-Hall Sensor
The offset
voltage
of the double-Hall
compensated by design [56].
The
sensor
sensor
is
con¬
sists of two single Hall devices sharing the
same
by
active
region.
The
sensor
the difference of the output
single
devices.
but their
They
magnetic
signal
voltages
given
of the
have almost
equal offsets
response is of
opposite sign
due to the structure symmetry. In
Hull
is
particular
the
temperature coefficient of the offset voltages
are
equal
9
because
they originate
from the
same
1 Introduction
active
The double-Hall
region.
offset reduction
regime resulting
in
an
of
implementation
allows the
sensor
simple
a
in-expensive magnetic microsystem.
Vertical Trench-Hall Devices
A novel vertical Hall device sensitive to mag¬
netic induction
parallel
The
developed [57, 58].
region
active
eral
comparable
is
Hall
device exhibits
tivity below
rication
trenches
active lesion
means
of the
spinning
current
0.2%
enables
front-end
chip. Additionally,
dynamic
the
Monitor and Wear-Free
the
trench-Hall
offset
the
on
sensor
same
bears the
compensation by
The trench-Hall device
Systeme
of
co-integration of
circuitry
CMOS
technique.
two
the full circle. The fab¬
over
and
for
by
conventional lat¬
vertical
sensor
potential
is defined
outstanding w-cross-sensi-
technology
in close collaboration with Austria Mikro
Applications: Current
an
to the
was
oriented
performance
The
device.
surface
vertically
sensor
The
trenches.
parallel
sensor
of the
chip
to the
developed
was
International AG.
Angle
Measurement
A compact CMOS current monitor system for
galvanically
insulated current measurement is
presented
[59|.
is
It
lead-on-chip technology
sensor
for
chip
The
high
volume
inexpensive
including packaging.
was
shows
wear-free
angle
trench-Hall device with
tion is realized.
arranged
ments
presented systems,
demonstrated with
of ±10 A
a
With the
System
sensors on
the
a
a
non-linearity
permanent magnet,
electronics
chip.
flow
of the
<±0.3%. A further
can
be
Such
a
of the automothe industrv.
10
a
rotary switch with
co-integrated
system meets,
with two
e.g..
allows
sensor
current measurement
in
used
chips.
memory
fabrication
production
usually
a
chip
range
application
the vertical
system [57]. Combining
measurement
same
mass
which is
packaging of
recommended
with
packaged
a
0.2° resolu¬
orthogonally
the harsh
require¬
1.5 References
1.5
[I]
References
P. M. Sarro, "Sensor
technology strategy
in silicon," Sensor and Actuators
A, vol. 31, p. 138, 1992.
[2]
[3]
K.
Najafi,
tor
Sensors, S.M. Sze, ed.. .lohn
G.
Bosch, "A Hall device in
K.D. Wise, and N.
Najaft, "Integrated sensors,"
Wiley
an
&
in Semiconduc¬
Sons, New York, p. 473, 1994.
integrated circuit," Solid-State Electron.,
vol. 11, p. 712, 1968.
[4]
CS. Smith, "Piezoresistive effect in
germanium
and silicon,"
P/iys. Rev.,
vol. 94, p. 42, 1954.
Gargini, .1. Glaze, O. Wiliams, "Roadmap
Technology, vol. Jan./98, p. 73, 1998.
[5]
P.
[6]
H. Baltes, "CMOS
as
sensor
technology,"
to
the
future," Solid State
Sensor and Actuators
A, vol.
37-38, p.51, 1993.
[7]
H. Baltes, O. Paul, J.G. Korvink, M. Schneider, J. Buehler, N. Schnee-
berger,
J.
D.
Jaeggi,
R.
A. Haeberli, M.
no.
systems."
Steiner, Th. Olbrich. F. Kroener,
Electron Device
[II]
S. Middeihoek, S.A. Audet, "Sensor
in Silicon Sensors, Delft
M. Allan,
"Polyimide-based
plated microstructures,"
Digest of
International
New York, p. 125, 1989.
technology: micromachining technol¬
University Press. Delft, p. 295. 1994.
process for the fabrication of thick electro¬
Technical
Digest of Transducers '93,
C. Cornila, A. Hietiemann. R.
Noetzel. U. Weimar, and W.
Baltes, "Tn-plane
p. 479, 1998.
Heuberger, Mikromechanik, Springer,
A.
ogies,"
Sensor and Materi¬
R. Baresch, and H.
Meeting (IEDM '98),
[10]
[13]
Arx. and
6. p. 331, 1997.
sensitive vertical trench-Hall device," Technical
[12]
von
Meeting (IEDM '96), p. 521, 1996.
H. Baltes, "CMOS micro electro mechanical
als, vol. 9,.
[9]
Hornung,
Funk, "IC MEMS microtransducers," Technical Digest of International
Electron Device
[8]
P Malcovati, M.
p. 60, 1993.
Lenggenhager, P Malcovati, H. Baltes, G.
Gocpel, "Capacitive sensor in CMOS technol-
11
1 Introduction
ogy with
polymer coating,"
Sensor and Actuators B, vol. 24-25, p. 357,
1995.
[14]
[ 15]
Vellekoop, "A smart
fluid properties," Ph. D.
M. J.
lamb-wave
of
Thesis, Delft
sensor
system for the determination
University Press, Delft,
1994.
H. Baltes, "Future of microtransducers," Sensor and Actuators A, vol. 56,
p. 179. 1996.
[16]
S. Middeihoek,
"Quo vadis silicon sensor?" Sensor and Actuators A, vol.
41-42, p. I, 1994.
[ 17]
H. Baltes, "Is
no.
[18]
technology transfer possible?"
6, p. 313, 1998.
H. Baltes. R.
Castagnetti, "Magnetic
S.M. Sze, ed., John
[19]
Sensor and Materials, vol. 10,
Wiley
&
Sons, New York, p. 206, 1994.
S. Middeihoek. S.A. Auclet, "Silicon
Sensors, Delft
con
sensors", in Semiconductor Sensors,
sensors
University Press, Delft,
for
magnetic signal",
in Sili¬
p. 226. 1994.
[20]
J.
Lenz, "A review of magnetic sensors", Proc. IEEE, vol. 78,
[21]
J.
Clarke, and R.H. Koch, "The impact of high temperature superconduc¬
tivity
on
SQUID magnetometers," Science,
no.
6, p. 973.
vol. 242, p. 217, 1988.
[22]
Dandridge. and G.H. Sigel, "Effects of non-linear magneto¬
strictive properties in a liber-optic magnetometer," Proc. Optical Fiber
Sensor Conf, Stuttgart, Germany, 1984.
[23]
J. E. Lenz, G. Mitchell, and CD. Anderson.
K. P. Koo, A.
design," Proceedings
SPIE Technical
"Fiber-optic magnetometer
Symposium, Arlington, 1984.
Walters, "Polarization of HeJ gas
by optical pumping." The Physical Review, vol. 132, no. 6. p. 2561, 1963.
[24]
F.D.
[25]
R.
Colegrove,
L.D. Schearer. and G.K.
Boll, and K.J. Overshott, Sensors: Magnetic Sensors, W. Goepel,
J.Hesse, J.N. Zemel (eds.). VCH Verlag, Weinheim, 1989.
[26]
R.S. Herbert, and L.J. Schwee. "Thin film
magnetoresistance magnetome¬
ter," Rev. Sei. Instrum., \ol. 37, p. 1321, 1966.
1.5 References
[27]
T. R. McGuire, and R.I. Potter,
magnetic 3d alloys,"
[28]
[29]
Kuijk, W.J.
magnetoresistive
K.E.
IEEE
van
"Anisotropic magnetoresistance in ferro¬
Trans. Mag., vol. 11, p. 1018, 1975.
Gestel and F.W. Gort er. "The barber
head." IEEE Trans.
U. Dibbern, "Sensors based
on
the
Magn., vol.
J
pole,
a
linear
1, p. 1215, 1975.
magnetoresistive effect,"
Setisor and
Actuators A, vol. 4, p. 221. 1983.
[30]
"Magnetic
U. Dibbern,
Field Sensors
Using
the
Magnetoresistive Effect,"
Sensor and Actuators A, \ol. 10, p. 127, 1986.
[31]
F. Primdahl, "The
fluxgate magnetometer," Journal of
Physics E:
Scientific
Instrumentation, vol. 12, p. 241, 1979.
[32]
Ripka,
P.
"Review of
fluxgate sensors,"
Sensor and Actuators A, vol. 33,
p. 129, 1992.
[33]
T.
Seitz, "Fluxgate
tors
[34]
S.
sensor
in
planar microtechnology,"
Sensor and Actua¬
A, vol. 21-23, p. 799, 1990
Kawahito, Y. Sasaki, M. Ishida, and Y. Tadokoro, "A fluxgate magnetic
sensor
with micromachined solenoids and
electroplated permalloy cores,"
Digest of Technical Papers of Transducers '93, p. 888, 1993.
[35]
M. Schneider, S.
Kawahito, Y Tadokoro, and H. Baltes, "High sensitive
CMOS micro fluxgate sensor," Technical
Device
[36]
CL.
Digest of International Electron
Meeting (IEDM '97), p. 907, 1997.
Chien, and CR. Westgate, The Hall Effect and
its
Applications,
Plenum Press, New York, 1980.
[37]
P.
Ripka, "Magnetic
sensors
for industrial and field
applications,"
Sensor
and Actuators A, vol. 41-42, p. 394, 1994.
[38]
L. Ristic, H. Baltes, T.
tion
magnetotransistor
Smy,
with
Filanovsky, "Surpressed
focused emitter injection and
and I.
deflection." IEEE Electron Device Tetters, vol. 8.
[39]
L. Ristic. T.
a
Sm}.
and H. Baltes, "A lateral
linear response to the
magnetic field,"
p. 1076, 1989.
13
no.
sidewall
injec¬
carrier double
9, p. 395. 1987.
magnetotransistor
structure with
IEEE Trans. Electron Dev., vol. 36,
1 Introduction
[40]
M. Metz, M.
Schneider, and H. Baltes. "Offset reduction in multicollector
magnetotransislors,"
Meeting (IEDM '96),
[41]
p.
Digest of International Electron Device
537, 1996.
M. Metz, M. Schneider, A. Haeberli, and H. Baltes,
and reduc¬
tion
Solid-State
of CMOS
Devices
[42]
Technical
Conference (ESSDERC '98). p. 184, 1998.
V.l. Stafeev, "Modulation of diffusion
length as a new principle of opera¬
Phys. Solid State, vol. I, p. 763, 1959.
tion of semiconductor devices," Sow
[43]
IEEE
magnetotransistor offset,"
"Analysis
European
E.l. Karakushan, and V.l.
Stafeev, "Magnetodiodes," Sow Phys. Solid State,
vol. 3, p. 493, 1961.
[44]
R. S.
field
tron
[45]
Popovic, H. Baltes, and F. Rudolf, "An integrated silicon magnetic
sensor using the magnetodiode principle." IEEE Transaction on Elec¬
Devices, vol ED-3 I,
G.W.
no.
and A.H.Rose,
Day,
3. p. 286, 1984.
"Faraday
effect
sensors:
the state of the art,"
SPIEProc. vol. 985, p. 138, 1988.
[46]
M. N. Baibach. et al., "Giant
netic
[47]
magnetoresistance of (00l)Fe/(001)Cr
superlattices." Phys. Rev. Lett., vol. 61, p.-2472, 1988.
C.H. Smith, and R.W. Schneider,
sensing:
[48]
R.
GMR," Proc. Sensors
Popovic,
"Expanding
Expo Boston,
the horizon of
mag¬
magnetic
p. 139, 1997.
"Hall-effect devices," Sensor and Actuators A, vol. 17, p. 39,
1989.
[49]
R.
Popovic,
vol. 5, W.
[50]
S. Kordic,
tors
[51]
and W.
Goepel,
Heidenreich, "Magnetogalvanic sensors," Sensors,
J. Hesse. J. Zemel
"Integrated
silicon
(eds.). VCH, Weinheim, 1989.
magnetic-field sensors,"
Sensor and Actua¬
A, vol. 10, p. 347, 1986.
H.P Baltes, R.S.
Popovic. "Integrated
semiconductor
magnetic
field
sen¬
sors," Proc. IEEE, vol. 74, p. 1107. 1986.
[52]
CS. Roumenin, "Solid
Actuators, vol. 2, S.
magnetic sensors," Handbook of Sensors
Middeihoek (ed.), Elsevier, Amsterdam, 1994.
slate
14
and
1.5 References
[53]
R.S.
Popovic,
B.E. Jones
[54]
R.
"Hall effect devices," The Adam
(ed.),
Adam
Hilger,
Hilger
Series
on
Sensors,
Bristol, 1991.
Steiner, A. Haeberli. F.-P. Steiner, Ch. Maier. and H. Baltes., "Offset
reduction in Hall devices
by
continuous
spinning
current," Sensor and
Actuators A, vol. 66, p. 167, 1998.
[55]
R. Steiner, A. Haeberli, F.-P. Steiner, and H. Baltes, "Offset reduction in
Hall devices
by
continuous
spinning current," Digest of
Technical
Papers
of Transducers '97, p. 381, 1997.
[56]
R.
Steiner, M. Schneider, and H. Baltes. "Double Hall
self-compensated offset,"
Device
[57]
R.
Technical
Meeting (IEDM '97),
Steiner,
et
p.
Digest of International
R.
Steiner,
Digest of
[591
Electron
al., "In-Plane sensitive vertical trench-Hall device," Technical
et
p. 479, 1998.
al, "Trench-Hall device with deep contacts," Technical
Transducers '99, Sendai,
R- Steiner, M.
Japan,
Schneider, F. Mayer,
"Fully packaged CMOS current
Digest of Technical Papers
IEEE
with
991, 1997.
Digest of International Electron Device Meeting (IEDM '98),
[58]
sensor
in press.
U. Muench, M.
monitor
Mayer, and H. Baltes,
using lead-on-chip technology,"
MEMS '98, p. 603, 1998.
1 Introduction
16
2 Physics of Integrated
CMOS Hall Devices
In
designing
is
an
Hall
abundance of
introduction to
many theoretical aspects have to be considered. There
sensors
important
literature available that
general semiconductor physics is,
details of semiconductor devices
devices
be found in [7 to
can
implementation
evant to the
The necessary basic
section
on
throughout
and the
an
topics
Hall
on
property of the Hall
given
in the
following
which also introduces the notation used
approximate analysis,
angle
the Hall
is defined. In
or
voltage
an
is
presented
advanced
analysis
scattering of the charge carri-
is treated.
from the fundamental semiconductor
describing
means
the
the deviation from
of conformai
junction
junction
an
field effect
Hall device
ideal Hall
[16] predicts only
using
the real
voltage,
use
14], correction factors
are
determined
Shockley theory
poor results. Therefore, the
doping profiles
of
a
Starting
by
device geometry is modified
of classic
the Hall device that
and the
6.
discussed.
are
plate geometry
mapping [ 14, 15]. Additionally,
equivalent circuit of
common-mode
an
a
equations [1.
field effect [f 6. 17]. The
effect is revisited
in
4], and
to
selected aspects rel¬
on
of the Hall effect [f 3] is
Next, input resistance and sensitivity of
by
in [1
of CMOS Hall devices.
of galvanomagnetic effects, the role of collision
ers
field. An
large
treated in [5, 6]. Particular
are
galvanomagnetic effects,
important
given
e.g.,
12]. This chapter will focus
knowledge
this thesis. In
this
covers
for the
junction
field
CMOS process. This results
predicts
sensitivity. Furthermore,
the
input resistance,
the above
properties
the
are
treated in terms of their thermal behavior.
The offset
voltage,
which
device, is covered in the
based
sensor
on
the
[19]
important
use
are
of
a
can
be considered
next two
continuous
as
the
major
drawback of
Hall
sections. Two novel offset reduction schemes
spinning
current
method j 18] and
introduced. Besides the basic considerations, all
for the continuous
a
spinning
current
17
method
are
given.
a
double Hall
physical
effects
These include:
2
Physics
of
geometrical
Integrated
errors,
junction field
in
complexity,
chapter
2.1
mechanical stress issues, and non-linearities
proof of feasibility
the
The Hall effect is
a
[I3j.
For
are
sensor
is treated
given.
Due to the
by experimental results
in
Magnetoresistance
an
acting
on
approximate analysis,
in the presence of
an
charge
mobile
electrons with
electromagnetic
field
a
a
given by
-qE-q[vxB].
=
Here, E denotes the electrical field,
induction. For
magnetic
with
silicon
n-type
(Ea, 0, 0)
=
where
l»w
carriers
(q\xnnEa>
However,
carriers towards
ary of the
is the
n
one
edge
of the
sample generates
a
applied
An
a
applied
long sample
electrical
of
field
(~\xflEa, 0, 0)
density /„ of the
an
applied magnetic field, is given by
majority carrier density in the n-type sili¬
sample.
B
=
=
(0. B, 0) forces
the
charged
The carrier concentration at this bound¬
Hall electric field
the Lorentz force
consider
we
of the electrons of vn
applied magnetic induction
FH balancing
tric field is
mobility.
and B the
The associated current
in the absence of
0, 0) where
an
velocity
(2.1)
charge velocity,
Fig. 2.1).
(see
drift
causes a
the
v
simplified analysis,
a
is the electron
u:,,
majority
force
double-Hall
from the
Effects
experience
FL
con.
a
manifestation of the Lorentz force
of ~q
particle charge
=
of
will be summarized
of the Hall Effect and
carriers in condensed matter
,/,;
use
arising
3.
Approximate Analysis
Ea
by
the basic concepts
whereby only
sense,
Galvanomagnetic
force
ices
effect. The offset reduction
generic
a more
CMOS Hall De\
FL.
In
a
EH
state of
=
(0, 0, EH) with
equilibrium
a
Hall
the Hall elec¬
given by
Eu=
-^f'
=
^
=
18
\i„[EaxB).
(2.2)
2.1 Galvanomagnetic Effects
width
w
contact M
thickness
/
-%r~
magnetic induction B
Fig.
2.1:
The Hall
effect
applied magnetic field,
trons,
Fi
the
in
B the
long sample of n-type
a
silicon.
Ea
denotes the
magnetic induction. vn the drift velocity of the elec¬
magnetic force, Jn the
current
density,
and
Ey
the Hall electric
field.
With reference to
the silicon
Fig. 2.1, placing
sample
allows
a
two contacts. M and
measurement
of the
Under the condition that the contacts
are
absence of
zero
a
Hall voltage
magnetic field (i.e.
can
be calculated
under
on
N,
at
the
corresponding
the
same
opposite
sides of
Hall
voltage VH.
equipotential line in the
offset conditions), the
corresponding
as
v
VH
where the
terms of
integral
is taken
Eqs. (2.2, 2.3)
=
along
the Hall
a
j En
path
\oltage
yh
ds
s
can
RH
=
19
(2.3)
connecting
be
IB.
the contacts M and N. In
expressed
as
(2.4)
2
Physics
of
Integrated
CMOS Hall Devices
Here t is the thickness of the
rent I
=
\Jn\wt,
surface. The
and the
sample,
magnetic
corresponding input
r
the Flail coefficient
-L/qn, the cur¬
RH
perpendicular to the sample
induction B is
resistance R of the
=
sample
is calculated
as
_LU.
=
(2.5)
qn[Xntw
The above considerations
effect. For
yield only
detailed
analysis
considered. Therefore, the
analysis
a more
phenomenological description
a
the influence of the
can
be
of the Hall
crystal
lattice has to be
improved by taking
into account the
transport of carriers under the influence of collisions with the
crystal
lattice.
charged particle, exposed to orthogonal electric and magnetic fields, moves
along a cycloid in vacuum [20] (see Fig. 2.2). In contrast, a charge carrier in a
A
solid with the effective
loses, after
starts
a
a new
fore, the
relaxation time
cycloid path
mean
[12]
m'x
mass
T.
moves
for
only
a
portion
of
a
cycloid
all its kinetic energy due to collisions. The
in the direction of the electric field (see
deflection angle
QH
Fig.
and
charge
2.2). There¬
correlates to the relaxation time
x
and is
expressed by
lan0w
where cor is the
electric field of
~(ùct
=
^!—x
=
Eq. (2.2)
can
also be
=
represented by
an
resulting
to
electric field E
electric field
Ea
The presence of the Hall
electric field E
through
a
called the
sample.
As
or
Ea
+
EH
the current
angle QH
causes
a
=
an
magnitude
the Hall
(2.7)
causes
the
be non-co-linear with respect to
an
density Jn.
between the
deusity /;; and the result¬
path for a charge moving
current
resistivity of the sample increases.
geometric magnetoresistance
of the Hall
angle BH
applied magnetic induction
increase in the transit
result, the
the
(2.6)
\EH\/\Ea\.
Therefore, collisions in the presence of
ing
~\i„B,
cyclotron frequency [20]. However,
tanG,,
applied
-
nT"
This effect is
effect in semiconductors [12].
2. J
vacuum:!
=
Galvanomagnetic
Effects
<*>
Xi<X,
X^<X2
applied
charge
-q
electric field
Ea
Q
magnetic induction B
Fig. 2.2: Schematic representation of the path of electrons
solid in the presence
a
of a magnetic
induction and
an
in
applied
vacuum
electric
relaxation time T, the electron loses all its kinetic energy due
starts
a new
Furthermore,
material
cycloid path
a
in the direction
to
a
field. After
collision and
of the applied electric field.
physical magnetoresistance
[12|. This effect is related
to
and in
effect
occurs
collision factors and
in the semiconductor
depends
on
the mag¬
netic induction.
For
a
better
lattice,
as
Advanced
based
approach
an
employed
physical understanding
on
of the interaction of electrons with the
the
Boltzmann
transport equation
crystal
must
be
shown in the next section.
Analysis of Galvanomagnetic Effects
An accurate
analysis of the galvanomagnetic effects
the Boltzmann transport
only present
Here,
we
ature
distribution in
majority carriers,
the
a
equation using
key-results
can
the relaxation-time
of such
an
analysis.
homogeneous semiconductor
the current
density
is
determined
21
be carried out
as
by solving
approximation [3],
With
a
uniform temper¬
material and electrons
as
2
Physics
of
Integrated
CMOS Hall Devices
3
/„
4
q2KxE 3-K4E xB) -^K,B(E
;//*
+
=
+
"
B).
(2.8)
,„+-
Here, the magnetic field dependent transport coefficients K{, K2, and Ä"3
energy
weighted
averages
energy
dependent
relaxation time
Ks
Here,
For
=
the term
over
x
and the
iL<—^^>,
»»'"
I
+
orthogonal arrangement
an
field E
where the effective
ity \iHn(B)
are
=
GRll(B)E
=
=
with
density
of the
(i.e. B±E), Eq. (2.8) reduces
J„
u/;~ZT) (s 1, 2, 3) with the
electron mobility \in
qx/m* [22],
+
.v
=
(2.9)
+
and m* the electron effective
magnetic induction
mass.
B and the electric
to
GBn(B%lHn(B)\ExB],
conductivity of electrons oBn(B)
introduced
1...3.
(1,7 ZT
denotes the electron carrier
n
xV(l
are
(2.10)
and associated Hall mobil¬
[12] with
GBn(B)
=
cfK,,
(2.11)
4f-
(2-12)
and
M//„(*)
=
For low
cients
magnetic induction defined by \x„~B~
of Eq. (2.9) can be approximated [12] by
Ar1
«
1. the kinetic transport coeffi¬
2(<ii#l>-\Mn-,>Jn.
=
q
a:2-^((p„V<m„4)^)-
">")
ai3)
(2.14)
2.1 Galvanomagnetic Effects
By using Eqs. (2.13, 2.14), the effective conductivity of electrons oBn(B),
Eq. (2.11), reduces, for a non-degenerated semiconductor material [12]. to
GBn(B)
were
a0
the Hall
=
o0(\^a[i2llnB2)
=
q\i„n and r,
are
mobility jj///;(fi>)
yn)
the
scattering
for electrons,
where pwo„ is the Flail
mobility
at zero
scattering
factors rm
stant energy surfaces
[2]
=
are
Scattering factor
<x"')/(x)"'
given
=
^,
(2.15)
factors (see Tab. 2.1).
with
ß
can
=
be
for semiconductors with
phonon
1.77
5.90
r4
4.16
19.14
Hall
voltage,
RHu
=
scattering factors for different scattering
is
which determines the
efficiency
RH0
mechanisms
flf.
of the material to gen¬
given by [12]
Rm(
I
-
Yü4zr)
xvith
y
=
1
-
2^
+
r2
where
con¬
Ionized impurities
'"3
erate a
spherical
in Tab. 2.1.
Acoustic
RHn,
as
(x)~
1.93
The Hall coefficient
(2.16)
and is defined
1.18
Calculated
as
£-/•„
r2
Tab. 2.1:
Analogously,
expressed
magnetic induction,
»i
The
a
Eq. (2.12).
nm„(i-ßii;B2).
=
with
.
is the Hall coefficient
at zero
magnetic induction
23
ii
(2.18)
r2
and is defined
as
2
Physics of Integrated
CMOS Hall Devices
RH(B= ())= Rm
In the above
analysis,
have assumed
we
surface for which the effective
effective
mass.
A correction in the
in
occur
riers.
include the
Ettinghausen-,
Input Resistance
geometrical
In the
study
infinite
length
physical
Hall
and
Nernst- and
The
sensitivity
of
Sa
where
Gs
sitivity
of
the Hall
is the
a
Hall
plate
we
plate
effects of the
plate S(j
of
v,ith
other
of infinite
factor
by
an
charge
car¬
These
ideal Hall
plate
design constraints,
to
of
a
and the resis¬
plate.
Saco
can
-^
expressed
as
RuJ
VM)
-
be
=
factor for the
-f-,
(2.20)
sensitivity
length [21]. Furthermore,
GR
due to
galvanomagnetic
magnetic sensitivity
has to be considered to determine the
described
(x"')/(x)"')
=
assumed
arbitrary shape
geometrical correction
plate
anisotropic
Righi-Leduc-effects.
However, due
correction for the
GsSav
geometrical correction
ohniic
a
GR
contacts.
sense
shape
=
an
Sensitivity
galvanomagnetic effects,
Hall
a
in
[11.
Gs
point
for
(rnl
energy
[12].
and
plate requires
tance to account
and
correction factors
of the
factors
scattering
spherical
But the conduction
multivalleyed resulting
effects may interfere with the Hall field
The
a
semiconductor associated with the transport of
effects may
a
(isotropic).
magnetoresistance effects,
In addition to the Hall and
2.2
semiconductor with
needs to be introduced
anisotropic mobility
They
and
(2.19)
qn
is constant
mass
non-spherical
band of silicon is
a
-L.
=
the
and
SLlao
RD,
sen¬
input resistance
of
operating point. Here, the
describes the correlation between
its sheet resistance
the
and the
physical
Hall
a
square
plate
with
resistance R,
R
=
GRRU
ukh
/?ö
=
-LI
.
(2.21)
2.2
In order to calculate the
equations
must
for
GBnE
=
VE
Here,
n
+
=
(dn/dt)
+
q~l\7*Ju
=
(dp/dt)
+
cflV*Jp
=
qD„Vn
-V-(j)
-
magnetic
e
(2.22)
X
B],
density, ND
(2.24)
in the above
Considering steady
in the Hall
plate
stale
Hall
plate,
operation,
no
space
equation (2.24)
the
=
assumption
charge
reduces to the
effects
V../;,
of
a
-
=
of the
0 reduces
can
be made to
=
majority
simplify
carrier current
Eq. (2.22)
to
0.
(2.25)
homogeneously doped n-type
and with
Ar/}
simpler Laplace equation
-VE
Similarly. Eq. (2.23)
in vacuum, and U the net
assumptions
divergence
with net recombination U
Furthermore, with the
the diffusion coeffi-
equations.
V../,,
are
(|) the electric potential, uW/(
permittivity
several
the elec¬
Jn
the donor concentration,
mobility, G„ the electron conductivity, D„
a
(2.23)
(q/(c()c))(p -n+Nn-NA).
=
the dielectric constant, f0 the
analysis
induction B
MI,
aRn[inil[E xi?]- \iHnqDn\Vn
the hole current
recombination rate. For
there
a
the basic
GR,
V
the acceptor concentration, E the electric field,
cient,
and
Gs
Sensitivity
22]:
density, ./
the electron Hall
the
correction factors
denotes the electron concentration, p the hole concentration,
tron current
NA
Resistance and
n-type semiconductor in the presence of
an
be solved 114.
./„
geometrical
Input
^V2(|)
=
;;
=
0.
and
p
«
n,
material
Poisson's
(2.26)
reduces to
J„
=
aBllE-aRn\iUn\ExB].
(2.27)
Physics
2
of
Integrated
CMOS Hall Devices
magnetic induction B
2.3:
Fig.
Vector
density Jn, and
diagram illustrating
the
the electric fields
corresponding Hall angle QH
Ecl
and
the current
Efj,
in the presence
of
a
mag¬
netic induction B.
the
Assuming BLE,
resulting
electric field
Ea
and the Hall field
electric field
by
the Hall
rent
angle Qn
density Jn (see Fig. 2.3).
equation VxE
well
EH consists of an applied
En, Eq. (2.27). This implies a rotation of the
electric field E
One
Ea
+
-McVàn(EH/Ea)
=
can
0, that under
=
=
show with
a
with respect to the
Eqs. (2.25, 2.27)
uniform oBn
over
cur¬
and the Max¬
the active Hall
plate
region,
vV/„
Consequently,
Finally,
of
an
the
the
aßnV*E-aBn\iH„V*[ExB]
=
oRnV*E-aBn\x„JVxE]*B
=
GBnV»E
Laplace equation
boundary
insulating
=
can
is satisfied.
boundary,
boundary conditions
can
and uB
insulating edge
\ectors: n,
parallel
to
be written in the
the
problem
general,
be identified: contact boundaries
Defining three mutuallv orthogonal unit
the
field
potential
field have to be defined. In
boundaries (//;) for the
un normal to the
(2.28)
0.
conditions for above
applied magnetic
types of boundaries
and
=
for
a
in the presence
Hall
plate
two
(cb) for ohmic contacts,
of the Hall
tangential
to the
applied magnetic
following compact
plate [14].
boundary,
induction B,
form
[14]
2.2
E
•
u,
0. and
=
Heb)
./„
O.and
u.
E»u,
technique [15]. Here,
by inspection.
mined
angle tanOw
=
For
—(J-,JJ5|.
-
k'b)
starts
with
example,
as
a
shown in
ary conditions described in
a
is
by
plate parallelogram
Fig. 2.4,
satisfies
Eqs. (2.29, 2.30) [14].
determined [14]. Next, any
mapped conformai ly
modified
by
the
same
to
the
(2.30)
geometry whose solution
Hall
Eq. (2.26)
Once
has
mapping
be deter¬
can
tilted
by
the Hall
and the bound¬
Laplace's equation
and
Gs
arbitrary geometrical shape
parallelogram
(2.29)
,
the conlormal
solved for that geometry the geometrical correction factors
easily
)
II
Sensitivity
-\iHnB(E» u,).
Laplace's equation (2.26)
one
Resistance and
-VHnB(Jn
Uch)
W)
A useful method to solve
Input
geometrical
is
GR
can
be
which
can
be
correction factors
conformai transformation function.
boundary (ch)
contact
insulating boundary
magnetic
Fig.
2.4:
Electric
parallelogram.
field and
current
The geometry
lines in
a
Hall
induction B
plate having
the
satisfies the Laplace equation and
its
shape of a
boundary
conditions.
In
reality,
shape
with
(see
GR
a
the conlormal transformation function for
is, for
most cases,
symmetrical
Fig. 2.5).
are
difficult
circular Hall
For these chosen
known [23. 24].
Using
to
find and hard to evaluate. Therefore,
plate
offel transformation, these two
asymmetrical rectangular
or an
shapes,
a
arbitrary geometrical
an
the
geometric
shapes
can
be
Hall
correction factors
bilinear transformation
mapped
or
to
start
we
plate
Gs
and
the Schwartz-Christthe upper
complex
Physics
2
of
Integrated
CMOS Hall Devices
half-plane [J5|. Now, mapping
complex half plane
plate shapes,
factors is shown in Tab. 2.2 [21, 23
symmetrical circular
i0!T
=
h
„
Tt
.
l/.- i
to
30].
asymmetrical rectangular Ileal plate
Hall plate
|
GR~l/u
°;/
1 272 d
-4-
lanO/;
u
angle
contact
nr\
1
Oçii
-
5
& opemn«
corresponding geometric correction
with the
+0717
---
I 0
solutions
are
[\5].
An overview of Hail
(7
arbitrary geometrical
to an
the conformai transformation function, which
shape requires only
that well known
the
-^exp
1
œ^FR^
length
s
i
2
h
juin O
-'
un
I
°ii
-
tan©
width,
w
ontact width
Sehwarz-Chi istoffel
bi lineal
transformation
tiansfoimation
r
complex
uppei
,
halt-plane
confoimal tiansfoimation (e g Schwätz¬
et» istoi fei tiansfoimation)
arbitrary geometrical shapi-
Fig. 2.5:
correction
24/. By
Determination of
factors of
means
a
Gç
and
G^ of
circular and
a
Hall
rectangular
of conformai mapping using
transformation,
the
t
orrection /actors
plates
can
a
with arbitrary
Hall
bilinear
plate
or a
be calculated
are
shape.
The
known f23,
Schwar:-Christoffel
for
any
shape.
2.2
Geometrical
shape
Input
Resistance and
Geometrical correction
Greek Cross
=
[ 71/2-0.645 exp (-nh/k)]
tan
GR
LlLz/ZL)
=
factor
[0.645 exp(-7t/;/fr)l
tan
m
Sensitivity
^2.00^
0.72
+
k
2K(nf)
K(nr)' complete elliptic integral
h:
length
side
k: width side
arm
Gç
l-1.045e\p(-7t///Jr)
=
arm
Square (Version A)
m
<=si\(K(mf)c/b,
1
-)
sn(K{mf){c/b
GR
nnt
=
c:
length
0.94
1
+
tanO //
mL )
=
+
eH
2i),
m,
'"*(
=
0.1716
mf)
=
2K(tth
-t
1.34exp
f-3.75cA
—-—
Anto/2
+
0.018-
sn(u,v): Jacobian integral function
contact
b: circumferences
Gc
active region
Square (Version B)
GR
and
Gs
1.062
I
=
have the
the Greek
k
b tan©
same
cross,
7.427
=
©,/
c
H
form
as
for
but with
/7-2<r
--log
71
"
+
/;
Tab. 2.2:
devices.
-
2c
Calculated geometrical correction factors of symmetrical, lateral Hall
Geometrical
according
shapes
not
the method described in
published
Fiq. 2.5.
29
in
prior
literature
are
calculated
2
Physics
of
Integrated
CMOS Hall Devices
The Junction Field Effect
The
sensitivity Sa and
metrical dimensions
the
input
according
CMOS Hall device with
an
resistance R of
Eqs. (2.20)
to
active
a
Hall
and
plate depend
(2.21). Additionally, for
region consisting
of
n-doped region
an
p-type substrate, the boundary of the Hall plate is limited by
pn-junction.
Since the thickness of the
electric field, the device geometry
We consider the
ogy with
point
case
of
an
changes
with
is controlled
changing biasing
an
by
in
a
a
insulating
the
applied
conditions.
ideal lateral Hall device fabricated in CMOS technol¬
sense contacts
transistor n-well which is
pn-junction
its geo¬
on
(see
Fig. 2.6) [31],
optionally
covered
by
region
The active
a
p+-layer.
consists of
For such
an
a
arrange-
ength Iq
current contacts
thickness t,0
point
Fig. 2.6:
of the
width
contacts
Ideal lateral Hall device with
defined by
tion
sense
the
length l0,
point
the width uy> and the
transistor n-well denoted
as
sense
contacts.
depth of
the
m
()
The geometry is
metallurgical func¬
thickness t(j. The device is covered
by
an
optional p+-layer.
ment, the effects of the
n-well. FTowever, the
the
junction
junction
use
field effects
doping profiles
a
quently, require
an
modify mainly
of the conventional
predicts
for the active
nology suggest
field effect
theory
poor results since the
region.
a
JFET
theory
[32]
to describe
is based
on
abrupt
Lateral Hall devices realized in CMOS tech¬
Gaussian function to describe the
impro\ed
of
the thickness r0 of the
JFET model.
30
doping profile, and.
conse¬
2.2
The
doping profile
of
with finite element
transistor n-well with
a
modeling.
Input
Resistance and
optional p+-cover
an
In accordance with the
[33], the doping profile n(x) of the donor concentration ND
with
a
be
approximated
Gaussian function
n(x)
f
(h
=
x
is the
doping depth,
range, and AR
resistance and SIMS
cess, Austria Mikro
^
p
=
L
'^/JJ
V
Nn(x)
(2.31)
,
O the number of ions per unit area,
projected straggle.
the
x-R
exp
•
2k- AR,
where
can
is simulated
implantation
of ion
theory
Sensitivity
measurements
Systeme
Rp
the
projected
With additional information from sheet
of the
Int. AG), the
particular CMOS
doping
process
distribution
can
(CXE
pro¬
be determined
(see Fig. 2.7).
1x10
26
m&>
o
boron
lxlO25
<
doping
concentration
:
£Q
N^
lxlO24
c
o
lxlO23
phosphorus doping
^^concentration Nß
«t«f
lxlO22
o
o
:
U
lxlO21
btj
a
lxlO20
Q
.
,
,
0
,
i
i.
i
i
1
i
i
i
1
.,
2
,
3
Depth
x
,
!
1
,
1
^^.
4
5
[urn]
Fig. 2.7: Sample of a doping profile of an n-well with p+-cover for
a
particular
CMOS process.
With
a
for the
similar
approach,
p+ layer
can
the
doping profile p(x) of
be obtained. This results in
p(x)
=
NA(x)
an
the acceptor concentration
abrupt profile
PP
x <
tp
Po
-v >
'p
=
31
NA
of the form
(2.32)
2
Physics
of
Integrated
is the
where p
peak doping concentration,
background doping
According
to
CMOS Hall Devices
Eq. (2.21)
the
input
region,
of
a
p+-cover,
shallow
of the
the
profile, andpn
and
does the
so
depth
of the
of the
depends
isolating pn-junction
p+-
and n-well
on
the
sensitivity Sa, as shown in
active region limited by the
the substrate. In
to
corresponding depletion layer limits
thickness at the interface between the
the
Fig. 2.7).
resistance R of the Hall device
The actual thickness is the
voltage dependent depletion layer
case
depth
concentration of the p-type substrate (see
thickness t of the active
Eq. (2.20).
the
/„
the device
regions.
In order to calculate the
the
n-doped
active
voltage dependent depletion layer thickness xn(V) within
region, the following set of equations need to be solved. By
Poisson's
integrating
depletion layer
equation,
the condition of
»„0")
J
'o
N(x)dx
P(.\)dv
doping
'0-yr)
concentrations in the
n-
and
potential
distribution
=
n(x) and P(x) -p(.x)
p-region, respectively,
metallurgical junction according
results in the
(2.33)
,
(V) is the junction thickness in the p-region. N(x)
x
tion of the
again
J
=
'o
the net
conservation within the
is obtained
?o+
Here,
charge
to
Fig. (2.7). Integrating Eq. (2.33)
the
over
and f0 the loca¬
depletion layer
'n+1,,0') \
v+v-
=
î
i
d^ïP(x)dx
y\'>
where es
constant
zero
net
=
e0
•
electron and hole
Fermi level
throughout
Vhl
the
the built-in
r/Ç[/V(.\V/.v
(2.34)
,
e0 times the relative dielectric
potential. Finally,
the
junction resulting
-In
<1
Vhj
constant
currents across
FT,
=
f
^-
s
eSl is the permittivity
of silicon eSi, and
+
the condition of
depletion layer requires
a
constant
in
'N(t0+ \n())xP(t0~\p0)
(2.35)
2.2
where xn0
nesses
tion
-v„(V
=
0)
=
and
in the absence of any
x
=
0
biasing
( V
v
for the built-in
in addition to the
can
concentration
Sensitivity
and n, the intrinsic carrier distribu¬
improved by
be
voltage stemming from
impurity
Resistance and
0) denote the initial junction thick¬
currents
(see Fig. 2.8). The above relations
-2kT/q
=
Input
a
correction factor
the intrinsic carrier distribution
[34].
depletion region
c
ö
2
ffi
"So
!
Vo
In the
case
constant
ified
i
V
+
to
of
Vhl
v„(V)
junction
formed
by
ent
the Gaussian
background doping p0, Eqs.
read
Erf
a
Overview
junction
of differ¬
thicknesses.
doping profile, Eq. (2.31 ),
(2.33, 2.34, 2.35)
are
and
a
correspondingly mod¬
as
x„V+Rp-
/0
Po-VfV)
J2AR„
=
+
$Erf *pV~Rp to
J2AR„
+
P()xp(V), (2.36)
Po
=
<KK„-'o)
Erf
'xn(V)
+ R„-t
'0
p
+
Erf
/2AR,
>A/? '
-Exp
/27T
2.8:
Fig.
-V„(U)
(y„(V)
+
/?;)-/0)
2 A ä;
+
/2A/?
+
Exp
(A „(V)
"/<„
2 a/?;
+
?„)
(2.37)
2
Physics
of
Integrated
FT
V hi
CMOS Hall Devices
$
Log
y°
ARpj2n
to
2.39)
(.\p()-Rp + tQ)
Exp
the
*Erf •v^-K/.
$Erf
=
t
'p
^E xp
Vh,
bi
=
Eqs. (2.33
-pQxn{V)
+
—Log
4
metallurgical junction. However,
q(
Pn
=
to
numerical solutions
On the other hand, in the
p+-region
is well
case
Eqs.
of
an
approximated by
2.35) become
tp RP
%Ei\
I2AR
+
PjAp(V)
(2.40)
/'J
P(A,fVY
Y,(V)-Xp
+
k
J2AR„
(Rp-to)-
0AR
JTk
<l>
to
—
+
2ar:
2.9 shows the
across
'o
(tp-RP):
2 71
Fig.
+
Thus
V/,r
within the
(*;>-'/>)~tErf
p
I2AR
(\>AR
the condition for the
qPp-\p(Vf~
-R
(2.39)
2AR2
it
doping profile
f2AR„
v+vbl
(Rp-ioY
Exp
doping profile, Eq. (2.31), only
abrupt doping profile.
2
2
(2.38)
2AR2
be found for .\n and
can
optional p+-layer,
an
/>0-
Eq. (2.39) describes
with the Gaussian
(2.36
=
-Pa
2ARZ
(bAR.
0
Rp--t0y
+
n:\ARpj2n
<i>
where
(.v„0
:Exp
:Exp
XAR ,j2k
(2.41)
Exp
2ARZ
^no~Rn
+
fo)
Pq
(2.42)
2AR'
depletion layer thicknesses as a function of the applied voltage
the junction, calculated with Eqs. (2.36 to 2.42) for a junction with Gauss-
2.2
junction
for Gaussian
Voltage
Fig.
2.9:
junctions
tions and the
ian and
a
Gaussian and
an
The
are
calculated with
according
Gaussian
at
the
are
level
according
Once the
to
resistance of the ideal Hall
Ohm's law, the resistance
cIR
=
thickness of the
plate
can
lJy.
J
concentration
equivalent
voltage drop.
over
electron
Eqs. (2.36
the
The
to
doping
2.40) for
concentra¬
Fig. (2.7).
are as
given
in
Fig.
n-/p-interface, larger
2.7. In
a
values of
due to the lower absolute
doping
Eq. (2.34).
voltage dependent
with JKas the
to
doping profiles
doping profile near the junction
depletion layer thickness occur which
Sensitivity
[ V]
abrupt doping profile.
corresponding depths
abrupt doping profiles.
Resistance and
doping profile
Across Junction
Depletion layer thicknesses
with
Input
=
can
be calculated (see
be described
__
depletion layer
by
a
^-Jll^^.—__.
biasing
current,
and w(V) the
to
equation
\'n(V)[ln(V)w(V)t(V)q
I the
input
Fig. 2.10). According
differential
the conductive thickness of the
mobilit),
is known, the
(2.43)
ND(V) the equivalent doping
active region t(V), \in(V) the
equivalent
width of the active
region.
2
Physics
Fig.
2.10:
flow
in
a
of
Integrated
Integration
CMOS Hall Devices
ewer
the conductive channel of the active
volume element of
length
dx
occurs
in
a
channel
of
region.
width
Current
w(V) and
thickness t(V).
The denominator
over
on
the thickness
the
right-hand
side of
follows from the
integration
t(V)
ND(V)iin(V)t(V)
=
j*
v,(V)
with
Eq. (2.43)
ND(v)iin(ND(y))dv,
(2.44)
Input
.2
Resistance and
Sensitivity
and [35]
V„(ND(y))
=
232
80
+
((A7y)(v))/8xl01<,)°9
+
The
integration
boundaries in
Eq. (2.44)
without p
yfV)
-cover
and
+
\n(V) withp
(2.46)
are
=
t
Lcm-^l.
yh(V)
t0-S„(V),
=
(2.47)
-cover
with
y,(V)
+
t(V)
=
yh(V).
(2.48)
y,(V) is the top boundary and yh(V) the bottom boundary of the active
region, tm the top boundary without p+-cover layer, \H(V) the depletion layer in
Here,
the active
region
the Gaussian
The
a
due to the
doping profile
equivalent
at the
width of the active
voltage dependent
simplify
bottom of the active
region u'(V)
because of
the model, the width
w(V)
where X is determined
found by
integrating
x"n(V)
and
=
depletion layer
region.
equivalent
junction
width
field effect
changes
in the
a
wo-x^ao.
voltage drop
due to
changing depletion layer thickness.
w(V) is approximated by a factor A-
by experimental
the
the
is due to the
function. Furthermore, the
perpendicular y-direction
order to
p+-cover layer,
results.
Finally,
In
(2.49)
a
solution of
Eq. (2.43)
is
in the x-dircction
V(\)
J
j
(w^Xx^V))
A
Xn(y)iin(ND(y))dydV=j.
(1 )
37
(2.50)
2
Physics of Integrated
with the
to
yield
boundary
the
input
erated at the
CMOS Hall Devices
conditions
V(x
=
VI
.v
=
V(x
=
resistance R
point
sense
contacts
tion
field
ND(V)
model,
to
rH
=
J2f)
l0)
Vm
=
\j,
=
(2.51)
and the common-mode
ity Sa
and the thickness of the
/%,
is the Hall
we assume an
active
of
an
ideal Flail
=
the
conducting
plate
gen¬
in the presence of the
equivalent doping
active
concentra¬
region t(V)
H
(9 52)
-
qND(V)t(V)'
scattering
region
that in the middle in the Hall
be evaluated at V
voltage Vm
(see Fig. 2.6).
effect, Eq. (2.20) is modified by
S"
where
V0
=
V/I
=
In order to calculate the sensitiv
junction
0)
factor
(sec
Tab.
2.1). For
of uniform thickness of
plate (i.e.
at
a
value
a
simplified
corresponding
Vm). Therefore, Eq. (2.52)
needs to
V,„,
m
S
—JL
=
'"
\,(V
q
)
_.
ND(y)dy
P
53)
2.3 The
2.3
A
The
major
drawback of Hall
age at the
sense
to the offset
ing
of the
Theory
Spinning
plates
is their
all
are
physical effects
effects, geometrical
errors,
voltage,
i.e. the output volt¬
cause an
asymmetry in the poten¬
include
sources
piezoresistive
sources
may
change
over
the lifetime of
sensor.
ever,
one
of the most
powerful techniques,
is the
spinning
many
publications [36,
deals with
current method. First
measuring
signal
offset
Fig.
over
one
full
voltage from
the output
biasing
2.11: Symmetric
biasing
proposed
current
e.g.,
I (see
dynamically
[38], it has been
in
a
subject
current method
multi-contact Hall
Fig. 2,11). Averaging
of 360° separates the
for
plate
for
the output
spatially periodic
at
current
Hall
the contact
plate
with
eight
contacts
pair perpendicular
to
f41J.
The
the direction
of
current.
spinning
current
offset reduction scheme results in
response due to the discrete
the offset
known [37 to 40]. How¬
voltage.
spinning
output voltage is measured
are
which reduces the offset
voltage of,
switching period
the Hall
plates
43]. The basic idea of the spinning
41 to
different directions of the
The
Current Method
temperature gradients, non-linear material properties,
Several methods for offset reduction in Hall
the
offset
Possible
[36]. Additionally, the various offset
etc.
Spinning
magnetic induction. Also contribut-
which
region.
of the
Current Method
high
contacts in the absence of a
tial distribution of the active
the
Theory
sources
becomes
sampling frequency
sampling L44). Therefore,
indispensable
in order to cancel all
limited
detailed
frequency
knowledge
of
in order to choose, e.g., the minimum
significant
39
a
a
contributions.
2
of
Physics
CMOS Hall Devices
Integrated
Basic Considerations
The first step towards
mathematical
a
description
better
understanding
of the
problem.
of the offset
general,
In
and
I,
According
9)
[41] the offset voltage is of
to
V0(I,(p)
and, therefore,
nificant contributions
series
expansion.
symmetries
can
be
results
to
neglected
Assuming
+
they
V0(L
•
the
dependence
always
ip
jc)
+
=
smjmp
+
physical effects
(2.55)
2k).
to
(2.56)
occur
only
+
n
crystalline
+
by
silicon rotational
a reverse
V0(-E <p)
'-£) cos^]
bias
=
(2.57)
•
zero,
from
biasing
the
an
the
.
the Fourier components
physical
current,
offset that is
voltage
effects
independent
a
can
be
of the
linear
or
a
similar to [46]. However, any
independent
measured at
40
sig¬
6 in the Fourier
[45]. Furthermore, odd components
V0(I, cp)
v„
up to
=
components resulting from effects of
which induce
superimposing voltages
(2.54)
nature
be cancelled
equals
originating
on
voltage V0
in section 3.2, suggest that the
seen
voltage
can
induction
magnetic
current, and, into
non-linear
will be
0, 2. 4. 6
divided into components
biasing
as
Hall
0
the offset
2an(l)
=
=
a
Fourier series [36]
up to the sixth order
since
V0(I, cp)
n
periodic
+
of
V0(l, (p).
This coincides with the fact that in
occur
can
a
+
offset
proper
a
£fl„a)-sin(/fcp+v„).
=
7?
experimental
a
V0(I,<V
=
by
be described
can
V0(I,(p)
However,
VH(B, I)
=
an
is
voltage
the output
plate VH 0 can be separated into the Hall voltage VH
with a spatial dependence on (p such that
V!L0(B,
sources
a
of bias is
contact
equivalent
pair
to
of the Hall
2.3 The
plate. Consequently, they only
therefore,
The
case
can
of
a
be
be described
by
magnetic
by
a
V;
/
an
equivalent
plate
circuit
voltages
ohmic resistor,
is the contact
between contact / and
described
Fig.
by
with
/'.
an
active
they
consisting of
with
voltage,
/
a
t
or
at
pair (2.4).
offset
\
plate
voltages Vtj
the
structure can
dependence
can
be defined
current and R
applied
(3.1), respectively.
41
can
be
equiva¬
as
the resistance
equivalent
circuit
are
Fig. 2.12).
Hall plate
oltages
in
ohmic resistors [47] (see
linear current
(left)
alent circuit with six ohmic resistors. Current is
(1,3)
six
The six ohmic resistors of the
of a four contac
The
region of ohmic material
also be taken into account in the
can
their conductances ghk (see
2.12: Layout
or at
Current Method
in odd orders in the Fourier series, and,
lent circuit. The difference of the contact
where
Spinning
induction is considered. This Hall
Since all offset
Fig. 2.12).
described
a
of the
neglected.
four contact Hall
the absence of
occur
Theory
are
and the
applied
corresponding equiv¬
either at contact
measured at the contact
pair
pair (2,4)
2
Physics
A
biasing
of
Integrated
current at
8
V14
CMOS Hall Devices
the
12
appropriate
+
£|4
A'l.2#U
X
+
2
i'14
+
Xu #:
_
+
+
i'r
+
Uli
pair
contact
#14
Zn
leads to
Vnconst.
+
i?-
•
5
£.U
^14^2^-i712^34
7->4
\'24const.
-
/?,
•
(2.59)
resulting in
/,,
=
/24
=
Therefore, offset voltages with
by spinning
the
biasing
/
a
^24+^1
=>
linear
current of
a
current
a more
approximate
is to
use a
complex
nature.
Hence,
the non-linear behavior of
Wheatstone
bridge
with
on
only
Hall
(2.60)
dependence
four contact Hall
The influence of non-linear offset contributions
series is of
=0-
a
plate
are
of
always
arbitrary shape.
the components of the Fourier
simple
model is considered to
plate (see Fig. 2.13).
A
generic, non-linear resistances
k
a
cancelled
simple
way
described
by
it,,
=
a..R(I)
with
/?(/)
(2.61)
=
l-r,/
diaracteristic resistors
simplified equivalent
circuit
s
^
"o
i.i.i,
i
>
Cm
lent
I
[a
Fig. 2.13: Simplified
u
equivalent
circuit with
corresponding
acteristics
of
the
char¬
resistors
to
approximate non-linear behav¬
ior
42
of a
Hall
plate.
2.3 The
of the
Theory
Spinning
Current Method
Here, I denotes the biasing current, and. ar-, c{ and c2 arbitrary
by
caused
voltages
the
biasing
opposite
current at
constants. The
calculated
contacts are
as:
Ac\,c2)
V24=V/Il3)~V/l]3)
(2.62)
,
713 (fl12^23)(a]4^34)
V3\=Vs{I24)-Vi(I24)
f(c\>cl)
=
-
,
y13
Depending
on
guished (see
tact
pair.
required.
by
the
In
(2.65)
V(-724)-y3(-/24)= vM
=
the value of
a-
Tab. 2.3). Case/1
B,
case
All other
spinning
(2.64)
V 24^
Vu=VA-Ili)-V2(-Il3)=
cases
current
for the offset
different
cases
requires
at least one
orthogonal symmetry
two
between contact
voltages
öp
To
conclude, in
dent of,
Hall
or
plate.
«34
a\4
=
a2*
a^
al2
=
aM
respect
to
of contact
VM
==
cases
=
of the
biasing
However, to cancel
the
a
V 24
0
Hall
layout
plate
which
are
not
a con¬
pairs
are
cancelled
others
and the
pairs required
-v31
caused
O
subject
43
T~
V
}
1
voltages with
a
on
the
a
indepen¬
four contact
non-linear current
possible symmetry
of the
effects
by spinning
physical properties acting
will be the
4
by physical
cancelled
reduce offset
maximum
V
of non-linear offset-voltages.
voltages
current are
or
with
=
occurrence
the ideal case, offset
linear to, the
dependence,
be distin¬
C
B
_
Different
can
method.
a\4
Tab. 2.3:
voltages
symmetry axis through
axes
(case C) result in offset
A
v24
(2.63)
-^lX7\an~aH){a23-ay7)
h
is needed with
plate.
The number
following chapters.
2
Physics
The
of
Theory
CMOS Hall Devices
Integrated
of Continuous
In order to generate
spinning
a
complete switching period
However,
a more
Spinning Current
elegant
of
current vector
360°,
a
method is
[18]. This method allows the offset
decomposed
Sinusoidal
pairs (13)
and
currents,
(24) of
70
results in
is the current
a
of
net-current
ning with the unit
vector
h
bv 90°,
spinning
are
applied
plate
=
shape
7n((p),
spinning
and
the two contact
to
(2.66)
(2.67)
,
switching angle.
The
whose direction is
superposition
continuously spin¬
.
=
IQ- sin((p)
/0- cos(cp)
Fig. 2.14: Schematic view of a symmetrical four
cross
[41].
scheme
plate (see Fig. 2.14):
724((p)
7l3(cp)
current
order.
four contact Hall
and (p the
in the Hall
l0
is necessary
plate
four contact Hall device to be to
arbitrary
l()- sin((p)
=
amplitude
a
than four directions per
l0- cos(cp)
=
/24((p)
where
by
phase shifted
7n((p)
more
the continuous
voltage
symmetrical
a
with
multi-contact Hall
into its Fourier components of
biasing
Offset Reduction Method
and
contact
724((p)
are
pairs (1,3)
applied
to
and
the Hall
current vector.
44
contact
Hall
plate
with Greek-
(2,4). Harmonic biasing
plate.
These result in
a
currents
continuous
2.3 The
Between
are
corresponding
contact
pairs,
Figs.
Current Method
voltages
V24(B, cp)
(2.69)
=
VR((p)&m((p)
=
a
a
VH(B)
+
V0(<p),
VH0(B,(p)
voltage
=
and the
+
VH0(B, (p)cos(cp),
resistive part
superposition of
2.15 and 2.16). The value of
The Hall
Spinning
(2.68)
h, and
VH 0(B, (p)
the
of the
V13(5.<p)= VR((p)cos(cp)^VHO(B,ip)mi((p),
measured. These consist of
vector
Theory
the
VR((p)
Hall and
orthogonal
to
Vn 0(B, (p)
can
the
the
in
phase
periodic
unity
be determined
offset
voltage
offset
vector
V24(ö,<p)cos((p)-Vn(5,(p)sin(cp).
superimposed periodic
with the unit
are
voltage
h
(see
using
(2.70)
expressed
as a
Fourier series
VH0(B,(p)
=
][>,(#)•
sinU-(p
+
XA).
(2.71)
k -=0
2
">
Fig. 2.15:
biasing
resulting
Vector
currents
diagram of
7n((p)
in the net current
the two
Fig.
I24(3p)
I0-h.
due
and
2.16: The
to
I()>
voltage drop K/?((p)
orthogonal part
its
VH ()(B, (p), and the projections
Vn(B,(p)and V24(B,(p).
2
of
Physics
Integrated
CMOS Hall Devices
Thus, the offset voltage is described in
shifts
XL
The Hall
with the
full
terms
amplitudes Vk(B),
of
and
phase
of various Fourier components.
voltage VH(B)
spinning
and the residual offset
current method is obtained
switching period
V0
which cannot be cancelled
by averaging Eq. (2.71)
over one
of 2rt. This results in
271
jVH0(B,(p)d(p
V()(B)
=
=
(2.72)
V„(B)+V0.
o
Symmetry considerations of
a
the silicon
crystal
and
experiments suggest
limited number of Fourier components contribute to the offset
i.c.,Vk(B)
per
period
=
0 for k
>
khmi{. Then,
is sufficient for
a
a
that
voltage [45],
limited number of measurements of
substantial offset reduction.
46
only
2khmi{
2.3 The
Theory
of the
Spinning
Current Method
Physical Effects Causing Offset Voltages
physical
A multitude of
a
Hall
plate
to
effects such
on
due to the
ers
process
as
sources
as
caused
errors.
According
errors
as
shown in
to
same
Eq. (2.59)
Fig.
can
2.12. In
way and
the
physical
a
similar sense,
also be classified
can
corresponding symmetry
and
influence the second order terms in the
Eq. (2.56), and,
are
cancelled
by spinning
the
biasing
con¬
spatial
current
of
plate.
stress
cause
anisotropic
occurs
only
and
no
on
piezojunction
in the presence of
and does not contribute to the offset
only significant
an
non-degeneracy [48].
and the current flow may
piezoresistivity, piezo-Hall
effect
of the offset
structure of
the electric field. The effects of mechanical stress
effect is
change
fabrication
geometrical
be treated the
can
the
in
be described
[42]. In the presence of stress, the band
piezo-Hall
[42].
of offset, and. therefore,
source
results in energy shifts, distortion and
due to
chapter
by imperfections
The effect of mechanical stress is the main
becomes
play¬
3. Other effects,
described in
as
the main
as
in the absence of non-linearities,
of six resistors
inhomogeneities
four contact Hall
trons
shown in
only
and non-linearities
will be identified
external mechanical forces may
linear
as a
equivalent circuit
Fourier series of
sensor
considerations focus
piezoresistive effects,
voltage
plate. However,
be treated
ii) mechanical
following
The
of minor influence
mainly
are
siderations, geometrical
a
errors,
to the offset
errors
geometrical
voltage.
effect. These
are
asymmetry in the potential distribution of
errors
of the Hall
material
offset
[42]. Furthermore,
errors can
causes
geometrical
thermal in nature,
Geometrical
an
an
junction field
i) geometrical
shape
as
contributing
in
mainly
by
produce
effects
an
voltage by
voltage of
a
Hall
n-type active region
The transport of elec¬
longer
be
perpendicular
electrical transport
can
to
be
effects [1,49 to 51]. The
induction B
applied magnetic
definition. The
close to the fracture limit of silicon and
piezojunction
can
be
neglected
in realistic situations [52],
The multitude of
mass, or
stress
alteration in
effects, such
mobility,
on
the
as
energy band shifts,
majority
47
change of effective
carrier current flow in
a
semicon-
2
Physics
ductor
the
of
can
Integrated
CMOS Hall Devices
be attributed to the
piezoresistive
change
in electrical
conductivity
The stress
dependence
of the offset
Wheatstone
bridge
as an
equivalent
is
effect. For not loo
linearly
voltage
related
to
large
is far
plate
is
more
complex
has been described
circuit model for the Flail
governed by
approach
is
the
in nature (see
generalized
using analytical
element simulations. For
middle of the Hall
plate
a
means
Fig. 2.17). Here,
Ohm's law for
usually
an
evaluated
simplified analysis,
we
by
use
plate [53,54J.
region
of
a
of
a
This
Hall
conduction in the Hall
anisotropic
employing
consider
far from all boundaries (see
levels,
the mechanical stress.
model is inaccurate since the current distribution in the active
plate
stress
a
material. This
numerical finite
finite
region
in the
Fig. 2.17).
4-
Fig. 2.17:
current
plate.
Finite element simulation
distribution
A
finite
exploded
view.
of
active
the electric
density J
are
rectangular
region
not
resistivity
field
Hall
is shown
In the presence
netic induction B, the
pic and
a
of the
of
a
in
mag¬
is anisotro¬
E and the current
necessarily co-linear.
The electric field/? and current densitv ./are related bv Ohm's law
E
=
pj
48
(2.73)
2.3 The
where p is the
resistivity
second rank tensor. For
are
the presence of mechanical stress at
p is
resistivity
netic induction, the
components
tensor. In
sufficiently
anisotropic
and described
stress
components and
in reduced index notation where 1. 2, 3. 4. 5, 6,
corresponds
to
+
Pa
=
where the pa
piezoresistive
are
the
=
+
Pa
symmetric
resistivity
expressed.
11, 22, 33, 13, 23,
with
*aß Op
'
resistivity components
Oß
for
P
0
+
I
po
0
+
p3
(2.74)
p
free material,
a stress
the
7taß
the mechanical stress.
tensor transformation rules
[59], Eq. (2.73)
can
be
expanded
to
as
[7t1|-7ü,2]os6sin(27/(p)
E
I
+
E'2/p
=
Ej/p
=
[Tt44cs4cos(;Kp)
the above system of
Eq. (2.75),
we
axes
equations
J\.
+
JT12](Gs1 +t)s2)
Relevant to this work is
+
is
the
expressed
stress
7T12CV, J
\
Eq.
(2.76)
stress
in
in terms of reduced index notation.
of the
a
resistivity along
identified
the
graphical representation
can
be found in [60,
(2.76). which shows the electric field
as
a
source
generated
of
61].
per¬
of offset. The
appears in the second harmonic of the rotation
49
,
(2.75)
(2.77)
2.19. A detailed discussion
Fig. 2.20).
,
,
dependence
to the current flow. This can be
dependence
+
a0)sin(2/;(p) J\
-
Tt44cis5sin(/7(p)]J'1
For purpose of illustration
Eq. (2.75) is shown in Fig.
direction
+-[7t|,
-jt44(asl-ai2)cos(27/(p) J\
system given in Fig. (2.18). The mechanical
recognize
direction of current
pendicular
+
[7Cll-7t12|av6cos(2/;(p)--7i44(au
in accordance to the
In
P
coefficients and
Using standard
read
APa
be
can
mag¬
as
0
Pa
by
a
zero
small stress levels [55 to 57 j, the
linear functions of the
12, respectively, [58, 59],
Current Method
Theory of the Spinning
angle
(p (see
2
Physics
of
Integrated
CMOS Hall Devices
=
Fig. 2.18: Illustration of the
system
(x\,
x?,
tal, the system
and the
x3) aligned with
(xsl,
.v
The
coordinate system
system used in
the
Eqs. (2.75
principal symmetry
2.77). Unprimed
to
axes
of the
cubic crys¬
?) aligned with coordinate axes of the Hall sensor
(xf, xf, xf) which rotates in phase with the spinning
0,
primed system
current vector.
axes
[110]
.v
phase angle
of the
Hall
ip is
defined
between the
and the
primed system
sensor.
150'
Fig. 2.19: The
normal¬
ized piezo resistance func180°
/n,o(,KPs)
lion
n-type
E
210
i
=
with
fit./n(PiY]r\
a,u}
ft-coefficients
ing
to
f48J loider
tensile
50 MPa.
270°
50
an
plate
Hall
the
al
°f
stress
accord¬
uniaxi¬
CTS,/
of
2.3 The
of the
Theory
Spinning
Current Method
iL
Fig. 2.20: The normalized
perpendicular piezores is
function
tance
gK
-
a(n(pf)
of n-type Hall plate with
expression given
mechanical stress
Depending
from the
on
Eq. (2.76)
in
(asj
-
o\2^
consists of
n-coefficients accord¬
ing
to
ial
tensile
anc'
Part
a
mat
lmear t0
*s
lar to that in
shifted
but
xq-direction generates
stress
uniav-
GsI
of
phase
an
to
the axial
shear stress
gç6.
physical device,
e.g.
device orientation has to be chosen to
appropriate
an
angular dependence
Eq. (2.75).
[481 under
part which is linear
a
minimize the offset. Note that the
in
the
the mechanical stress distribution in the real
packaging [58],
and
=
50 MPa.
270°
The
8k,ö(}1(?s)j,\
E2
by
electric field
on
(p in
Eq. (2.76)
is simi¬
45 \ In addition, the current flow
in the
E\
\
J\
'^.-direction.
Hi) junction field effect
Due to the
junction
field effect (see section 2.2) the geometry of
changed by external biasing conditions and by
isolating junction
voltages
in
Eq. (2.77).
These
in the first to sixth order of the
non-linear
cause
as seen
voltages
section 2.3). In the
which
are not
voltages give
following
for the device geometrv
w
discussion
rise to
switching angle
cancelled
by
only
the
Hall device is
voltages generated
field effect, in combination with
junction
offset
the
a
periodic
case
errors,
current method
of
the
offset
Additionally,
geometrical
spinning
the ideal
(p.
across
the
may
(see
perfect symmetry
ill be considered. However, calculations concerning the
51
2
Physics
junction
Integrated
of
CMOS Hall Devices
field effect result in
an
implicit
solution. Therefore,
numerical model is introduced for behavioral
description.
Assuming
resistance of
abrupt doping profile,
an
be calculated
according
=
eh
with
a
used).
Eq. (2.78)
the built-in
due to the
the
biasing
(2.13) gives
spinning
aged voltage
of
denotes
a
Eq. (2.77)
current
of
V]
to
plate
input
and
(2.10)
for notation
V, an internal voltage such as
voltage drop in the x-direction
resistance of the active
region
due to
simplified equivalent circuit according to Fig.
description of the Hall device when operated by contin¬
a
(see Fig. 2.21). For symmetric biasing conditions, the
\74
can
(2.78)
Figs. (2.6)
and V(a) the
current /. Once the
behavioral
(see
material constant,
field effect is known,
a
ideal Hall
an
t0-cJV~YZ~V(x)
Wr
voltage (see Eq. (2.35)),
junction
uous
c
simplified
p(G)
I
dependent resistivity p(o~)
stress
In
input
a
[32]
to
dVfx)
the
only
is
kept
constant at
V^,,^,.. Additionally,
aver¬
the electric field
is taken into account
by superimposing the internal voltage Vt of
resistor R^ and R^4 by a voltage
sin((p + X), and voltage Vr/ of resistor R{4
and /?23 by a phase shifted voltage
cos((p + X),
<*
<>=
Fig.
V
4
=
7-
cos(cp)
/24((p)
=
/•
sin((p)
2.21 :
Simplified
equiva¬
lent circuit model with non-lin¬
4
resistances
ear
'24
/n((p)
Rp
according Eq. (2.78)
ated
bx
current.
calculated
and oper¬
continuous
For
spinning
symmetric biasing
conditions, the averaged volt¬
age
ofVj
stant
to
Vj
is
kept
voltage VCcnter.
at a con¬
2.3 The
7t/2
Theory
of the
Spinning
Current Method
n
Switching Angled [-]
Fig. 2.22: Periodic offset voltage Vn 0(B, (p)
junction
to
/';/
arbitrary
units due to the
thickness modulation. The inset shows the Fourier components
the sixth order (
VH 0(B, (p)
]>\4;isin(/j(p +
n
Ak
up
A,„H
n
'
n
The calculations
to
the fourth order
along
tions
set
predict
a
terms.
periodic
The
offset
zero
voltage Vu 0(B, (p)
with contributions
transitions coincide with the symmetry axis
the contacts of the Hall device. This indicates that fourth order contribu¬
are
unique
to
the continuous
spinning
by device symmetry. Additionally,
as a
result of the
The
angular dependence
superimposed
of the
current
method and the
phase angle
contributions to the odd order terms
is
occur
electric field of
Eq. (2.77).
piezoresistivity
in the second order term generates
aliasing products. These products give
rise to small contributions in the Fourier
spectrum of second and sixth order in the switching angle cp. Note that aliasing
effects due to
piezoresistanee
are
not
taken into account in the above model.
2
Physics
2.4
of Integrated CMOS Hall Devices
The
of the Double-Hall Sensor
Theory
In addition to the initial calibration of the output
dynamic
several
offset reduction
orthogonal coupling
Hall
plates
of two identical Hall
equal magnetic
have
this offset reduction
practice
physical properties
ment, the
operating regime,
technique
in the
as
regions
spinning
However, this method exhibits only
dynamic
different
sensor
to
tages of known reduction
same
the left
on
the
by
the
plates.
opposite sign,
matching
As
an
improve¬
method \31\ (see section
frequency
range due to
in
of the
by orthogonally switching
current
are
the
2.3.).
switching.
A
for the double-Hall
proposed
the method described in [39] and combines the advan¬
techniques,
w
hereby
the
same
region
active
is simulta¬
measured twice.
The double-Hall
the
a
of
voltages
of the two Hall
limited
plate, there
method is based
limited
strongly
Hall
a
While in the ideal case, the
plates [37].
offset reduction method has been
[401. It is similar
neously
is
of
common
is measured twice
region
such
A
responses and offset
of the active
active
same
techniques.
voltage
by
consists of two
region (see Fig. 2.23).
active
row
sensor
the current
IA
single ended
Hall devices A and B
sharing
Dev ice A is controlled from the contacts in
which generates
field
a
Device B is controlled from the contacts in the
dependent
the
on
row
Hall
voltage VA.
right by
current
1B
delivering signal VD.
Hall device A
jH
o
IA1
—
Hall device B
Hi
Bit—-
——o
i 13
L
VA
B
KMA2
B2
A3
B3
A4
B4
V'
~d}
B
f
O-
-o
»niiiéiimiii,
I substrate
Fig. 2.23: Operating principle of the double-Hall
device A generates
B results in
a
a
&
shielding
sensor.
The
field dependent output VA (B), and the
field dependent output Vß (B).
current
current
IA of Hall
1B of device
2.4 The
independently
Hall devices A and B operate
of the Hall
voltage,
device A, which is
the
Iß-
same
100
pA
biasing
the
active
and
independent operation
[62]. According
region
of the curves, and
depends linearly
a
Hall
the
magnetic
of each Hall device
can
by
means
a
biasing
an
same
be
Fig. 2.24: The magnetic
The devices operate
sensor
of the
Hall
a
current
IA
at
At
response is measured at the
applies
for the
arbitrarily
biasing
independently of
Fig.2.23.
X">
sensitivity
100
IB=
pA
[TJ
only the sensitivity of dexice A, which
to
no
opposite signs.
each other A variation
The inset shows the calculated
of
Fig.
which has
IB
current
response of Flail device A and B simulated
operated according
voltage
contacts Bl
sense
set, e.g., to sensitivities of
Induction B
der
van
the contacts A2 and
response of Hall device/!. To conclude, the
Magnetic
curve.
7^.
of
alternating arrangement
u
changes
(see
current of
constant
a
on
between contact A3 to any other contact (see
magnetic
no
and B3 of Hall device B. The
on
at
to the theorem, the occurrence of
Therefore,
voltage VA
2.23). Consequently,
be understood
can
arbitrary shape requires
of
sense contacts.
A4 generates
influence
slope
FEM
sensitivity
the
influences
changes
remains constant.
Pauw theorem
an
given by
/ only
current
by
shown
currents as
time, the sensitivity of device B operated
The effect of
for
of the
of the Double-Hall Sensor
from each other in terms of
changing biasing
due to the
A variation
Fig. 2.24).
Theory
corresponds
equipotential
lines
to
of
the
of
using
a
FEAL
current
slope of
/
the
double-Hall
2
Physics
of
The offset
structure
on
the
Integrated
voltage
can
CMOS Hall Dev
be reduced
symmetry. The
same
with contacts
conventional
active
sensor
region
on one
ices
by taking advantage of
consists of two
shown in
Fig.
side of the device
can
rectangular
as
Hall
mapping technique defined
plate,
as
ended Hall devices
single
2.23. The
single
be achieved
shown in
the double-Hall
by
a
Fig.
2.25,
Hall
plate
sensor
merged
ended Hall devices
transformation of
using
the conformai
in section 2.2.
(a) conventional Hall plate
Fig.
2.25: The transformation of
device. In the first step, the
deformed in following
the
sense
contacts
way
a
rectangular
contacts
move
to
current contact
one
side
of the
lower
current contact
tacts.
Finally, the active region (white) is understood
is
pulled
over
its
a
single
ended
of the conventional Hall plate (a)
(b): the upper
(dark grey)
to
nearby edge
it is bent and stretched until all contacts end up
and
split
as a
on one
(light grey)
active
a
are
is shrunk,
region, and the
into two
half con¬
rubber-like material;
side of the device
(c).
Theory
2.4 The
single
The symmetry consideration starts with two
Both Hall devices have the
respect
Hall
In
Vn(B)
voltages
Fig. 2.26b,
the Hall
are
sensor
voltages
almost
same
regions
the active
double-Hall
are
For
signal
The residual
given
opposite signs
equal
contacts
(î-A, B) (see Fig. 2.26a).
field direction is rotated
sign of VH(B)
merged together
magnetic
is reversed
to
form the
field direction and
and the offsets of the
single
by
Fig. 2.26c).
Hall device B (see
are
with
orientation of the
IA
=
IB,
Hall devices
signal
=
VA-VB
=
induced offset
over
can
are
same
temperature
and low-cost calibration at any
temperature range
is defined
as
are
sensor
mainly
is
voltage
difference
expected
(2.81)
to be very
due to unavoidable
manufacturing
low.
geometrical
non-idealities do occur,
as
section 2.3). However, since the indi¬
active
region,
perfectly
any drifts of the individual
matched. Therefore, after
arbitrary temperature,
be obtained.
the
2V'IIB(B)+(V^ VR0).
voltages (see
vidual Hall devices share the
voltages
(2.80)
sensor
due to
errors
(2.79)
V'/
=
offset of the double-Hail
[ 12]. Furthermore,
as stress
-V£(Ä),
=
of the double-Hall
Offsets of the individual devices
offset
as
voltage
equal
y ab
well
a
an
and hence, the
of both Hall devices
(Fig. 2.26d).
of
V0(B)
magnetic
field orientation
VA0
errors
its
including
V'H(B)
The output
voltages
magnetic field direction,
in order to have the
Finally,
orientation of current and
and the offset
Hall device A
180°. Then the
ended Hall devices A and B.
field direction. This results in
magnetic
to the
same
of the Double-Hall Sensor
a
low offset
a
over
simple
a
wide
Physics of Integrated
2
CMOS Hall Devices
Hall device B
Hall de vi ce A
induction B
(a)
VAB)
(b)
induction -B
(c)
VH(B)
induction B
(d)
Fig.
2.26: The double-Hall
Hall devices (a). Device A
180
field
sensor
including
fb). Then the magnetic field
orientation
Hall devic
es are
as
is
a
combination of
its
magnetic field
equal single
ended
direction is rotated by
direction is reversed in order to have the
Hall device B (c). Finally, the
merged together
two
to
form
58
active
the double-Hall
same
regions of both single
sensor
(d).
2.2) References
2.5
References
[I]
O.
Madelung,
[2]
K.
Seeger,
[3]
R.A.
Introduction
to
Solid-State Theory,
Semiconductor Physics,
Smith, Semiconductors,
Springer, Berlin,
Springer, Berlin,
1978.
1989.
Cambridge University Press, Cambridge,
1987.
[4]
CM. Wolfe, N.
Holonyak,
and G.E. Stillman, Physical
Properties of Semi¬
conductors, Prentice Hall, London, 1989.
[5]
Grove, Physics and
A.S.
Wiley
[6]
S.M. Sze,
York,
[7]
R.
Technology of Semiconductor Devices,
John
and Sons, New York. 1967.
Physics of Semiconductors Devices,
John
Wiley
and Sons, New
1981.
Popovic. "Hall-effect devices,"
Sensor and Actuators A, vol. 17, p. 39,
1989.
[8]
R.
Popovic, and
Goepel.
vol. 5, W.
[9[
S. Kordic,
W.
Heidenreich, "Magnetogalvanic sensors.'' Sensors.
J. Hesse, J. Zemel
"Integrated
silicon
(eds\
VCH, Weinheim, 1989.
magnetic-field sensors/
Sensor and Actua¬
tors A, vol. 10, p. 347. 1986.
[10]
H.P Baltes, R.S.
Popovic, "Integrated
semiconductor
magnetic
field
sen¬
sors." Proc. IEEE, vol. 74, p. 1107, 1986.
[II]
CS. Roumenin, "Solid state
Actuators, vol. 2, S.
[12]
R.S.
B.E.
[13]
magnetic sensors," Handbook of Sensors
Middeihoek (ed.). Elsevier, Amsterdam, 1994.
Popovic. "Hall effect devices," The Adam Hilger
Jones (ed.), Adam Hilger, Bristol, 1991.
E.H. Hall. "On
a
new
action of the magnet
on
Series
on
and
Sensors,
electric current/ Am. J.
Math., vol. 2, p. 287. 1879.
[14]
G. de
Mey.
"Potential calculations in Hall
and Electron Physics, vol. 61. p. 1. 1984.
plates/ Advances
in Electronics
2
of
Physics
[15]
Integrated
CMOS Hall Devices
Analytical and Numeri¬
Magnetic Fields, John Wiley and Sons, Chich¬
Binns, P.J. Lawrenson,
K.J.
cal Solution
erf Electric
C.W.
and
Trowbridge,
The
ester, 1992.
[16]
Shockley,
W.
"The
theory
of p~n
junctions
in semiconductors and p-n
junc¬
tions in transistors," Bell Svst. Tech../., vol. 28, 1949.
[17]
J. L. Moll, "The evolution of the
tics of p-n
[18]
junctions,"
of the current
characteris¬
Proc. IRE, vol. 45. 1957.
Maier, and H. Baltes., "Offset
reduction in Hall devices
spinning current,"
Steiner,
R.
M.
66,
by
continuous
Sensor and
167, 1998.
p.
Schneider, and H.
Baltes,
"Double-Hall
self-compensated offset." Technical Digest oj
Device Meeting (IEDM '97), p. 991, 1997.
[20]
voltage
R. Steiner, A. Haeberli, F.-P. Steiner. Ch.
Actuators A, vol.
[19]
theory
Ch. Kittel, Introduction
to
sensor
International
Solid State Physics, John
Wiley
with
Electron
and Sons, New
York, 1986.
[21]
Lippmann, and F. Kuhrt, "Der Georaetrieeinfluß auf den Hall-Effekt
rechteckigen Halbleiterplatten/ Z. Naturforscfig.. vol. 13a, p. 474,
H. J.
bei
1958.
[221
H.
Baltes, R. Castagnetti. "Magnetic sensors", in Semiconductor Sensors,
S.M. Sze,
[23]
ed., John Wiley
&
Sons, New York, p. 206, 1994.
J. Haeusler, "Exakte
beim Halleffekt
durch konforme
vol.
Lösungen von Potentialproblemen
Abbildungen," Solid-State Electronics,
9, p. 417,
1966.
[24]
W. Versnel,
"Analysis
of circular Hall
plates
with
equal
finite contacts,"
Solid-State Electronics, vol. 24, p. 63. 1981.
[25]
Versnel, "Analysis of symmetrical Hall plates with finite contacts," J.
Appl. Phys., vol. 53, p. 4659, 1981.
[26]
R.F. Wick, "Solution of the field
W.
Appl. Phys.,
[27]
J.
problem
of the
germanium gyrator,"
I.
vol. 25, p. 741. 1954.
Haeusler, "Die Geometriefunktion
Arch. Elektroteeh., vol. 52. p. 11, 1968.
60
vierelektrodiger Hallgeneratoren/
2.5 References
Lippmann,
[28]
H. J.
[29]
W. Versnel, "The
plate,"
[30]
J.
and F. Kuhn.
[31]
geometrical
Appl. Phys.,
by
Shockley,
rectangular
Hall
kleinen Linea-
Solid-State Electronics, vol. 11. p. 173, 1968.
continuous
of Transducers '97,
W.
a
Lippmann. "Hallgeneratoren mit
R. Steiner. A. Haeberli, F.-P. Steiner, and H.
Hall devices
132]
correction factor for
1968.
vol. 53, p. 4980.1982.
J. Haeusler, and H. J.
risieamgsfehlern,"
Hallgeneratoren, Springer, Berlin,
spinning
Baltes, "Offset reduction in
current."
Digest of Technical Papers
p. 381, 1997.
unipolar field effect transistor,"
"A
Proc,
IRE, vol. 40,
p. 1365, 1952.
L33]
K. A. Pickar. "Ion
implantation
electronic devices,"
Applied
in
silicon-physics, processing
and micro¬
Solid State Science (vol. 5), R. Wolfe (ed.),
Academic Press. New York, 1975.
[34]
C.G.B. Garett, and W.H. Brattain,
"Physical theory
of semiconductor
sur¬
faces," Phys. Rev., vol. 99, p. 376. 1955.
[35]
P. Ashburn,
Design
and Realization
of Bipolar Transistors,
John
Wiley
and
Sons. New York, 1992.
[361
A.A. Bellekom, P.J.A. Munter, "Offset reduction in
plates,"
Sensor and Materials, vol. 5,
no.
spinning-current
Hall
5, pp. 253-263, 1994.
Unknown,
[37)
"Improved Hall devices find new uses: orthogonal coupling
yields sensitive products with reduced voltage offsets and low drift," Elec¬
tron. Weekly, vol. 4, p. 59, 1985.
[38]
S.G. Taranow, et al., "Method for the
compensation
tial
means
voltage
in the Hall
and
voltage
of the
non-equipoten-
for its realization," German
Patent, No. 2333080, 1973.
[39]
R.G. Mani, and K.
tions."
[40]
R.
Appl.
Steiner,
Klitzing.
Phvs. Rett., vol. 64.
M.
self-compensated
Device
von
Schneider,
offset."
"Hall effect under null current condi¬
no.
and
10. p. 1262, 1994.
H.
Technical
Meeting (IEDM '97).
Baltes,
Digest of
p. 991. 1997.
61
"Double-Hall
sensor
International
with
Electron
2
Physics
[41]
of
Integrated
P.J.A. Munter, "A low-offset
Actuators A, vol.
[42]
P.J.A. Munter,
Hall
[43]
spinning
21-23, p. 743,
"Spinning-current
"Origins
S. Bellekom,
current
Hall
Sensors and
method for offset reduction in silicon
University Press, Delft,
of offset in conventional and
Ph. T). Thesis, Delft
plate,"
1990.
Ph. D. Thesis, Delft
plates,"
plates,"
[44]
CMOS Hall Devices
1992.
spinning-current
University Press, Delft,
Hall
1998.
CE. Shannon, "Communication in the presence of noise," Proc. IRE, vol.
37, p. 10, 1949.
Weyl, Symmetry.
[45]
H.
[46]
H. Weiss, "Structure and
Princeton
University
Press. Princeton NJ, 1952.
application of galvanomagnetic devices," Interna¬
of Monographs on Semiconductors (vol. 8), Pergamon Press,
tional Series
Oxford, 1969.
[47]
Ch. Maier, and J. Korvink,
"Equivalent
based
method," Internal
on
the box
Electronics
[48]
integration
Laboratory,
circuit model of resistive
Report,
vol. 98/01.
sensors
Physical
Zuerich, 1998.
CS. Smith, "Piezoresistance effects in
germanium
and silicon,"
Physical
Rev., vol. 94, p. 42, 1954.
[49]
R.W.
"The effect of elastic deformation
of semiconductors," Solid State
ity
[50]
Kcyes,
on
the electrical conductiv¬
Physics, vol. 11,
p. 149, F. Seitz and D.
Turnbell
(eds.).
B.
"Piezo-Hall coefficients of n-type silicon," I. of Appl.
Hälg,
Academic Press, New York. 1960.
Phys.,
vol.
64, pp. 276-282. 1988.
[51]
J.J. Wortman, J.R. Hauser, R.M.
p-n
junction
device
Burger,
characteristics," J.
"Effect of mechanical
of Appl.
stress on
Phys..vol. 35,
no.
7,
p. 2122, 1964.
[52J
A. Nathan, and H. Baltes. Microtransducers CAD: Physical and
tional
153]
Aspects, Springer,
Y Kanda, M.
Migitaka,
Computa¬
Vienna. 1999.
"Effect of mechanical stress
on
the offset
of Hall devices in Si IC" Phys. Stat. Sol. (a), vol. 35. p. I 15. 1976.
voltage
2.5 References
[54]
S. Bellekom, and L. Sarro. "Offset reduction in Hall
ent
plates
in three differ¬
crystal planes." Digest of Technical Papers of Transducers 97,
233,
p.
1997.
[55]
K. Matsuda, Y Kanda. K. Yamamura, K. Suzuki,
"Nonlincarity
of
piezore¬
sistance effect in p- and n-type silicon," Sensor and Actuators A, vol.
21-23, p. 45.1990.
[56]
K.
Matsuda, Y Kanda, K. Suzuki, "Second-order piezoresistance coeffi¬
cients of n-type silicon." Jpn. J. Appl. Phys., vol. 28, p. 1676. 1989.
[57]
K. Matsuda, Y Kanda. K. Yamamura. K.
tance
coefficients of p-lype silicon."
Suzuki, "Second-order piezoresis¬
Jpn.
J.
Appl. Phys.,
vol. 29, p.
1941,
1990.
158]
R.
van
Gestel, "Reliability related
chip approach,"
[59]
D.A.
Ph. D. Thesis. Delft
Journal
Y.
on
University
plastic IC-packages:
a
test
Press. Delft, 1992.
Bittle, J.C. Suhling, R.E. Beaty. R.C Jaeger, and R.W. Johnson,
"Piezoresistive stress
[60]
research
sensor
for structural
erf electronic packaging,
Kanda,
"A
analysis
of electronic
packages,"
vol. 113, p. 203, 1991.
graphical representation
of the
piezoresistance coefficients
in
silicon," IEEE Trans. Electron Devices, vol. ED-29, p. 64, 1982.
[61]
Y Kanda. "Piezoresistance effect in silicon." Sensor and Actuators A, vol.
28,
[62]
L.J.
p. 83, 1991.
van
der
Pauvv,
Hall-Koeffizienten
an
"Messung
Scheibchen
seh., yol 20, p. 230, 1958.
63
spezifischen Widerstandes und
beliebiger Form," Philips Tech. Runddes
2
Physics
of
Integrated
CMOS Hall Devices
64
Design Considerations
3.1
3 Lateral CMOS
Hall Devices
This
chapter
CMOS
deals with the
technology.
described in this
and structures
devices is
design
The necessary
chapter
layers
in section 3.1.
compared.
are
and characterization of lateral Hall devices in
for
Additionally,
The electrical and
investigated through
by
of
use
a
double-Hall
on
sensor are
this
technology
different device
developed
the continuous
investigated.
are
geometries
magnetic performance
the two resistor model
Furthermore, offset reduction methods based
method and
designs using
of Hall
in section 2.2.
spinning
The
current
investigations
take into account mechanical stress and temperature effects.
3.1
Design Considerations
CMOS
The
Technology
in this thesis
Mikro
a
International AG, Austria. The
starting
four inch <100> p-type silicon wafers.
material
together
with
a
properties
determine the
n-well,
to
n-
device,
sensor
and
p-diffusions
i.e..
the
active
Austria
a cross
section
or
CXE
applies
region.
serve as
The
polysilicon layer.
of Hall devices pre¬
to
all standard CMOS
following layers:
a
design
a
the conducting channel of the
active
a
region
is
contacted
p+-source-/drain-diffusion
are
by
the CMOS
65
by
or
used for elec¬
and manufacture of lateral Hall devices
the process steps prov ided
transis¬
gate oxide layer, and
Metallization and various dielectric layers
trical interconnection. The
only
by
realized in CYE
for source/drain-contacts,
n+-source-/drain-diffusions and covered either by
on
3.1 shows
performance
4]. These processes prov ide at least the
metallization. The transistor n-well will
a
Fig.
reported
material of the above pro¬
poly-poly capacitor
here, the operating principle of the
processes [1
Hall
of the lateral Hall devices
technology.
Although,
sented
implementation
the 0.8 pm CMOS processes CYE and CXE offered
CMOS inverter
process
tor
are
Systeme
cesses are
of
used for the
technology
technology. Therefore,
depend
no
addi-
3 Lateral CMOS Hall Devices
Fig. 3.1: Cross
CXE
or
a
inverter and
a
poly-poly capacitor
is necessary,
it
as
can
be in other
in CYE
structures based
sensor
CMOS process. Furthermore, fabrication of Hall devices in
provides
CMOS process
the
of a CMOS
technology.
post-processing
tional
on
section
many
reliability aspects
such
as
long
an
term
industrial
stability
of
sensor.
Geometry
The
physical layout
input
the
of the Hall device determines its
resistance R (see
magnetic
plate-like
tioned
near
region
of
boundary
the
ing
and another for
are
in
placed
Eq. (2.21 )). sensitivity Sa (see Eq. (2.20)),
response. For
active
performance
practical applications,
sensing
plate.
The contacts
the output
and
linearity
of
the Hall device consists of
homogeneous conductivity,
of the
in terms of the
are
and four contacts
divided in
voltage. Thereby,
the two
a
posi¬
pairs
for bias¬
sense
contacts
way where
age
approximately equal potential at zero magnetic field is
corresponding common mode voltage should equal half of the volt¬
drop over the input resistance. As a result, and in terms of the spinning cur¬
rent
offset reduction method,
a
attained. The
ized with the
Concerning
shapes
are
a
symmetrical shape
homogeneously doped
the
equivalent
a
two
fold symmetry real¬
transistor n-well is recommended.
galvanomagnetic properties,
and described
with
by
their
all
singly-connected
geometrical
Hall
plate
correction factors [5 to
7]. However, design constrains of the CMOS process propose certain geometries
which
are
better suited when manufactured in this
66
technology [1
to
4].
3.1
Greek Cross
(GK)
Design
Square A
Considerations
Square
B
Layout
Area
Consumption
64
Input
•
64
pm2
Resistance
0.835
1.00
RVRGK
0.849
0.627
Sensitivity
Comparison of
rical Hall plate
the
geometries
An overview of
the
The
scaled
the
by
possible symmetric
corresponding
following
1.143
meas
1.070
0.957
1.022
0.832
0.992
of the
figures of
Hall
a
sensitivity Sa of symmet¬
Greek
plate geometries
input resistance
measurement
measurements
1.021
resistance R and the
input
simulated, calculated, and measured
pared.
1.141
cak
0.952
1.00
Sa7S aGK
Tab. 3.1 :
s,,n
R and
cross
is
(GK).
given
Tab. 3.1. The
sensitivity Sa
is
com¬
setup, which will be additionally used for
same
properties,
is shown in
Fig.
3.2. Good
agreement is achieved between simulation and calculation (see Tab. 3.1). The dis-
substrate contact
Fig.
3.2:
Setup
to measure
the input resistance R and the sensitivity
device in this work.
67
Sa of a
Hall
3 Lateral CMOS Hall Devices
crepancy with the
measurement
result is due to the
junction
sidered in the theoretical studies/The results do not propose
the above
geometries. However,
tivity
and considerable
active
region
and the electrical contacts
potential
of the
layers
is used in the
are
may have
distribution in the active
effects (see section 2.2) this
offset
causes
voltages
Cross arrangement since
voltage gradients in
the lowest
Another
layers
important design aspect
an
or a
p+-diffusion
electrical shield and
which
higher input resistance
is the
cover
cover
CMOS
impact
area
for the Greek
of the
possibilities,
contacts
EMC. The
these
R and
a
Different
cover
fabrication process suggest
a
Hall device
either
sion layer.
68
a
a
The
polysilicon gate
The
higher sensitivity Sa
layers for
are:
region.
polysilicon layer serves as
p+-diffusion layer also serves as an
layer (see Fig. 3.3).
improves
of the active
layer
region.
As
result,
a
a
is achieved at the expense of
i)
3.3:
perturbation
not be cancelled
can
surrounding
electrical shield, but reduces the thickness of the active
Fig.
layers of
[8].
CMOS fabrication process allows two
oxide,
the
a
The
Combined with non-linear
has the least
of different
in
for
sensi¬
following designs.
resulting
mismatch
region.
dynamically. Mismatch
are
highest
fabricated with two different
a
con¬
particular shape
the Greek Cross arrangement with
input resistance
the CMOS process. These
a
field effect not
poly-shielding
shaped
as a
Greek
polysilicon gate oxide,
cross.
or a
p
The
^-diffu¬
3.1 Design Considerations
400
ç>V3
=
p+-co\ er laver x^
5.0V
<x
2.5 V
0.0 V
V3
=
0.0 V,
2.5 V,
0.3
0.6
Biasing
Current I
Fig. 3.4: Measured sensitivity Sa of Hull
ferent
layers and
cover
responding
biasing
devices
conditions.
power related sensitivity
0.9
1.2
[mA]
shaped
Additionally,
plotted for
as
Greek Cross
for dif¬
the inset shows the
all conditions in
the
cor¬
same
graph.
non-linear behavior. Measurement results
a more
are
dependence
of the
Additionally,
region
terms
a
sensitivity
on
large influence
and the substrate
can
is achieved (see
In summary,
cated in
a
layout
a
Greek
on
cross
is least
the
shape
of the device
p/diffusion layer
was
different
layer
layout possibilities
results in
current
more
than with
voltage difference
=
S J HR
is the most
Combining high
on
non-linear
poly-shielding.
between the active
no
suited,
improvement
to
design
a
sensitivirv and low
region,
shielding
a
69
perfor¬
input resistance,
as
polysilicon gate oxide
layer
is
mis¬
recom¬
of electric fields with low influence
performance. However,
used.
in the
Hall device fabri¬
fabrication non-idealities, such
the active
mended. The gate oxide allows
linearity
on
be observed due to the JFET effect [9]. However, in
dependent
cover
cover
biasing
sensitivity Sp
inset of Fig. 3.4).
CMOS process.
match. In order to
the
the
of the power related
mance
the
p+-diffusion
shown in Fig. 3.4. A
to
study non-linear
on
effects
a
3 Lateral CMOS Hall Devices
Electrical and
3.2
Magnetic Performance
Linearity of the Magnetic Response
In addition to offset
by
a
the
linearity. According
set of measured Hall
less
non-linearity
metrical
as a
to
[ 10] the non-linearity is defined
from
voltages
a
corresponding
is classified in two groups:
scattering
constant value
factor
the Hall
the deviation of
non-linearity
is caused
and
the
by
non-linearity
is
angle \iHnB < 0.01, values of NLS1
other hand, non-linearity is also caused by
Hall
[ 10].
With
a
=
in the range of
are
the
depen¬
(3.1)
coefficient
non-linearity
geo¬
given by
-y\i-H„B-
=
a
angle (see Eq. 2.18). Assuming
(see Eq. 2.20). the material
NLu
where y is the material
on
material
a
as
linear fit. The dimension-
non-linearity
The material
non-linearity [10].
dence of the Hall
G$lt
the absolute accuracy of Hall devices is determined
voltages,
dependence of
0.35
[10] and
<50ppm.
the
On the
the geometry factor
10
40
>
20
>
0
o
10
73
>
o
c
-o
—
-5
7,3
=
0.5
mA
-10
10
0.0
-0.1
with
below 5
measurement
p+-cover.
flV
which
With
a
0.2
0.1
Magnetic
cross
ö
o
0
Fig. 3.5: Linearity
>->
£
corresponds
to
Induction B
of four
biasing
0.3
contact
current
150ppm
70
of 1B
in
a
0.4
[T]
Hall device
-
shaped
as
0.5 mA the linearity
±0.3 Trange.
Greek
error
is
3.2 Electrical and
magnetic induction,
the
on
Assuming RjqJl
is
a
i.e.
Magnetic
Performance
geometrical non-linearity (see Tab. 2.2).
(see Eq. 2.20). the geometrical non-linearity
the
constant value
results in
NLG~^iCpluB2,
ß
where
is
a
numerical coefficient [10]. With
Hall devices with hlk
=
1 values of
Hall device
ing
shaped
Greek
as a
<
0.02
cross
to a
full scale
Variation of Device
The electrical and
gated
in terms of
non-linearity
a
=
5um/5um
cross
arrangement of the
expected [10]. Consequently, the
=
I is shown in
linear lit
is
non-linearity
Fig.
below 5
3.5. At
pV, which
strengths
a
of
bias¬
corre¬
up to 0.3 m'T.
Geometry
of Greek
cross
Hall devices is investi¬
variation of the aspect ratio hlk and the absolute size /?. The
aspect ratio ranged from 0.5 (10 pm/20 pm)
/?//l
Greek
of 150 ppm for field
magnetic performance
a
are
with hlk
current of 0.5 niA the deviation from
sponds
a
is in the order of 5 ppm. The measured
geometrical non-linearity
a
ß
(3.2)
hlk
=
20
pm/20
urn
hlk
71
to
=
1.5 (30
pm/20 pm).
80 um/80 urn
whereas the
3 Lateral CMOS Hall Devices
absolute size varied from 5 pm
to
80 pm
at
h/k= J
(see Fig. 3.6).
conditions for the current / changed from 0 to 2 mA with
voltage V3
The
analytical
input
the
from 0
5 V
to
model derived in section 2.2 allows
sensitivity
of
first step the Hall device with its Greek
gular
conformai
by
field effect is
applied.
mapping.
corresponding
the
Tab.
an
3.2)
In the next
input
can
be
presented
as
1x10
=
20
in
Fig.
a
In
a
rectan¬
step, the model of the junction
profites
However,
large variations,
only
were
derived from
doping profiles
and
in the order of 40%,
fair agreement between
measure¬
3.7 and their extracted parameters (see
sensitivity
pm/20 pm
of
a
Greek
cross
calculated and
was
Hall device with
compared
with
mea-
20
p+-cover layer
/»m
1x10
arbitrary shape.
of
expected.
resistance and the
aspect ratio of hlk
approximate calculation
is transformed into
to be known. These
sheet resistances have
simulation results
the
shape
modeling [11] (see Fig. 3.7).
doping profiles
With
an
Hall device of
a
cross
due to fabrication constraints. Therefore,
ment and
change in substrate
a
In order to compare the measurement results with the
model, the doping profiles have
fabrication process
biasing
(see Fig. 3.2).
resistance and the
device
The
19
,o,
o
lxKV
f
lxlO17
threshold
O
implant
Gaussian
,iaS»aKK333K»
profile
lxlO16
U
doping
of nwell
bû
&
ixi0
o
15
%& yfyyyyyyyyjyyyyyyy)jyvryy]
Q
background doping
0
3
12
Junction
The
region
// layer
is
defined
is used
as
to
be the Gaussian
cover
o) the nwell.
5
Depth [pm]
Fig. 3.7: Doping profiles derived from fabrication
active
4
process simulations
doping profile of
[11]. The
the transistor nwell.
3.2 Electrical and Magnetic Performance
sûrement data. Two additional
value
and
RFnweii
from the actual
RFnpjtts. They
physical
describe the
4>
1.2H013cnf2
tance is
possible
4.4-1019 cm"3
PP
1p
0.75 pm
RP
0.21 pm
RFimrll
-0.85 pm
t,n
0.15 pm
RF
1X1
Po
7.6-10l4cnr3
to
0.11 pm
nplus
X
1
doping profiles of Fig.
with the
the
input voltage drop,
and the
range for these results determined
possible
Good agreement is achieved for the
predicted
to be too
are
a more
field effect. Relative
parameters of the
Sa against
by
were
minimum and
specification (see
whereas the
input
resis¬
sensitivity
3.9 and 3.10. For smaller fea¬
explanation
An
A I/a and the
can
be observed, but, the
for this
can
be found in the
of the device geometry, due to the bias
increase for smaller devices. Thus, simulations
with measured values within the accuracy of the
doping profiles
used
the device size for different
/; between 10 pm and 20 pm (see
length
Figs.
non-linear behavior
changes
dependent insulating junction,
show excellent agreement
input voltage drop
shown in
sensitivity improves only moderately.
for
sensitivity,
sensitivity
range due to process variations.
sizes of the Hall device,
junction
(see also
low. However, the deviation is much smaller than the
for different absolute sizes //
ture
3.7
2.53)).
Measurements and simulations of the
Sa
designed length
Value
maximum sheet resistance values achieved from the process
Fig. 3.8).
a
1.51 pm
input resistance expressed by
compared
deviation of
Quantity
Value
Tab. 3.2: Parameters extracted from the
The
mean
the reduction
value.
Quantity
Eqs. (2.21
must be introduced:
parameters
as
boundary
values.
voltage drops Af/4-
Fig. 3.11).
h smaller than 10 pm.
73
A
drop
in
Plotting the sensitivity
recommends
performance
a
length
is observed,
3 Lateral CMOS Hall Devices
400
20
range defined by
sheet resistance
^
>
300
15
>
a
<
.<p
,„0^
en
sO°'
,„9>v
f^8
-o
>oö'
.ovi-
oû<^
>ô0<^
^Qy
0.0
0.5
3.8: Calculated
1.0
°
-
^
-C~
o,
a
20
=
fim/20
of
the
fim
doped
2.0
[mA]
and sensitivit\-
compared
possible
1.5
Current
input voltage drop
shown within their
Changing
^°8
C3
«&**
simulation
Biasing
sheet resistances
(U
Ö/J
i^
0
are
<p^-
^ov
100
device with h/k
10 Q
#>K
measurement
S
o
^
200
'>
Fig.
3
>
with
of
a
measurement
Greek
cross
results. The values
range determined bx minimum and maximum
areas.
the aspect ratio hlk of
a
Greek
cross
Hall device towards smaller values
reduces the
input voltage drop (see Fig. 3.12). At the same time, the
change in sensitivity is not as large (see Fig. 3.13). However, according
the geometrical non-linearity of a Greek cross is defined as
ß
exp[-7r///£]
=
which limits the aspect ratio to
linearity
for different
As
a
0.5
...
Hall device
=
the
conclusion, the geometry of
for
a
influence of the bias
=
range of hlk
sensitivity Sa
voltage drops Al/4 (see Fig. 3.14).
high sensitivity
h/k
Again,
a
a
is
....
1.0
to
Hall device has to be
shaped
cross.
Greek
ol /;
10 pm
=
74
...
[10],
the aspect ratio
optimized
in terms of
biasing voltage, low non-lmearity. and
dependent insulating junction. Therefore, aspect
sizes
to
maintain reasonable
plotted against
certain
1.0 and absolute
as
0.5
relative
(3.3)
-3e\p[-Jt/i/Jll'
Ï.871
of the device.
Hall
20 pm
aie
minimal
ratios of
recommended for
a
3.2 Electrical and Magnetic Performance
300
12
o
-
>
-
-
0
o
0
<1
"s
a*
=
5 pm
o
c
-
(D
Ö
%r
s
i
0 «
.
0.0
=
1,,,.
0.5
Biasing
Hall device
£< AJ
sO
#
-
'J
-
80 pm
1
i
1.0
1.5
.
,
(simulation:
Cross
line).
80 pm
=
,,,
0.5
Biasing
[mA]
grey
S
!
0.0
2.0
of a Greek
jfy
0
.
.
iV
Jy
5
-
C/5
Current
absolute sizes S
=
A3 &
100
Voltage Drop AV24 of differ¬
F/e. i.9:
O
p
s
t//
/
4
i—[
200
Ei
o
o
0
0
0
P
ent
-
>
o
1.0
1.5
Current
2.0
[mA]
Fl'g. 3.10: Sensitivity! Sa for different
absolute sizes S.
ence can
Only
a
small
influ¬
be observed.
250
200
H
150
-
100
-
00
.>
50
0
0
20
60
40
Device Size
Fig.
3. If :
Sensitivity Scl
voltage drop AV14.
due to
a
for
a
which is
Greek
[pm]
function of the device size for different values of the
The deviation between
voltage drop
recommended
as a
80
cross
predicted
measurement
too
Hall device.
results and simulation is
low. A range
of h
=
10... 20 [im is
3 Lateral CMOS Hall Devices
300
>
>
>
<1
200
&
O
AR =1.5
S-l
Q
0)
cd
100
to
0
ö
0
0.0
0.5
1.0
Biasing
1.5
2.0
0.0
Current [mA]
0.5
Biasing
1.0
1.5
Current
2.0
[mA]
Fig. 3.12: Voltage Drop
AV24 of dif¬
Fig.
ferent
Greek Cross
aspect ratios. Excellent agreement
of
aspect ratios
Hall device
a
(simulation:
grey line).
3.13:
Sensitivity ^a for different
simulation and
experiment
of
is shown.
240
in
to
0.50
0.75
LOO
Aspect
Fig. 3.14: Sensitivity Sa
voltage drop AVS^.
is recommended for
as a
1.25
Ratio [-]
function of the aspect
ratio
for different values of the
Due to linearity considerations range
a
Greek
cross
Hall device.
76
1.50
of h/k
=
0.5
...
1.0 pm
3.3
3.3
Implementation
of Offset Reduction
Implementation
Continuous
by
Continuous
of Offset Reduction
Spinning
Spinning
Current
by
Current
Basic Measurements
The continuous
device, shaped
to the
spinning
as a
Greek
chip plane [8].
pairs (13)
in contact
a
cross,
method is demonstrated with
that is sensitive to
The method is based
and (24).
the device consists of
fabricated in
current
a
shown in
weakly-doped
p-substrate.
section 2.2). A shallow
as
p+
The active
diffusion,
four
on
Fig.
contact
3.15. The
has
covering
a
CMOS Hall
magnetic fields perpendicular
n-well resistor of
region
a
Hall devices
specific
a
the substrate, reduces the thickness of the conductive
region
of
CMOS process and is
ratio hlk of 33
the active
active
arranged
region
layer and
pm/22 pm (see
and contacted
to
thus increases its
sensitivity.
Insulation between the active
biased
region
pn-junction. The biasing
and the
p-substrate
current causes an
between the contacts and the substrate, which
occurs
electrical
changes
due to
a reverse
potential difference
with the distance from the
contacts
Fig.
an
3.15: A four contact CMOS Hall device
active
cross
region fabricated in
shaped device
ered with
a
shallow
is in
p+
a
consisting of an
(lOO)-p-substrate.
n-well resistor
The orientation of the Greek
[1 lOf-direclion. Additionally, the active region
diffusion.
77
as
is
cov¬
3 Lateral CMOS Hall Devices
contacts. This
quently,
ness
a
change
variation in the
causes a
variation in the thickness of the Hall
of the active
region
724 (see Eqs. (2.66)
voltage V/
is
kept
tance due to the
is modulated
(2.67)). In
and
As
constant.
junction
7j3
Iq
3.16c).
or
7|3
This
=
the
-70
causes
VH 0(B, (p)
is
mean
an
the harmonic
measurement
result, the Hall
voltage Vsilh.
source
full
over a
a)
For
a)
device. The
/n
'/
I]}
=
/()
and c)
I\t,
-/().
non-linearities which does
section
are
lB
according
to
y sub
causes
77//s
not
Fig.
of, e.g.,
of (p.
*
r~i
lB
Vi
asxmmetric
thickness of the active
=
case
V,
I
hi
Setup which
asymmetrically
in the
-0
ub'i
y sub
i^U
mean
shown in
with its non-linear resis¬
example,
switching period
4L
Fig. 3.16:
/) ^ and
Fig.3.16 the
currents
<D
ADv
c)
plate,
as
the thick¬
of offset which is not cancelled when
B
b]
setup
biasing
conse¬
thickness of the active region differs (Fig. 3.16b and
additional
averaged
plate [9, 12]. Therefore,
field effect (see section 2.2). is biased
with respect to the substrate
=
a
a
by
depletion layer width and,
causes
\7 ub
biasing
conditions
region differs
an
additional
in
the
source
for the Hall
of
of,
e.g.,
b)
offset due
to
case
cancel. The layers shown in the Hall device
3. f
78
cross
3.3
Implementation
of Offset Reduction
Fig.
by
Continuous
Spinning
3.17: Measurement setup
cuitry
with cir¬
control the substrate
to
Current
voltage
Vvll[r ensuring symmetric operation.
In order to
shown in
overcome
Fig.
the
measurement
3.17. The control
the average value of the contact
Vmb
at a constant
400
H
value
VH,r
A
without
o
with
As
induced offset, the setup
circuitry keeps
voltages V, (i
a
result, the
circuitry
circuitry
the
potential
as
1, 2, 3, and 4) and the substrate
=
operating regime
A
>
modified
difference between
8
and
without
I
£
symmetrical
is
Au with
>00
was
circuitry
circuitry
1—1
>
o
1
x
4
>
tri
C/)
bp
>-,
0
+->
-t—!
75
i>
>
0J
-200
C
<v
/
en
n
-400
-0.3
Biasing
Fig.
to
3.18:
-8
12
-0.6
Sa
_4
4-J
en
0.0
0.3
Current I
Measurement
0
0.6
Fig.
Vq
with (o) and without (A) circuitry
control the substrate
voltage VslliY
Jl
271
371/2
Switching Angled [-]
[mA]
sensitivity
71/2
3.19:
due
to
Change of residual offset
symmetric
biasing
tions with (O) and without
circuitry.
79
condi¬
(A) control
3 Lateral CMOS Hall Devices
no
offset is induced
determining
tion of the
by
the thickness
biasing
biasing
dependent sensitivity Sa
7t v With
(see Fig. 3.18).
can
of the Hall device
the control setup, the
by
be shown
func¬
as a
non-linearity
of
Sa
is
signal Vfh f)(B, (p) can be measured for any angle (p with
(Eqs. (2.68) and (2.69)). It allows a more detailed investigation
above setup the
Using
four
contacts
of the offset behavior than discrete
ing
due to non-linearities. This
current
reduced below 0.2%
only
the
theory
to
sampling
as
the Fourier series of the residual offset
Therefore, only
Vn 0(B, (p)
example of the
are
a
[J 3]. However, accord¬
shown in
V0
limited number of measurements per
necessary and determined to be 32 steps
is of limited order.
period
of the
signal
experimentally [14].
An
measured response
Vu 0(B, (p) is shown in Fig. 3.19. It is mea¬
sured with and without control circuitry. For a biasing current of /u
0.5 mA, the
residual offsets expressed in an equivalent magnetic field below 10 pV were mea¬
=
sured
[8]. These
mately
Finally,
ning
measurements
the noise level of the
the
magnetic
current method
indicated that
sensor
together
was
measured
spinning
Magnetic
current
response
0.0
of
pT
was
operated
an
spin¬
excel-
0.2
Induction B [T|
6 Hall devices
method. A full scale
approxi¬
with continuous
(Fig. 3.20). In the range of ±0.3 mT,
Magnetic
3.20:
range of ±10
with the measurement setup.
response of 6 Hall devices
-0.2
Fig.
a
operated
non-linearity
80
with the continuous
below 0.05c7c is achieved.
3.3
lent
of Offset Reduction
Implementation
non-linearity
by
below 0.05% is achieved. The
Continuous
Spinning
non-linearity
is caused
sensor
itself, the setup for the offset reduction,
paring
the result with the
only
factor of 3 due to the offset reduction method is observed.
a
non-linearity
Influence of Mechanical Stress
Hall devices suffer from
the
Although
sensors.
such
a
the offset
is caused
by
voltage
voltage
the Offset
which
is caused
are
by
introduced
due to intrinsic stress caused
[15, 17]. Furthermore, the
the
by
distribution
stress
changes
and affect the
long-term stability
with the switched
limits the
response due to the discrete
detailed
their
knowledge
spatial
of the stress
Fourier
expansion
or
dependence
continues
sensor
ness
with respect
of the
applies
gation
the
crystal
theory developed
continuous
a
to
spinning
current
on
the
initial
factory trimming
cancelling
spinning
current
a
In
a
four-point bending
preferred
in section 2.3 is verified
method
[8] and
ning
method,
calibration
setup is shown in
glue.
To achieve
Fig.
are
sampling
fre¬
of
orientations of the Hall
on
by
four
a
measurements
using
point bending bridge
the
that
the device 115]. However, the investi¬
and the
phase angle
of the offset
a
voltage
large,
statis¬
samples.
experiment,
of well-defined stress and the resultant
current
a
orientation for minimal initial offset. The valid-
angular frequency
relevant number of
method
precise understanding
components rather than absolute amplitudes, which would require
tically
the offset
of the offset components in terms of
may suggest
well-defined mechanical stress
focuses
thin films
the life-time of the
is essential to choose the minimum
voltage
fabrication
sampling [18]. Therefore,
quency to cancel all stress contributions. Furthermore,
the stress induced offset
during
Sources of
conducting
of the device. However,
voltage dynamically
frequency
the main contribution
over
by
of
of effects,
variety
process and
device. Therefore, stress effects cannot be cancelled
performance
subjected [16].
dielectric and
by overlying
the
wide
a
properties,
packaging
Voltage
degrades
mechanical stress to which the device is
mechanical stress
the
and the reference magnet. Com¬
on
fabrication processes and environmental
as
by
of the bare Hall device (NT< 0.015%),
Dependence
offset
large
Current
a
Hall
sensor
voltages, according
is
placed
high reproducibility
and
81
an
a
the continuous
measured. A schematic illustration of the
3.21. The Hall device die is bonded
in
on a
state
spin¬
experimental
steel bar
by
epoxy
uniform interlace between the steel
3 Lateral CMOS Hall Devices
T//2
|
-FI2
-F12
3.21:
Fig.
Four-point bending bridge
die is attached in the
arranged
at
bonding
positions B,
aligned
sor
die
defined
freely
the
by
common
strip
process
a
with
an
more
packaged,
completed
sensor
displacement Ad,
sensor
force
a
commercial die bonder,
supported by
couple
is
two knife
applied
of the
four-point bending
approach
by incorporating
a
under
analytically
sensor to
with
stress
is calculated
modeling.
region
the steel bar and
element
sensor
die
calibration
requires
die bonded
distribution in devices
as a
are
sen¬
a
and
silicon
calculate the stress distribution
a sensor
lead frame and
sensor
in the coordinate system of the
the bar
four-point bending setup
investigation.
application
using finite
the steel
the geometry of the
sample
Hall
on
to
edges
mechanical stress is introduced
of the
integrated
active
a
properties
g.,
on a
Accordingly,
deform under the force load and
realistic conditions of the
e.
die.
chanical stress distribution in the
shaped
apply
to
supports
where the supports to introduce the forces
in the die [15]. However, the
gives
was
known distance. A force
with the center of the Flail
the mechanical
The
the bar and the
ESEC S.A., Switzerland. The steel bar is
by
locations/!, spaced by
bar at
steel bar under load. The
a
symmetrically.
bar and the die, the
offered
of
center
with
on
a
conventionally
plastic molding [19].
function of the
steel bar
The
me¬
displacement Ad,
The stress components
are
calculated
die, which is aligned with the Greek
cross
(see section 2.3). The main contribution of mechanical
3.3
Implementation
1.0
2.0
1.5
Displacement
Fig.
ses
3.22:
in the
the
Calculated
sensor
die
element
stress
axial
the
<7t6, cr^ and ö;,
from the
discussed in
by
are
Fig. 3.23).
non-zero
than
3.28:
axial
by finite
Ad
Calculated
[mm]
off-plane
and
shear
introduced in the
sensor
stress
2.5
stresses
die
as a
[unction erf displacement.
in-plane
axial components cis, and ct(2 (see
perpendicular
importance
However, the
to
the die
with
resulting
Eq. (2.68))
a
components. Therefore, the following
terms
of the
displacement
in the
and the
sw
stress
Ad of the
dependence
itching angle
periodic
resistive
=
\Z24(^^ cp)sin(cp)
+
is
voltage
the shear stresses
a
linear combination of
measurement
results will be
four-point bending bridge
rather
stress.
is discussed
(p of the
Fig. 3.22).
contribution in the range of 1% of
periodic
V/
0
V14(B, (p)cos((p)-Vn(ß.(p)sin((p)
H.O
surface, and
stress tensor
the absolute values of the mechanical
dependence
vr.o
Fig.
stres¬
Current
2.0
Displacement
four-point
of minor
First, the mechanical
V
Spinning
1.5
1.0
[unction of
determined
The stress component rjw.
its
2.5
Continuous
modeling.
originates
cts) (see
by
Ad [mm]
as a
displacement of
bending bridge
of Offset Reduction
Fn(#Ap)eos((p)
considering
offset
the
voltage VH
spatial
0
(see
(see Eq. (2.69))
=
_
Y A„sm(//(p
Xn),
(3.4)
^Bnùn(nip+ \)n).
(3.5)
+
3 Lateral CMOS Hall Devices
The initial condition at
deflection Ad
a
from theory, offset and resistive
phase angles (see Eqs. (3.4)
and
=
voltage
1mm is shown in
have similar
phase angles approximately along
contacts, i.e.,
at
resistive
(p
=
voltage
n,
switching angle
rier series (see
ponents
An
shown in
cp. As
a
and
Bu
and
the symmetry
was
zero
of the device
axes
contrast, zero transitions for the
from the
by
shifted
orthogonal
n/4
nature of
at, i.e.,
the above
measured in 32 discrete steps of the
periodic voltages
(3.5)) allowing
periodic
expected
with different
amplitudes
angles (p phase
resulting
result, the
Eqs. (3.4)
of different
Fig.
,
at
angular dependence
The
voltages
3n/2, 2n. In
be observed
can
7i/4, 3rc/4. 571/4, 7tc/4
voltages.
of
0.7t/2,
=
3.24. As
(3.5)). The periodic offset voltage exhibits
transitions for
(p
Fig.
orders in the
discuss
to
be
can
represented by
sources
switching angle
of the Fourier series for
VH
and
a
a
Fou¬
of offset in terms
(p. Calculated
com¬
VR0, respectively,
are
3.25. The Fourier series is dominated
and fourth order in the
switching angle
by components in the second
appearing with same amplitude for
tp.
1x10>
>
G
03
1x10
1
0
o
<
X
>
<D
I
S
4—»
1
lxlO-"
o
a
o
CD
U
tz>
1x10"
o
O
lxl0~2
71/2
371/2
71
Switching Angle
Fig.
3.24:
VR 0
switching angle
the
a
[-]
0
(p.
lxJ0~
erf
the
and the resistive volt-
measured
exhibits
^
Spatial representation
offset voltage VhL
age
271
in
77;c
32
steps
resistive
phase shift of Tl/4
of the
Fig.
the
3.25:
offset voltage VH
resistive
voltage fifteenth
with respect to
offset voltage
Spatial spectrum of
bution
voltage VR
up to the
the spectrum
in
the
can
second
fourth Fourier orders.
84
and the
order. The main contri-
to
observed
f)
0
be
and
3.3
Implementation
offset and resistive
voltage,
of Offset Reduction
i. e., A-,
B2
=
and
by
At
Continuous
=
Spinning
B4. Furthermore,
tion of components in the first, third, fifth and sixth orders
can
Current
contribu¬
be observed which
will be discussed later. However, components of the seventh order and
have
only
minor
a
impact
on
the Fourier series with values below 10
higher
pV.
;'). Zero order contribution
The
order contribution of the Fourier series
zero
set, determines the
distinguish
case
between the offset
of the
than for the
the
performance
example
spinning
current
uncompensated
shown in
A(),
also called the residual off¬
of the offset reduction method since
voltage
and the Hall
voltage. Nevertheless,
ear
on
resulting
case
Fig. 3.24,
mechanical stress
effects caused
by
the
in values of
the number of
samples
still be observed,
can
a
junction
field effect
taken allows the cancella¬
the
spinning
small
a
depen¬
from non-lin¬
(see Fig. 3.26 and section 2.3).
ical stress values, is below the noise level of the
perform
in the
few microvolts [20]. In
possibly resulting
However, the change in the residual offset voltage,
used to
not
method, the contribution is several orders smaller
tion of Fourier components up to the fifteenth order. However,
dence
one can
over a
wide range of mechan¬
appropriate
front-end
circuitry
system configuration [21].
current
45.0
>
V
I 30.0
o
<
o
o
O
>
<
§
o
0
1
o
SB
g
e
o
©A
CD
©
V
i
S
o
six test
tion
o
Û q
c
A
11
V
o
<
S
-
8
samples.
CD
o
0
-
0.0
T3
si
<D
-15.0
2.0
1.5
Change of the
15.0
^-<
Displacement
3.26:
D
0
1.0
Fig.
O
A
v
o
0
o
O
A
o
o
0
residual
The number of
erf Fourier components up
to
offset
Ad
[mm]
in the presence of mechanical stress
samples
the
lz>
taken per
fifteenth
order.
period
for
alloxvs the cancella¬
3 Lateral CMOS Hall Devices
ii). First and third order contributions
Although
the
spinning
odd harmonics of the
2.3),
investigation
an
odd harmonic offset
which is
given by
3.28). Since
their stress
is necessary
to
sensor
voltages
device
are
(p. due
and the
due to
of offset
layout
under test cancels offset
subsequent
numerical
junction thickness
no
stress
the first and third harmonic offset
dependence
prediction
in
calculations,
the
have the
has to be of similar order, but, not
only
phase shift,
dependence (see Fig.
voltages
of their
modulation with
amplitude. Furthermore,
shows
voltages,
device symmetry (see section
to
confirm the theoretical
to
Eq. (2.78)
dependence
minor stress
Hall
switching angle
According
occurrence.
a
current
3.27 and
same
necessarily
origin,
of
same
phase angle Xn.
Hi). Second order contribution
The main contribution
switching angle (p
ture
to
the offset
caused
voltage
by piezoresistive effects,
[16] (see Fig. 3.29). According
ulation the stress
is of the second harmonic order in the
as
already reported
theory (see Eq. (2.76))
to
dependence suggests
in litera¬
and numerical sim¬
the orientation of the CMOS Hall device.
5
>
<
<
a
"bü
CD
Ö
Ö
<
O
<
CD
a
CO
ci
o
U
ç^
O
1.0
Displacement
Fig.
3.27: Stress
the
switching angle
angle
is
given by
and shows
no
the
first order
(p.
77?e
Fig. 3.28:
Stress
third order
in
phase
behavior is
the device layout
stress
1.5
2.0
Displacement
dependence of
offset component of
the
Ad [mm|
occurring
dependence.
86
Ad
2.5
[mm]
dependence of
offset components.
similar
in the
first
to
the
The
offset voltages
order.
3.3
For
to
of Offset Reduction
Implementation
predominant
axial stresses,
by
mechanical stresses
phase angle \2
predict
are
Current
piezoresistive
comparing experimental
results
coefficients [22] and the simulated
(see Figs. 3.22, 3.23). the offset component AA2 and the
four times
predicted
because the assumed
too
piezoresistive
small. The
coefficients
process. Furthermore, numerical stress simulation
mechanical stress
Spinning
orientation in the [110] direction with respect
an
the device contacts is recommended. However,
with theoretical values of the
Continuous
properties
in
discrepancy
depend
gives only
on
an
is difficult to
the fabrication
indication of the
packaged device.
a
iv). Fourth order contribution
Offset
of the fourth harmonic order in the
voltages
junction
biasing
thickness modulation. For
flow agrees with the symmetry
current
distribution in
two
dimensions,
for the conventional switched
spinning
switching angle cp result from
symmetric biasing conditions, i.e., when the
current,
biasing
for this
spinning
currents in
tries of the device result in
voltages unique
no
offset
axes
voltages
current
are
directions off-axis with
scheme
are
region
generated. This
method. In the
asymmetric junction
operating
of the active
case
thickness
is the
case
of continuous
geometrical
symme¬
thickness distributions. Offset
possible.
>
-1
<
_/ <1
jo
O
G
<
CD
s->
5j
,v±
o
.0
1.5
Displacement
Fig.
3.29: Stress
second order
X2.
to
The
t/ie
Ad
1.0
[mm]
1.5
2.0
Displacement
dependence of
offset AA2
non-zero
applied
2.5
2.0
the
Fig. 3.30:
Stress
Ad
2.5
[mm]
dependence of
the
and
phase
fourth order offset components AA4.
phase angle
is due
As
predicted by theory, X4
its
no
shear
stress
asft.
87
shift
over
the
~
0 e.xhib-
displacement
Ad.
3 Lateral CMOS Hall Devices
dependence
The mechanical stress
change of resistivity of
of the
on
=
unique
device
region, i.e.,
layout. Consequently,
independent
0
Fig.
of stress,
to the
continuous
for
change of
mainly
biasing
the
a
conditions
phase angle X4
is
predictions suggest an angle
definitions of switching angles based
to
current
voltages,
in the
method, the
switching angle (p,
periodic
offset
of various orders for the switched
aliasing products
due to
theoretical
according
spinning
a
On the other hand, the
fourth order offset
Although
3.30.
as a source
rent
the fourth order effects is
isolating junction (see Fig. 3.30).
given by
À-4
the active
on
are
voltage
acts
spinning
cur¬
method.
v). Higher order contributions
In terms of
periodic
avoid
spinning
offset
aliasing.
current
voltages
the
determines the
With the continuous
trum of the offset
voltage
was
dependence
Order
sampling
spinning
rate of the offset
current
to
Source
aliasing
from 1st oidei
AA15,
aliasing
dence
piezoiesistivity and (unction
horn 1st oidei
piezoiesistivitv and junction
junction thickness modulation (only
4
continuous
spinning ciment)
5
aliasing
trom 1st oidei
piezoiesistivity and junction
thickness modulation
6
aliasing
horn 2nd oidei
piezoiesistivity and junction
thickness modulation
7...15
mechanical
<
Offset dependence of different fourier orders AAr
0.30 %
100%
<
0.25 %
<
2.00 %
<
0.03 %
<
0.03 %
<
-
88
depen¬
A/4/A/A 2
Stress
of offset
thickness modulation
Tab. 3.3
no
piezoiesistivity and junction thickness modulation
3
to
the fifteenth order. However, for
thickness modulation
2
voltage
method, the Fourier spec¬
up to fifteenth order
AAS
dependent
could be observed.
ÀA,
1
order of mechanical stress
measured up
offset components of fifth order
stress
highest
100 ppm
3.4
To
Implementation
of Offset Reduction
conclude, periodic offset components up
switching angle (p
offset
stems
from the effects of mechanical stress
of the active
properties
of the Hall
biasing conditions of
of the
changes
region
geometry of the device contribute
tions up to the sixth order
voltage
of
higher
Consequently,
pling
of four
a
A
magnetic
the offset
induction
theory given
which
provides
related
the
only contribu¬
by theory.
Periodic offset
on
current
of Offset Reduction
a
sensor
perpendicular
to
is shown in
Fig.
chip plane
the
in section 2.4. It is fabricated in
mechanical stress
method
a
spatial
(see
sam¬
voltages.
Using
a
3.31. The
and is
sensor
detects
operated according
standard CMOS process
transistor n-well and source/drain diffusions. This n-well has
^^^!^^^^Ä^«^\<l^t^
1*
Hall device A
Al
A2
A3
A4
Bl
B2
B3
B4
Fig. 3.31: Micrograph of the double-Hall
ogy. The structure is
a
J
Hall device B
one
stress
However,
voltage.
spinning
of
piezoresistive
the
Furthermore,
sensor.
negligible dependence
of the double-Hall
to the
only
changing
spatial
cause
Double-Hall Sensor
micrograph
the
theory.
The
is sufficient to cancel all stress related offset
Implementation
3.4
Double-Hall Sensor
insulating pn-junction defining
the
in terms of the
samples
with
measured and identified
order exhibit
Tab. 3.3).
rate
are
to
a
to the fifteenth order in (he
compared
and
investigated
were
Using
a
combination of
two
side.
89
sensor
50 pm
fabricated
in CMOS technol¬
Hall devices with their
contacts on
3 Lateral CMOS Hall Devices
size of 50
x
tion. The
single
shown in
130 pm" and
Hall devices
Fig. 3.32.
device A which is
the
same
are
insulated Irom the substrate
operating independently
A variation of the current
given by
the
slope
of the
and
curves
constant
(SOLIDIS)
w
(less than 5% dev iation).
ith the
complete
set
of dynamic
of the thickness of the
For
a
signs
given magnetic
lA
single Hall devices.
metrical
errors
analytical
sensitivity
field direction and
and the offsets of the
be below 2 mT at
the
isolating pn-junction [12]
single
also section 2.4). The residual
to
on
room
1A
=
Hall devices
signal
Modeling
equations,
as
sensitivity of
of
lß
on
=
IA.
100
At
pA
the device, with
in the simula¬
of device B is due to modulation
(see section 2.2).
are
almost
voltages
of
opposite
equal (sec Fig.
3.33 and
offset of the double-Hall
are
sensor
is measured
temperature. This is 500 times smaller than that of the
by
are
mainly
the transformation of the active
solution of the above
investigations
can
be found
by
due to geo¬
region [23].
An
of confor-
means
120
\/A
-
+
vA
o
>
40
-
6
In
0.0 0.1
Magnetic
Fig.
3.32:
100 ttA
o
response
independently
offset.
V
v
V
—
AR
~
-
vA
V
vI
km
0
Induction B LT]
and B while neglecting
operate
=
0.2 0.3 0.4 0.5
Magnetic
a
does not reveal any
neglected
The offsets of the individual devices
introduced
pn-junc¬
a
depends linearly
the Hall
Iß,
the
at a current
deviation. However, the influence of the pn-junction is
tion. Therefore, the effect of
by
from each other
T\ only changes
time, the sensitivity of device B operated
remains almost
FEM
electrically
is
0.1
0.2 0.3 0.4 0.5
Magnetic Induction
B
[T]
of device A
Fig. 3.33: Output of Hall device
The devices
A and B with
of each other.
90
100
The Hall
IA
voltages
signs,
offsets of equal sign.
die
-
IB
are
=
fiA.
of opposite
3.4
mal
Implementation
mapping (see
errors
section 2.2). As
Using
a
Double-Hall Sensor
result, the offset caused
a
by geometrical
is due to the boundaries of the device and vanishes if the active
infinite size. However, the
ing
of Offset Reduction
large geometrical
offset
voltage
region
has
by optimiz¬
is reduced
the contact dimensions [23].
The thermal behavior of the offset
Hall devices act
on
the
biasing
factor of 600
ble-Hall
of
IA
IB
compared to
current
sensor can
=
be
In this
smaller than 6
pV/°C
Fig.
100
the
region,
single
This
3.34. Since the
the thermal offset drifts
exhibits
pA.
Fig.
an
offset drift below
corresponds
to
10pV/°C
biasing
the expense of
a
the two current
higher
at a
sources
absolute offset
a
of the dou¬
by
voltage mode, the offset drift is further reduced
at
perfectly
are
improvement by
an
device offset drift. The
single
as
a
single
to values
shown in
3.35.
Finally,
was
sensor
=
is shown in
simplified by replacing
source.
voltage
active
same
matched. The double-Hall
voltages
the
dependence
determined.
ble-Hall
The
the temperature
First,
operated
sensor
Fig. 3.36).
of the residual offset
in the
voltage
negative temperature
B0
of four devices
on
dependent sensitivity Sa
temperature
of the dou¬
mode has to be measured (see inset of
coefficient is due to the temperature
0
250
depen-
2030
>
ZL
-40
o
a
CD
O
CO
j
1990 g
LO
(D
GO
'>
CD
1-3
-80
i
245
CO
Ö
-
>
Q
JD
À
240
1950 œ
-
tl)
X)
Id
c
'to
120 Q
o
GO
CD
.-0
1910 Q
235
CD
O
o
-160
-50
0
50
Temperature
Fig.
3.34:
Thermal
offset voltage
ble-Hall
T
230
100
-50
|°C]
behavior
with 1
A, B
0
50
Temperature
of
the
of device A and the dou-
sensor
1870
100 uA.
Fig.
of
with
91
3.35:
the
a
T
100
[°C]
Thermal behavior
double-Hall
single voltage
sensor
source at
ofÜQff
biased
2.0 V
3 Lateral CMOS Hall Devices
'
-0.8
'
'
-25
-50
^—^^-U
—"—
'
0
75
50
25
T
Temperature
|CC)
Fig. 3.36: Residual offset B0 of four double-Hall
The
offset drifts
range
from -10.6
sponding sensitivity for
bottom inset shows the
120°Cfor
one
deuce of the
calibrated
at
20°C.
The lop inset shows the
corre¬
sensor at a
sensors
biasing voltage
of 2.0 V The
the calibrated residual
offset Bq with
the double-Hall
From this data and the
time at
device.
input resistance of
measured offset
is shown in
the double-Hall
drift of
flT/°C.
-5.3
to
100
Fig.
voltage V{R(B)
=
sensor.
0, (he residual offset
3.36 for four different
sensors
B0
is calculated. This
calibrated at 20°C. The residual
absolute offset is below 0.7 mT and the maximum thermal drift is smallerthan
11
pT/°C.
sensor.
After calibration, the offset drift with time limits the accuracy of the
An accelerated test
120°C
at
The offset is constant within ±50
pT
was
over
performed
on
the double-Hall
sensor.
60 hours at this elevated temperature
(see inset Fig. 3.36).
In conclusion, the double-Hall
circuitry
sensor
implementation
and allows
microsystem.
sensor
requires only
of
to the
operation
are
obtained
scheme of the
w
ith
inexpensive
Consequently,
restriction
no
sensor,
small amount of electronic
self-compensated
The offset drift is
calibrated at any arbitrary temperature,
temperature range
an
a
such
92
as
on
in the
and accurate
and
can
case
additionally
low offsets
the cut-off
of
magnetic
over
a
wide
frequencies
spinning
be
current.
due
3.5 References
3**»*.5
[l]
gl
-w^
References
J.Y.
Chen, CMOS Devices and Technology for VLSI, Prentice Hall, Engle-
wood Cliffs N.T, 1990.
[2]
D.J. Elliott,
Integrated
Circuit Fabrication
Technology, McGraw Hill,
New
York, 1982.
[3]
S.M. Sze, VLSI
[4]
C.Y.
Technology,
McGraw Hill. New York. 1988.
and S.M. Sze, VLSI
Chang,
Technology,
McGraw Hill, New York,
1996.
[5]
J. Haeusler, '"Exakte
durch konforme
Lösungen
Abbildungen/
von
Potentialproblemen
Solid-State
beim Hallcffekt
Electronics, vol. 9, p. 417.
1966.
|6]
W. Versnel,
"Analysis
of circular Hall
plate
equal finite contacts,"
with
Solid-State Electronics, vol. 24. p. 63, 1981.
[7]
[8]
of
W. Versnel,
"Analysis
Appl. Phys.,
vol. 53, p. 4659, 1981.
symmetrica] Hall plates
with finite contacts," J.
R. Steiner, A. Haeberli, F.-P. Steiner, Ch. Maier. and H.
reduction in
Hall devices
by
continuous
spinning
Baltes., "Offset
current." Sensor and
Actuators A, vol. 66, p. 167, 1998.
L9|
Shockley.
W.
"A
unipolar
field effect transistor."
Proc.
IRE, vol. 40.
p. 1365, 1952.
[10]
R.S.
Popovic,
B.E. Jones
[11|
"Flail effect devices/ The Adam
Hilger
Series
on
Sensors,
(ed.), Adam Hilger, Bristol, 1991.
Data from the R&D division, Austria Mikro
Systeme
International AG,
Popovic, "Nonlinearity m integrated Hall devices
tion/ Digest of Technical Papers of Transducers '87. p.
and its compensa¬
Austria, 1998.
112]
[13]
R.S.
P..1.A. Munter, "A low-offset
spinning
current
Hall
539. 1987.
plate."
Sensors and
Actuators A, vol. 21 -23, p. 743. 1990.
[14]
H.
Weyl. Symmetry,
Princeton
University
Press. Princeton NJ, 1952.
3 Lateral CMOS Hall Devices
[15]
R.
van
Gestel, "Reliability related research
chip approach,"
[16]
Y Kanda, M.
Ph. D. Thesis, Delft
Migitaka,
B.
Hälg,
tion
[18]
plastic IC-packages:
University Press, Delft,
"Effect of mechanical stress
of Hall devices in Si IC,"
[17]
on
Phys.
Stat. Sol
on
a test
1992.
the offset
voltage
(a), vol. 35, p. 115, 1976.
Popovic, "How to liberate integrated sensor from encapsula¬
stress," Digest of Technical Papers erf Transducers '89, p. 908, 1989.
R.S.
CE. Shannon. "Communication in the presence of
noise,"
Proc. IRE, vol.
37, p. 10, 1949.
119]
J. R. Howell,
epoxy die
"Reliability study of plastic encapsulated copper lead frame
attaching packaging system/ Proc. Int. Reliab. Phys. Symp.,
p. 104, 1981.
[20]
S. Bellekom,
plates,"
[21]
A.
"Origins
Ph. D.
spinning-current
Bilotti, G. Monreal, and R. Vig. "Monolithic magnetic Hall
cuits, vol. 32,
Hall
Thesis, Delft University Press, Delft, 1998.
dynamic quadratur
[22]
of offset in conventional and
no.
offset cancellation," IEEE Journal
of
sensor
using
Solid-Stafe Cir¬
6, p. 829,1997.
CS. Smith, "Piezoresistance effects in
germanium
and
silicon," Physical
Rev., vol. 94, p. 42, 1954.
[23]
U.
Falk, "A symmetrical vertical Hall-effect device," Digest of Technical
Papers of Transducers '89,
p 751. 1989.
94
4 Vertical CMOS
Trench-Hall Devices
Although
a
lateral Hall devices show excellent
sensitivity parallel
to the
chip
to the
chip
surface is
surface is achieved with the
performance
requested [1
so
3].
to
due to
an
insufficient carrier
path
confinement
trench-Hall devices show very small
region
defined
offer the
by
the
possibility
parallel
dynamic
of
2.3. This makes them
large
two
superior
offset [11, 12]. For
trenches.
a
sensitivity parallel
In contrary, the
as
[4
to
10].
strong cross-sensitiv¬
presented
due to the thin active
Additionally,
compensation
to. e.g..
applications
|4|.
cross-sensitivity
offset
A
applications,
called vertical Hall device
However, conventional vertical Hall devices suffer from
ity
for many
trench-Hall devices
demonstrated in section
magneto-transistors
which suffer from
where the absolute value of the
a
magnetic
field is of interest, the additional process steps needed for the trench-Hall devices
are
justified.
patibility
sensor
to
A
major advantage
the CMOS process [13].
operation
can
be
co-integrated
inexpensive microsystem
In this
of the
chapter,
the basic
resistance R and
for
sensitivity Sa
the
same
a
are
trench-Hall device for
two
requiring
details
along
following
and
and devices
region.
types of
a
sensors:
contacts
specific
input
contact
devices with all
which
The device fabrication is
electrically
explained
in
manufacturing steps related to pre-processing and the
CMOS-process. The additional manufacturing steps are in
line with (he thermal
budget
of the
subsequent
CMOS
of fabrication of trench-Hall devices is proven
processing. Finally,
by
vector
probes
are
well suited
for induction in the range of several milli-teslas.
95
the
measurement results.
The measurement results demonstrate, that trench-Hall devices
magnetic
accurate
the different
standard
feasibility
an
derived to estimate the
contacts on the
connect to the bottom of the active
front-end electronics for
chip enabling
arrangement. The considerations deal with
chip surface;
com¬
field measurements [14].
considerations
of
trench-Hall devices is its
Consequently,
on
magnetic
design
presented
as
4 Vertical CMOS Trench-Hall Devices
4.1
Considerations
Design
In order to achieve
the active
region
a
of
sensitivity
a
reasons
the
to
position
the
region by
design
deep
access
are
eliminated
for
a
Fig.
contacts
of the contacts has to be
given
a
re-arranged.
chip surface, and, ii)
the
electrically
concerning
to
with respect to the
all contacts at the
deep
the
chip
symmetric device geometry.
These constraints
contacts at the expense
chip surface, b)
ci) Hall device with all
on
surface results in
biasing voltages
chip surface.
cases are
connected to the bottom of the active
as
Hall device with
The sensitivity is
contacts at
the
of lower sensitivities
discussed later.
4.1: a) Conventional lateral Flail device sensitive to
the
vertical
for techno¬
Two
contacts
a
chip
by introducing deep
range of the
perpendicular
and
at
pillars. Arranging
constraints
chip surface,
chip surface (see Fig. 4.1). However,
considered: i) all device contacts
surface and
to the
conventional lateral Hall device is rotated towards
orientation with respect
logical
magnetic induction parallel
to
a
parallel
magnetic induction
vertical orientation
to
the
chip surface, and. c.ii)
contacts.
96
chip surface,
device with top
4.1
i). Single ended device with all
all contacts of
simpler processing
For
formed to the
chip
surface (see
ping, approximate expressions
mined (see section 2.2). The
sponding
circular Hall
plate
a
vertically oriented
Fig. 4.1.ci). Through
for the
are
device of infinite size of the active
i
gives
a
correspondence
described
by
an
represented by
has
angle
between
=
v
of the
corresponding
on
on
of
a
corre¬
plate
the
to
a
single
ended
expression
(4.1)
the
boundary of
the surface of the
the circular Hall
single
[15] (see Fig. 4.2). However,
plate
areas cut out
[ 15 ]. The
tion of the symmetry, which is illustrated in
Fig.
by
a
ended device
a
cause a
are
device
physical
of the active
missing parts
4.2
plate
region
perturba¬
non-symmetric
rectan¬
Hall device.
gular
4.2:
Single
spondence
is
ended device with
defined
by
a
corresponding
circular Hall
plate.
The
corre¬
bilinear transformation. A limitation of the active
region erf the single ended device h\ the boundaries Bl
tion
help
tan^
points
circular Hall
be deter¬
can
sensitivity S(l.
circular Hall
limited extension, which results in circular
a
Fig.
calculated with
region [15], Therefore,
r3. Locations
the coordinate
a
are trans¬
of conformai map¬
means
with known resistance R and
A conlormal, bilinear transformation maps
Hall device
corrections factor
geometric
expressions
Considerations
chip surface
the
contacts on
Design
of the device symmetn illustrated bv
right.
97
the
to
B3
rectangular
causes a
perturba¬
Hall device
on
the
4 Vertical CMOS Trench-Hall Devices
Fig.
4.3:
tact Ali,
etry
Design rules [or
a
Alii, and A3, and using
of the
(dimensions
device
Hall device.
single ended
in
a
Defining
fun).
In order to calculate the geometry correction factors, the
are
defined:
widths
a
equal
circular JIall
center contact A3 of 1.6 pm
to
the trench etch
plate
depth
with contacts
of con¬
determines the geom¬
transformation
bilinear
the width
width, and
d. The contact
having
an
following design
contacts Ali and AW
position
with
is calculated from
of
opening angle
rules
(2f>)
and
a
corre-
1.0
s-,
o
S*
O
-öooo
0.8
°**'"S.
Qo?
o
Ö
Jo5?
JOQ
approximation
(ù
5
single
o
•2
°°"ÔÔS
0.6
°'°o0;
ended device
§
o
U
U
circular Hall
CD
plate
o
0.4
vc\<
'
;;
CD
«
Ö
bß
/o<
es
5
^^
0.1
10
30
25
20
15
Contact Angle ft
Fig.
are
4.4: Calculated geometry correction
compared
with
corree
tion factors
Furthermore, the FEM results
imations
for Gf>
and
are
of
a
factors by
means
circular Hall plate
parameterized resulting
G$.
98
of F EVI. The results
according
to
[15].
in analytical approx¬
Design Considerations
4.1
sponding scaling. Through
according
culated
with
analytical
biasing
contacts A2 and
=
a
geometric
shown in section 3.1.
to contacts A ii-Alii
A4,
and
G#
Gs
are
dû-
-0.200- 10
correction factors
rules. This method shows
applied
trench etch
estimated
1.1
10
good agreement
the device with
Operating
and A3, and
0.0844;/
sensing
d
depth
=
10
...
ft+ 6.44- 10
20 pm and
Gr
and
G$
a
the response at
as
0.221ft
+
cal¬
are
-3
d
+
0.870
(4.2)
7 22
the above range, the deviation of
and 2.9%,
of FEM,
design
as
Gc
with
use
to the above
calculations
current
GR
the
-
(4.3)
1.87
angle
contact
a
ft
=
10
...
30°. In
from the FEM-rcsults is below 6.4%
respectively (see Fig. 4.4). However,
these deviations
are
below the
tolerances of the CMOS fabrication process.
To
overcome
device is
vice
are
the lack of
optimized by
rearranged
layout
of
A\i
axes.
by rotating
an
tion factors
FEM. The
until the
vice with two mirror
is achieved
layout symmetry, the geometry
single
The
and
A2
calculated
to
43
4 1;;
U
contacts A2 and
ended device
corresponds
single
1.612 and
GR=
Gç
ended Hall
single
a
to a
for
a
Fig.
ended de¬
rectangular
de¬
circular device
of the contacts A2 and A4 (see
ended Hall device is shown in
be
a
A4 of
corresponding transformation
scaling
optimized single
are
sense
of
Fig. 4.5).
4.6. The
The
correc¬
0.684.
=
A/I \A/// H\z^
in
boundai\ B2
Hall
plate
Fig. 4.5: Optimizing the geometry bv rearranging the
corresponding change of the layout
Hall device.
easily
Optimization
recognized by
the
rectangular
Hall plate
circular
single ended device
is shown for
results in
rectangular
a
layout
with
Hall device
99
a
on
contacts
A2 and A4. The
circular and
two
the
mirror
left.
a
rectangular
axes
that
are
4 Vertical CMOS Trench-Hall Devices
3.2
6.0 3.2
14.0
Fig. 4.6: Layout with corresponding dimensions of
Hall device
ii).
(dimensions
Device with top and
in
a
deep contact) is
invariant under
deep
optimized single ended
an
contacts
assumed. It allows the
rotation of it/2. In
a
0.4
fini).
An electrical connection to the bottom of the active
(i.e.
9.6
terms
region
design
of current
of
a
trench-Hall device
of Hall devices which
spinning,
this allows
arc
a more
effective offset reduction in the presence of non-lmearities (see section 2.3).
However, determining the geometry analytically
problem
design
Fig.
was
solved
with two
4.7).
deep
Considering
AI
resistance
Fig.
using
contacts, and.
a
trench etch
A2
e
i
FEM. Two
A3
b)
is
laborious. Therefore, the
possible layouts
a
design
depth
with
parasitic
contact
a
(see
of 15 pm the contacts A2 and A4 of
A4
,-—--
1
u
7i72~symmetrv. Additionally, the technology presented
a
considered: a)
single deep
a
4.7: Possible layouts of trench-Hall devices with
duces
were
series resistance
m
the contact
sated electronically.
100
path
deep
m
contacts
the next
which has
having
chapter
to
a
intro¬
be compen¬
4.1 Design Considerations
layout a)
have
width of 3.2 pm and
a
a
distance of 10.7 pm. This results in geo¬
metric correction factors of
G^
ft
circular Hall
-
6.4° of
a
corresponding
and A3 is calculated
tact Al
1.6 pm. With
a
The
to
access
parasitic
tact
a
pillar
voltage
with
resistance in the contact
influence
no
resistance results in
changes
plate
a
which connects the
resistance has
common
=
6.5 pm and the width of contact A2 to be
to be
calculated to be
are
circular Hall
mode
G$ 0.955 and a contact angle
plate. For layout b) the width of con¬
distance of contacts A 1 and A2
correction factors
sponds
2.776 and
=
a
voltage
have to be
the
angle
contact
deep
sense
ft
=
1.8 pm, the
Gs
a
0.641. This
chip surface
contact to sense
operation.
voltage drop
contacts
=
for different
voltage,
biasing
tivity [15].
101
corre¬
causes a
the
con¬
For current contacts the
causes
biasing
current, and.
change
of the
currents.
These
a
compensated electronically. Furthermore, for
range, the resistance reduces the
geometric
25.4°
contact with the
the device
This
to
1.356 and
=
path. Using
on
voltage drop.
at
G#
equal
a
given biasing
therefore, the sensi¬
4 Vertical CMOS Trench-Hall Devices
4.2
Fabrication
manufacturing
The
cessing steps
Technology
scheme for the trench-Hall device consists of various pre-pro¬
followed
the industrial
by
teme International AG [16]. This differs from the
tures
or sensors are
manufactured in
steps
that
with the thermal
only compatible
are
approach
is used for
Sys¬
where struc¬
post-processed
of
reasons
to
incorporating
for the Hall device fabrication. These
required
are
common
CMOS process and then
Pre-processing
add additional features [17].
high temperature steps
a
of Austria Mikro
CMOS-process
budget
of the CMOS process if per¬
formed in advance.
To summarize
vertically
device fabrication,
on
region by
oriented active
can
be
region
co-integrated.
environment of the
Manufacturing
particular
mainly
The hard mask
second,
In
to
a next
defined
a
of
hard-mask
a
silicon nitride
Â
layer
operation
on
a
(lOO)-p-substrate
the trench etch
by
layers
-
trenches
region.
high
[20]. With
a
sufficient.
During
1500Ä thickness,
of
and
as
depth
which has to be removed [21].
not
depth
a
a
chemistry
used for
etching, and
sensors.
the side-walls,
a
t
chem¬
up to 20 pm. The trenches
high
a
etch
was
selectivity
are
quad
chosen for the
to
hard mask oxide
Additionally,
a
implant
102
the oxide hard mask
layer of 20'000
A
was
sacrificial oxide is grown and
[22].
doped by ion-implantation.
mode
etching
oxide is grown at the side-walls
passivation
removed to reduce contamination in the etch grooves
on
a
will be discussed later.
as
mask for the trench
a
etched to
than 1:20,
etching,
All side-walls of the trenches
and
distance of 2.4 pm, which will be the thickness of
rate
selectivity larger
trench
are
Bromine-based
silicon etch
due to the
a
silicon
a
step, the hard mask is opened by plasma etching using CHÏ//CF
width of 0.8 pm and
design
thickness. The thickness of the thick silicon
protect the region of the silicon substrate
the device active
osition
sensor
sandwdch of dielectric CMOS
a
purposes: first,
serves two
istry [19]. Then, parallel
have
electrical contacts
the front-end electronics the entire
deposition
thicker silicon oxide of 20*000
is
a
CMOS process is accessible.
starts with the
a
used to etch
wdiich is similar to the fabrica¬
subsequent processing
design
In order to
oxide of 500 A thickness,
layer
basically
defined and front-end electronics for
are
(see Fig. 4.8). The hard mask is
oxide
etching,
trench
tion of DRAM memory cells [18]. In
for the active
is
pre-processing
of
To
improve the dep¬
phosphorous
ions with
a
lilt
4.2 Fabrication
Technology
Fig. 4.8: Left) (lOO)-p-substrate with deposited hard mask. The dielectric layers
as
serve
mask for trench
Hard mask
grooves
angle
of 4°
with
was
ion-implantation,
consuming
be
as
a
to
arbitrarily
a
tilt
For
the substrate. Middle)
than 20 [lin.
good side-wall deposition
method of trench
unique
pre-deposition depth
drive-in from the
chosen to
chip
optimize
the
of
over
a
quad
surface
pre-deposited
donors
a
[16]. Additionally, the ion-dose
performance
occurs
etching, followed by
20 pm is achieved without
of the trench-Hall devices.
Therefore, the parameters of the co-integrated electronics
drive-in of the
Right) Etch
angle of 4°is chosen.
used. With this
a
protection erf
depths deeper
pre-deposited by ion-implantation.
implant
can
and
and trenches etched
opened
mode
time
etching
arc
simultaneously
affected. The
not
with the transistor
well formation in the process steps that follow [13].
As the next
step, the trenches
are
oxidized for isolation. The side-wall oxide is
annealed to reduce initial stress in the
silicon
layer
is
deposited,
grooves. This turned out
which is
as
a
crystalline
mainly
silicon. A
intended
crucial step in the
103
as
highly n-doped poly¬
planarization
pre-processing
of the trench
(see
Fig. 4.9).
4 Vertical CMOS Trench-Hall Devices
removed hard mask
etch back
Fig.
4.9:
The trenches
Left)
oxidized and filled with
are
a
polysilicon layer
The
polysilicon serves as planarization and as an electrical shield. Middle) The poly¬
silicon is patterned and etched back providing an electrical contact to the poly¬
silicon
fill from
finishes
the
the
chip surface. Right) Finally,
pre-processing.
Improper planarization
Additionally,
the
results in
polysilicon
the trench-Hall device. The
etching.
As
connect the
Finally
cessing.
to
result,
a
a
a
gap in the metal coverage
electrical shield to
serves as an
polysilicon
is
polysilicon paddle
polysilicon
patterned
in the trench in the later
an
deposition
which caused
by
polysilicon.
problems
wafers with the finished
wet
deposition
pre-processed
etching
to
104
by plasma
electrically
terminate pre-pro¬
can
be removed
topology height
prior
of the structure,
in the process that follows. The
trench-Hall devices
substrate for the CMOS process.
the EMC of
processing steps.
This reduces the
with the resist
improve
and etched back
alternative, the thick oxide of the hard mask
of the
the trench.
over
is formed which allows to
the rest of the hard mask is removed
As
the hard mask is removed which
serve
as
a
starting
4.2 Fabrication
Fig.
4.10:
Top left) Top
Top right) Top
Bottom
view
erf
view of the buried active region
shielding
In the
pictures
and
planarization.
in the upper
buried trench-Hall devices
in order to
view of
the
access
a
trench-Hall device.
pillars for deep
deep
a
use
them
row
are
Bottom
of
Fig. 4.10, top
shown. The devices
as a
magnetic
trench-Hall device with
contacts are
right) Close-up
fabricated
deep
vector
105
are
probe.
contacts
simultaneously
views
w
of
\ icw
access
of the upper
in an
orthogonal
In the top
is shown. The
ith the active
contacts.
is used for elec¬
left) Contact of the tiench polysilicon fill. The polysilicon
trical
ment
with
region
the active
of
Technology
pillars.
edges
arrange-
right picture,
access
region.
of
pillars
a
of
The lower
4 Vertical CMOS Trench-Hall Devices
contact
passivation
polysilicon
silicon-oxide
metallization
oxide laver
source/drain
diffusion
i
top
1
contact
deep
contact
polysilicon
fill
/
access
p-substrate
pillar
7
trenches
''
region
deep contact
active
silicon-oxide
Fig.
4.11 : Cross section of a trench-Hall device with top and
completing
active
the CMOS process. The drive-in
region
and the
access
pillars
of
occurs
the
deep
pre-deposited
simultaneously
contacts
after
donors of the
with the transis¬
tor-well formation,
row
of
pictures
contact for the
of
Fig.
4.10 shows
polysilicon
close-up views,
fill and of the
access
such
pillars
as
of the
that of the electric
deep
contacts.
processing, the drive-in for the active region and the access pillars
occurs simultaneously with the transistor-well formation. As a result, a homoge¬
neously doped active region is achieved with a depth up to 20 pm and
In the CMOS
106
4.2 Fabrication
Technology
i
t
device A
Fig. 4.12:
with all
Fig.
.i:
Micrograph of
contacts on
4.12.H:
the
two
orthogonally arranged single
ended devices
chip surface.
Vlicrograph of
two
orthogonally arranged
contacts.
107
devices with top and
deep
4 Vertical CMOS Trench-Hall Devices
a
thickness of
Flail device
approximately
formed
are
2.4 pm. Furthermore, the electrical contacts of the
source/drain diffusions
by
4.12.i and 4.12.Ü. In the current
consisting
of:
a
approach, only
drive-in diffusion, BPSG
trenches with SOG, source/drain
allization, and passivation.
compatible
tronics is
4.3
with
a
implant through
geometries
were
deep
a
contacts
designed according
was
single
feasible and
of front-end elec¬
to the
5)
sensitivity
can
be
design guidelines
was
measured to be
(see Fig. 4.14). These values
and
a
thickness of
~
t
co-integrated
a
=
reported
sensitivity
to
S,
=
a
contact
=
i)
input
of the trench-Hall
linearity
to 0.3 T
opening angle
error
of device
demonstrate the
devices.
108
i)
any elec¬
resistance R
of ft
=
17°
rH- 1.1, and
to
be 5.0 kO,
of device
i) is below
ii) (Fig. 4.15).
ii) device with top and deep
contacts
to
4.3).
changing
the
=
250 V/AT. The
Investigated geometries
tion process
to
in literature [23]. FTowever, the
electronics. For device
0.1%, and below 0.15% for inductions up
i) single ended device with lop
ii)
in the range of the
are
8.5-1015 cm"3, p„ 0.12 nr/Vs,
/;
R calculated with Eq. (4.2) turns out
2.4 pm.
be
Eqs. (4.1
the ion-dose without
value of 5.3 kO. With
1, the resistance
of
determined to be 250 V/AT for device
were
arbitrarily adjusted by
trical parameters of
ended device with top contacts, and,
(see Fig. 4.13). Additionally, the single ended
sensitivities of the lateral Hall devices
4.13:
co-integration
are
met¬
of the fabrication process, two different device
manufactured: i)
and 314 V/AT for device ii)
Fig.
of the
holes, activation,
contact
used
Magnetic Performance
The current related sensitivities
and the
planarization step
a
The realization of Hall devices that
feasibility
device with top and
ô#/lan6/f
are
straight forward.
Electrical and
device
Figs. 4.11,
selected CMOS steps
deposition,
standard CMOS process and
In order to prove the
a
shown in
as
feasibility of
contacts
the
fabrica¬
4.3 Electrica] and Magnetic Performance
100
single ended device ii)
H
<
75
>
to*
>->
50
V
Ö
<D
CO
device i) with top
and
25
0.0
4.14: Measured absolute sensitivity
[unction o[
the
biasing
current
I
=
100
fiA.
device ii),
a
=
,S)
•/
of the trench-Hall devices
be obtained based
S, of
of the single ended trench-Hall device i)
at
The deviation from
deviation o[0,15c7<
a
can
0.0
0.1
on a
for
0.2
Induction B |T]
linear fit is below 0.1 c/o of the
was
as a
250 V/AT
[it.
-0.1
response
Sa
[mA]
linear
Magnetic
Fig. 4.15: Magnetic
Current 1
0.3
I. A current related sensitivity
device i) and 314 V/AT for device ii)
-0.2
contacts
0.2
0.1
Biasing
Fig.
deep
measured
109
[or the
same
full
a
bias
scale. For the
conditions.
4 Vertical CMOS Trench-Hall Devices
371/2
K
Rotation
4.16:
Fig.
B
Angular field dependence of two orthogonal
(according design
induction
rules
of 0.3 Tparallel
and cosine fits
are
of non-linearity
an
linearity
a
alent
angular
chip surface.
cross-sensitivity,
errors
parallel
for
The
signal
are
deviations
due to
a
for
from
an
sine
combination
the response of the Hall device A and
a
to the
chip
were
surface (see
magnetic induction
error
of
approximately
spinning.
to 1.0 mT. These
can
be
measured while
rotating
the
Fig. 4.16). Cross-sensitivity
of 0.3 T result in
sine-/cosine-function below 0.2%. This is
The trench-Hall device
biasing
the
arrangement
and cross-sensitivity.
induction
from
current
to
trench-Hall devices A and
orthogonal
an
orthogonal arrangement (see Fig. 4.10)
magnetic
and
given in i)) in
smaller than 0.2%. These deviations
In order to determine the
B in
Angle [ ]
expressed
a
signal deviation
in terms of
an
equiv¬
means
of the
0.2°.
dynamically
offset
compensated by
Measurements often devices showed residual offsets from 0.1
residual offsets resulted from
of the silicon substrate. This
contact further away from the trench
can
be
region.
110
a
non-linearity
introduced
improved by placing
by
poor
the substrate
4.4 References
4.4
[t]
References
CL.
Chien,
and CR.
Westgate,
The Hall
Effect and
its
Applications,
Plenum Press, New York, 1980.
[2]
A.PIaeberli, M. Schneider, P. Malcovati, R. Castagnetti, F. Maloberti, and
H. Baltes. "Two-dimensional
ing
31,
for contactless
no.
magnetic
sensor
angle measurement,"
with
on-chip signal
process¬
IEEE J. Solid State Circuits, vol.
12, p. 1902, 1996.
Y Yoshino, K. Ao. and M. Kato, "MRE rotation
[3]
high-accuracy,
high-sensitivity magnetic sensor for automotive use," Society of Automo¬
tive Engineers. Sensor and Actuators Congress, p. 67. 1987.
[4]
R.S.
Popovic,
sensor:
"The vertical Hall-effect device," IEEE Electron Device
Lett., vol. EDL-5, p. 357, 1984.
[5]
CS. Roumenin,
"Magnetic
continue to advance towards
sensors
tion," Sensors and Actuators A, vol. 46,
16]
M.
Paranjape,
netic-field
no.
[8]
M.
I.
sensor
overview," Sensors
1-2, p. 77, 1992.
Filanovsky, and L.J. Ristic, "3-D vertical Hall mag¬
in CMOS technology," Sensors and Actuators A, vol. 34,
Paranjape,
and L.J.
in standard
Ristic, "Micromachined vertical
complementary
Applied Physics Letters,
M.
an
I, p. 9, 1992.
sensor
[9]
no.
perfec¬
1-3, p. 273, 1995.
CS. Roumenin, "Parallel-field Hall microsensors:
and Actuators A, vol. 30,
L7]
no.
vol. 60.
Hall
magnetic
metal oxide semiconductor
no.
field
technology,"
25, p. 3188, 1992.
Paranjape, and L.J. Ristic. "Multi-dimensional
using CMOS integrated," IEEE Transactions
fields
detection of
on
magnetic
Magnetics, vol.27,
no.6. p. 4843, 1991.
[10]
T.
Nakamura, K. Maenaka. "Integrated magnetic sensors," Sensors and
Actuators A. vol. 21-23, p. 762. 1990.
[Il]
M. Metz, M. Schneider, and H. Baltes, "Offset reduction in multicollector
magnetotransislors/ Technical Digest of International
Meeting (IEDM '96), p. 537, 1996.
Ill
Electron
Device
4 Vertical CMOS Trench-Hall Dev
[12]
M. Metz, M.
Schneider, A. Haeberli, and H. Baltes, "Analysis and reduc¬
of CMOS
tion
magnetotransistor offset/
Devices Conference
1131
ices
(ESSDERC '98),
J.Y. Chen, CMOS Devices and
IEEE
European Solid-State
p. 184, 1998.
Technology for VLSI,
Prentice Hall,
Engle-
wood Cliffs NJ, 1990.
[14]
technology strategy
P. M. Sarro, "Sensor
in silicon." Sensor and Actuators
A, vol. 31, p. 138, 1992.
[15]
R.S.
Popovic,
B.E. Jones
[16]
"Hall effect devices," The Adam
(ed.),
Austria Vlikro
Adam
Systeme International AG, "Verfahren
dotierten
begrenzten,
Hilger,
H. Baltes, "CMOS
Teilgebieten
37-38.
[18]
sensor
K.P. Muller, B.
Flietner.
Y Tsunashima, T.
bit DRAM
on
Sensors,
zur
Herstellung
no.
von
monokri-
aus
GM378/97, 1997.
technology," Sensor
and Actuators A, vol.
1993.
p.51,
Ranade,
as
Series
in einem Substratmaterial
slallinen Silizium," Amman Patent,
[17]
Hilger
Bristol, 1991.
generations,"
C.L.
Mii,
Hwang.
Kleinhenz, T. Nakao, R.
R.L.
'Trench storage node
technology
for
giga¬
Technical Digest o[ International Electron Device
Meeting (IEDM '96), p. 507, 1996.
[19]
G.S. Oehriein and J.P. Rembetski. "Plasma-based
the silicon
integrated
circuit
technology,"
IBM
dry etching techniques in
J. Res. Devel, vol. 36,
p. 140. 1992.
[20]
L.T. Tsou,
"Highly
selectiv
c
reactive ion
etching
of
polysilicon
with
hydro¬
gen bromide,"./. Electrochem. Soc, vol. 136, p. 3003, 1989.
[21]
C.Y.
Chang, and
S.M. Sze, ULSl
Technology.
McGraw Hill, New York,
1996.
Technology,
[22]
S.M. Sze, VLSI
[23]
N. Mathieu, A. Chovet, M. Chertouk,
McGraw Hill, New York, 1988.
integrated magnetic sensors,"
1994.
"Figure
of merit of semiconductor
Sensor and Mutet iah, vol. 5,
no.
6, p. 359,
5 Applications
CMOS
magnetic
performance at a
ter:
a
sensors are
low
price.
current monitor and
Application
of
wear-free
for
monitoring
galvanic isolation
current
require
and
measurement
and for modern
small and
protection [1
a
inexpensive
current measurement
packaging technology,
small,
circuitry.
chapter [7].
fabrication and
a
today's
effi¬
transportation systems. However,
monitor system is demonstrated in this
the LOC
for
systems
6]. Additionally, safety requirements demand
to
mass
system.
key technology
between power lines and control
in line with commercial IC
tor
angle
power electronics is
cient energy management
power electronics
applications demanding high system
possible applications are presented in this chap¬
Two
a
intelligent
best suited for
A
The
fully packaged
manufacturing
is
packaging technology. Utilizing
accurate
and
inexpensive
current moni¬
system is realized which satisfies the safety requirements for galvanically iso¬
lated current
magnetic
monitoring [8].
field concentrators [9,
As another
application,
a
performance
10]
wear-free
13]. The approach provides
ment
The
a
and
be further
can
detectors
meeting
angle
detection system is demonstrated [12,
low cost solution well suited for
these
specifications
are
magnets combined with conventional lateral Hall
magnetic
field component
the
multi-pole
accurate
angle
measurement
to
accuracy
magnets and extensive signal
angle
by detecting
detection,
independent
the two components of
chip plane by,
gle-chip
perpendicular
the
is
can
be
provided,
a
well
harsh environ¬
the entire system.
113
on
angle
permanent
plates measuring only
processing
or
is
the
Due to this
use
Bx
and
A
prin¬
more
possible
If parallel
a
one
expensive
becomes
[16]. Furthermore,
low-cost
of
required [15].
magnitude,
inductions
as a
based
chip plane [14].
of the field
magnetic
as
mainly
limited
e.g. two vertical Hall devices
solution
ferro¬
on-chip compensation techniques [11].
in terms of mechanical load and wide temperature range. Traditional
position
ciple,
improved by
to
the
CMOS sin¬
packaging approach
for
5
Applications
5.1
Current Monitor
current
flowing through
magnetic
of 10 A
of 1
The
field with
through
mm.
grated
for the
principle
A convenient
a
an
a
conductor is the detection of the
appropriate magnetic
wire 1
mm
sensor can
magnetic
field
order to achieve
a
the
high system
oriented
must be
is
a
fulfilled
by
major contributor
often underestimated. Thus, the
ble, and
must be
compatible
tion, the exclusive
use
the
as
electrical
example,
an
field of 1 mT
properties of
current
a
distance
at a
widely applied
inte¬
[17].
with distance from the conductor (see
close
response. At the
magnetic
as
possible
same
sensor
the system
microsystem development,
packaging
be
sensor must
lation between the conductor and
requirements
a
As
an
current-generated
be used for accurate and stable measurements
strength drops quickly
Fig. 5.1). Therefore,
[ 1].
sensor
in diameter generates
In this field range, the favorable
Hall
isolated measurement of
galvanically
lime
a
must be
package.
to the current
perfect
in
electrical iso¬
provided.
For the
path
The above
of market
success
this needs to be done at minimum cost since
to the final
packaging
with batch
of/standard IC
system cost, and its importance is
solution must be
techniques.
technologies
For
is
as
simple
inexpensive
as
mass
possi¬
produc¬
required.
measured field B
per unit current
Fig.
Calculated
5.1:
field distribution erf'a
conductor measured
sensor.
Positioning
device in
a
the
current
current
from
the
a
in
a
Hall
Hall
plane perpendicular
to
flow, the correspond¬
ing magnetic field
current
magnetic
in tesla per unit
is calculated.
x-direction
y-direction [a.u.]
114
[a.u.]
5.1 Current Monitor
In this
based
chapter,
on
a
a
highly
CMOS die
sensitive current monitor system is demonstrated. It is
containing
assembly
is
packaged using
is
widely applied
of memory cells in order to increase the ratio between
dimension. Therefore,
package
which is
sensors
packaging technique
This
lead-on-chip technology (LOC) [8].
for
Hall
two
inexpensive
and reliable
volume
high
size and
chip
production
provided.
Packaging technology
LOC
chip packaging techniques
Most IC
ensure
aging
pads
use
a
thin lead frame and
wires to
bonding
electrical connections from the die to outside [18]. In conventional
the lead frame connection ends at the
arranged close
are
package
covers
applications
the
chip edges
substantially larger
a
such
to
as
periphery
as
area
CPU's and ASICs this is
bonding
Thus,
the total
shown in
than the
only
pack¬
of the die and all
Fig.
5.2a.
die size. For many
original
of minor
importance.
packaging technology the tips of the lead frame extend over the
(see Fig. 5.2b). The bonding connections are made completely over
In the LOC
die
surface
the
die surface and the
bonding pads
the final
package
die
with respect to
area
size is
occupancy is increased
the conventional
packaging
case.
of space
can
be
placed
only slightly larger
package
to more
area
almost any location. Therefore,
than the die and
than 70% of the
devices such
as
packaging
technology
optimum
ratio of
technology
the die
an
is achieved. With LOC
For that reason, the LOC
consuming
at
area
is
memory cells
compared
with
widely accepted
for
[8, 18].
(b) lead-on-chip technology
Fig. 5.2: Arrangement of CMOS die
nects
(a)
in conventional
relative to lead frame
packaging lechnicpte
technology.
115
for electrical
and (/ft ;'/;
intercon¬
lead-on-chip (LOC)
5
Applications
manufacturing
cess
cutting of the
chips
stripe
the
lead frame
we
for the realization of
inexpensive
are
mounted
is fed into
into
stripe
is finished. In this work,
technology
Fig.
line. First, the
stripe. Then,
lead frame
and
is well suited for
technology
LOC
a
mass
by
an
the
5.3. Here, the lead frame contains
ally
for the current
path
the
production pro¬
LOC packaging
advantages of the
lines and
signal
is achieved which is
an
comparable
used for current measurements. The low power
combined with
an
excellent thermal
conductivity
to
ide LOC
glue tape. Consequently,
Hall
Fig. 5.3:
(LOC).
to
Current
The lead
[rame
the CMOS die with
a
the current
LOC
sensors
monitor
system
contains
LOC
glued
on
a
to a shunt
external
in
resistor
con¬
usu¬
system
our
printed
circuit
path.
a
polyim-
is close to the Hall
sensors
the lead frame with
path
shown in
result, low resis¬
dissipation
an
as
additional wide
board leads to minimized temperature increase of the current
For mechanical interconnection the die is
on a
plastic molding
ductor which carries the electrical current to be measured. As
tance
IC
wire bonder. After
CMOS current monitor system
a
an
automatic die bonder
single packaged IC's,
exploit
within
packaging
glue tape
packaged using lead-on-chip technology
signal
lines and
current
glue tape. Thus, high
isolation is achieved.
116
path.
It is attached close
system response
and excellent
5.1 Ciment Monitor
(approximately
glue tape
90
pm)
consists of
and
electrically
polyimide
a
carrier coated
high purity thermoelastic adhesive.
isolation between the
excellent mechanical
sure
are
chip
by
isolated
The
on
both sides with
strength. Additionally,
minimized which makes the LOC
path,
a
The LOC
thin
layer
of
carrier maintains electrical
polyimide
and the current
polyimide tape.
the
while the adhesive
provides
dwell time and the die thermal expo¬
suitable for
glue tape
high
volume
assembly operation.
System Assembly
The
packaging technique applies
application
the current
two lateral Hall
path (Fig. 5.4).
to
devices
am
integrated magnetic
sensors on
ratio of 22 pm to 66 pm. With
power related
back of Hall
single
a
Hall
sensitivity
sensors
monitor system
Fig.
high
performance.
^«^*SS8«MS>-*fcX
to
the
offset
voltage
The offset
W
#
on
a
chip surface.
\
**
set to a
are
highly degrades
were
^^
length
the current
compensated by
continu-
«
located
path for rejection of c ommon-mode magnetic fields.
117
reject
voltage drop of 3.9 V. The
130.8 A"1 T "'. The major draw¬
lead frame. The Hull
ThcA
width to
the
a
which
voltages
as
of 0.25 mA, the current related
is 5 10 V/AT with
sensor
5.4: CMOS die mounted
perpendicular
current
is then calculated to be
is their
•**
biasing
a
was
our
either side of
the CMOS die in order to
common-mode magnetic fields [19]. The geometry
of
on
For
The current monitor s>stem response is defined
difference of the responses of the Hall
sensitivity
arranged
chosen and
were
sensor.
on
sensors
each side
are
sensitive
of the
current
5
Applications
ou s
Ilz
spinning
current to values lower than
[20]. Additionally, the spinning
of the offset
voltage [21].
metal
layers
310 pmr for
cancelling
For
temperature, on-chip coils
In this
turns.
6.1 itiT. In order to avoid
terminals,
possible
measurement
can
coil
configurations
are
operated
technology
requires appropriate
machine
adjustment.
number of
ally
samples,
is
a
5.5:
optimized
the
(right)
and the
for
for automatic
and
during
the
with LOC
sxstem
glue
fully packaged
is necessary. Two
current
path
and
the
on-chip
coil
of the current monitor system.
high
volume IC
packaging.
prototyping with
packaging
process had
complete system
to
chips
It
foi-
limited
a
be
manu¬
fabrication and
packaging technology.
piocess: section
CVIOS die mounted
monitor system
118
on-chip coil
sufficient amount of
a
packaging
tape (left),
induction of
magnetic
shielding
In order to allow flexible system
different steps
x
is limited to
current
the Hall sensor, current
reliability
stripes
lead frame
Different phases of
a
of 310
between the coils and the Hall
sensor, or
process is in line with standard LOC
stripe patterned
m
an area
closed-loop setup. Additionally,
improve
time and
over
considered. Either the
are now
controlled in this work. Nevertheless, the
assembly
Fig.
in
be used for fietd tests to
The LOC
occupies
biasing
resulting
polysilicon layer
is used for autocalibration of the Hall
on-chip
the
capacitive coupling
additional
an
rules
of 2
The solenoid is realized with two
configuration
design
variations
sensitivity
the
available in the CVIOS process. The coil
forty
sampling frequency
a
method reduces the temperature drift
designed [11].
were
14.5 mA to remain within the
sensor
current
pV with
I
(center).
of
on
lead
frame
lead
frame
5.1 Current Monitor
The lead frame for the current monitor system
by
factured
is copper with
layer
is sputter
sions
as an
of
deposited
18-pin
DIL
gold wires,
after laser
package.
a
the low resistive current
Ti
The lead frame
adhesive such
as.
strength
dielectric
achieved. The LOC
hot-plate
bar must be
applied
a
field measured
signals
on
dielectric
a
glue tape application
for 50
to
the Hall
causes
sensors.
a
Furthermore,
path
On the other hand,
sensors over
LOC glue tape. A
35
ppm/°C
in
a
occurs
lifetime is
a
by
typical
value
5.5,
right
the lead
a
flip-chip
optimization
fine
placer
and 5.6, bottom). For
frame,
a
than 14 kV is
made
properties
on
a
pressure of 3
a
performance
to
magnitude of the magnetic
mismatch of the Hall
and
a
misalignment
temperature of 300°C
sensor
placement
well suited for
path
expansion
degradation
the
a
high
change of
number of
corrected
change
119
200
ms
of
of the mag¬
75 ppm
over
samples
are
was
manually (see Fig.
the CMOS die to the LOC
over
to
of the
LOC die bonder, the CMOS die
a
attaching
excellent
the thermal
l/r-depcndence,
for
an
150°C In this range the
Approximating
a
of the current
for the ABLELOC 5000 tape is
the above temperature range is calculated. Since
with
high
The sandwich
of the distance from current
specified
the current with
necessary for process
offers
which makes it necessary to cali¬
mainly governed by
distance is calculated to be 0.6 pm.
placed
used for
remaining pins
was
packaging technology
changes
temperature range from -50
netic field caused
are
glue tape
the lead frame
loss in the
accuracy in the pm-range which makes the
the Hall
The
strength higher
limits the
placement
each side of the current
application.
bonders, offered
properties.
brate the system. Commercial LOC die bonders offer
the
dimen¬
ms.
Misalignment
by
Au
carrier coated with thermoelaslic adhesives.
polyimide
The accuracy of the CMOS die
monitor system.
same
nm
polyimide supported tape
The 7,06'
250 to 300°C To maximize the adhesive
at
properties
400
sensors.
thermoelaslic
middle).
and 5.6,
overall thickness of 90 pm
an
mm.
combined with excellent mechanical
structure consists of
With
a
a
of the lead frame
width of 1.3
manu¬
e.g., ABLELOC 5000 from Ablestik. Electronic Materials &
Fig. 5.5, left
Adhesives (see
with
pre-patterned
was
by
The lead frame has the
used for electrical interconnections to the Hall
are
followed
layer
Eight pins
a
CAD and
the surface
improve
It fits into industrial LOC die
which has
path
nm
cutting.
e.g., ESEC SA, Cham. Switzerland.
by,
10
by
The lead frame material
Fig. 5.6, top).
thickness of 250 pm. In order to
a
subsequent bonding
for
5.5 and
cutting (see Fig.
laser
laid out
was
glue tape
is recommended.
on
5
Applications
Fig.
5.6:
top) The lead frame for the
current
monitor system laid
out
by CAD
and manufactured by laser cutting. The material is
coppei with a thickness of
250 flm. Middle) The lead frame pre-palterned with a thermoelastic
polvimide
supported tape adhesive.
The tape offers
high
dielectric strength combined with
excellent mechanical pioperties. Bottom) Placement of the CMOS die with
commercial LOC die bonder
s.
120
a
5.1 Ciment Monitor
bonding wires
Fig.
5.7: Final
bonding
on
the
packaging steps
flipped
with commercial
lead frame.
bonder,
plastic
tools.
Vliddle) Plastic molding of the
tom) The formation erf puis and the final
In the final step, the current
packaging
monitoi
Top)
system.
Wire
Bot¬
system test.
system is bonded with
a
commeicial
molded, and tested with standard equipment used
duction.
121
in
IC
mass
wire
pro¬
5
Applications
System
Characterization
The response of the
output signals of the
Fig. 5.4). According
power
Hall
two
to
±10 A is measured. The
quadratic
monitor system is defined
current
Fig.
5.8
on
sensors
a
system
non-linearity
in the current
of the Hall
sensor
sensitivity,
the difference of the
path
each side of the current
of 82
sensitivity
pV/A
(see
in the range of
of the system response is below 0.3%. The
non-linearity is mainly
nature indicates that the cause of the
dissipation
as
path. Therefore,
the system
with temperature
linearity
can
due to
compensation
easily improved.
be
The resolution and accuracy of the current monitor system is limited
by
the fol¬
lowing properties:
•
offset
•
offset drift
over
sensitivity
drift
•
•
voltage
temperature
over
temperature
noise tevel of output
voltage
For the current monitor system, the continuous
to
reduce the offset
voltage
and its offset drift. A
Current
Fig.
ity
5.8:
Response of current
a
current
method
sampling frequency
was
used
of 2 Hz
[A]
monitor system. The
of 82 ftV/A. The non-linearity
below 2 u.V. This results in
spinning
signal
is linear with
is smaller than ±0.3% and the
measurement accuracy
a
sensitiv¬
signal offset
better than 50 mA.
lies
5.1 Curient Monitor
results in
by
a
residual offset of f
noise. Offset, noise and
than 50 mA and
pV
on
temperature which is mainly limited
result
measurement accuracy better
m a
resolution of 10 mA.
a
the
room
non-linearity
Offset reduction and temperature
integrated
at
same
compensation
CMOS die
limiting factor
Ironies will be the
the Hall
as
can
be
sensors.
The noise level of the elec-
for the svstem resolution. An
white-noise level for the current monitor system with
assumed to be in
a
range from
performed by electronics
MM
=
pT/Vflz
100
to
400
pT/VHz.
the
Assuming
current.
plying
at
Gaussian distributed
the
exceeds
given
magnetic field Bj generated
7V/H value by
only 0.1% of the
a
factor A
=
the
position
6.6
ensures
,
The value of
the bandwidth
sensors
of
per unit
noise, multi¬
that the calculated resolution
peak
value [22]. The
equation
is
below:
1000
=
A
NL, rfAf
f
Calculated
system
resolution
white-noise levels ranging from
peuk-to-peak
noise
/V/„
amplitudes.
=
0000
100
BanclwithAf
5.9:
(5.1)
Br
10
uted
of the Hall
peak-to-peak amplitudes
measurement time, its
he,
Fig.
A/M
rms
electronics is
integrated
the system resolution is calculated from the white-noise level
A/and
equivalent
with
100
to
[Hz]
integrated electronics assuming
400
fiT/\Hz
with Gaussian distrib¬
5
Applications
In
5.9 the calculated current monitor system resolution is shown
Fig.
tion of the bandwidth
with
an rms
white-noise level
resolution of better than
System Improvement
The system
sensitivity
Two methods
are
different white-noise levels
A/'for
IRcs
V/n
=
=
400
pT/v/Hz
and
Nlw.
bandwidth
a
82.5 mA is achieved (see
fabricated
an
A/
=
func¬
example,
100 Hz,
a
Fig. 5.9).
with Field Concentrators
can
tested
be further enhanced
(Fig. 5.10):
by magnetic field
In method (a)
a
soft
by anisotropic backside-etching
and
concentrators.
ferromagnetic
attached to the backside of the thinned CMOS die. In method
tors are
As
as a
plated
(b) tip
with
a
sheet is
concentra¬
soft NiFeMo
alloy [23, 24].
(b) micromachined
(a) thinned die with
ferromagnetic sheet
tip
Fig. 5.10: Sensitivity improvement bv using field
side. In method (a)
to
a
ferromagnetic sheet
75 flm. In method (b)
plated
with
a
a
NiFeMo alloy
tip
124
concentrators on
the die back¬
is attached to the die which is thinned
concentrator
[23 f.
concentrator
fabricated
by
anisotropic etching
is
5.1 Current Monitor
The
thinning
was
performed
also be
of the CMOS die to
the
at
used, but for
only approximately
epoxy
glue.
current
is
perpendicular
is attached
area
perturbed and
to
factor of
magnetic
approximately
(p,
tip
with
guide
anisotropic
Fig. 5.11).
1.5. Furthermore, for
it to the
at
the Hall
backside-etching
As
Hall
a
(a) basic system
high
relative
placement,
permeability
well
as
5.11:
and
system
enhanced »7/7;
by
bent towards
a
a
perpendicular
present state, the dis-
(c) system with
(c),
higher field
area
of the
125
tip
concentrators
sheet
system
(b). The magnetic field
direction with respect
density in the
starts
[25]. The tip of the
At the
to
result, higher magnetic response is achieved. In the
a
the current to be
magnetic field distribution for the basic
ferromagnetic
a
the thickness
placed. Processing
(b) system with magne-
FE simulation of
as
by
of the
properties.
wafer-level
sensor.
are
Numerical simulations
sensor.
tic sheet
Fig.
sensor
of the current monitor system
a
an
consequence, field lines
sensors are
on
the center of the Hall
sheet
sheet the field distribution of the
become non-critical
region
magnetic
soft
stamped
field lines penetrate the Hall
performance
glue,
etching techniques
minimum thicknesses of
capture the magnetic field generated
KOH
etch-groove points
magnetic
magnetic
(a)
can
the back of the CMOS die with
2500), its thickness and
>
concentrators
measured and
to
sensitivity of the
of the
of the CMOS die and epoxy
The
the
the die surface (see
improvement
sheet
stability,
a
used for method
as
Wafer-level
300 to 400 pm is achieved. A
bent towards the direction of
an
of mechanical
reasons
In the presence of the soft
path
propose
thickness of 75 pm
chip-level by grinding.
the entire die
covering
a
sensors
the CMOS die
case
of the tip
is achieved.
lines
surface.
(a)
are
As
concentrator
5
Applications
(b) tip
-10
-5
concentrator
0
5
10
Current [A ]
Fig.
5.12: A
the
sensitivity
current
is
monitor with
improved
chined concentrators (b)
additional
to
124
concentrators.
flV/A with
33).37c
improve the sensitivity
high yield mass-production,
underneath the Hall
nitride used
ing
NiFeMo
of
as
of the NiFeMo
alloy
was
a
seed
Ti
non-linearity.
240
to
sheet (a)
The microma-
hut introduce
flV/A
alloy follows
at
sheet
are
not
sensitivity
particular
by lithography
an
and
etching
prop¬
additional electrochemical etch-stop
[26].
After
layer sandwich
layer
followed
the
by
for
a
removing
the PECVD
subsequent electroplat¬
1.08 pm Cu
procedure according
30 mA/cur for 3 hours
improves
resulting
in
the
numerical simulation
system response
increase the
of this
ferromagnetic
a
layer). Elec¬
[23].
to
The
film-thickness
1.5 pm.
ierromagnetic
proposed by
plated
an
is recommended
deposited (lOnm
approximately
The
sensor
KOJI etch mask,
as
is sputter
troplating
a
non-linearity.
tance between sensor and etch groove is defined
erties. For
With
affected
even
by
NiFeMo film
a
an
by
sensitivity by a factor of
(Fig. 5.12). Non-linearity
the
magnetic
factor of 3
additional
to
237
sheet. The
pV/A.
non-linearity
1.5 to 124
pV/A
and offset of the
lip
concentrators
Due to the
hysteresis
is introduced.
5.2 Wear-Free Angle Measurement
5.2
Wear-Free
Cost effective
such
the
as
a
Angle
detection systems
angle
potentiometer,
related
problems
tactless
position
contactless
where
suffers from
approach
Measurement
become
an
are
electrode touches
mechanical
severe
angle
measurement
in combination with
general,
systems
are
of the
magnetic
more
a
meet the
never
be
robust
as
close
in best initial
matching
simple
as
A concept
must
be small
field. This lowers the
is the
against
e.g.
for the
requirements
mechanical tolerances, e.g..
packaging
magnetic
sen¬
homogeneity
of
misalignment
magnetic field,
on
the
However, magnetotransistors
the
Finally,
requirements
suffer from
a
large
angle detection [27].
strong cross-sensitivity due
the
same
sensors
chip.
sensor
setup
sensor
than
more
one
have to
This results
of process tolerances,
vertical Hall device
or a
if
Additionally,
of
as
well
allow
must
as
a
solution.
all of the above
absolute accuraccy for
of
for the
as
magnetic angle detection sys¬
enough to perform a point measure¬
possible together, preferably
magnetotransistor
use
such
and, consequently its price. Furthermore, the system
of temperature coefficients.
meeting
optical principle.
on an
is
possible by detecting
components of the magnetic inductions Bx and Bx parallel
a
a con-
to a
sensitivity matching, independent
and low-cost
based
approach
is used to determine the direction of the
placed
reliability
problems,
these
price requirements
and axis of rotation of the permanent magnet.
sensor
and, lifetime and
permanent magnet.
sensors
the permanent magnet,
becomes
principle,
resistive layer. However,
overcome
usually
following requirements apply
magnetic
tem. The
ment
the
a
resistive
on a
detection system is desirable. On the other hand, commercial
automotive market. Another cost effective
In
wear,
issue. In order to
an
Nevertheless, such systems
sors
usually based
as
to the
two
chip plane by,
shown in Fig. 5.13
offset
the
[12, 16].
voltage resulting
in poor
Hie vertical Hall device shows
to an insufficient carrier
path
confinement
[28].
a
In
contrary, the vertical trench-Hall devices presented in chapter 4 have excellent
cross-sensitivity
due
to
the thin active
Furthermore, the device bears the
the
spinning
current
technique
for
region
potential
high
for
defined
by
dynamic
two
offset
parallel
trenches.
compensation by
absolute accuracy.
The
packaging concept implies a sensor chip mounted on a pc-board by
chip-on-board packaging [18]. The sensor die is protected by a globe-lop 118].
127
5
Applications
axis of rotation
Fig.
5.13:
Wear
free angular
arranged vertical trench-Hall
manent
detection
on
orthogonally
two
angular position of a
per¬
magnet.
snapped
on
the
pc-board [29].
geometrical
terms
of
tance
between
can
a
low
price
to a
by plastic molding and
necessary requirements
Figs.
(see
5.13 and
on
the magnet
measurement system
PC for
signal
read-out.
is
in
5.14). The dis¬
5
ranges from 0.1 to
depending
wearfree angle
The system is attached
meets the
sensor
from 5 to 100 mT
a
be realized
approach
permanent magnet and
Fig. 5.14: Photograph erf
(eusibilitv.
The
tolerances al
magnetic induction
its
based
devices detecting the
The fixture for the permanent magnet
in
ssstern
mm
resulting
[15].
demonstrating
5.2 Wear-Free
Angle Measurement
270
80
Setting Angle [°]
Fig.
5.15: Measured
angle erf
the direction of
magnetic
direction
erf the applied field. Neglecting offset voltages
achieved
by applying
a
homogenous field of
0.5
0.3 T
1.0
a
induction
versus
the
resolution below 0.2° is
strength.
1.5
2.0
Equivalent Offset linTI
Fig.
5A6: Calculated
angle
measurenient accuracy versus
maximum
offset for different magnitudes of applied magnetic induction 130 J.
eepiivalent
5
Applications
An
angle
measured with two
trench-Hall devices for the
orthogonally arranged
system mentioned above is shown in Fig. 5.15. The angle is calculated by
arc-tangent of the ratio of the
sensitivity
Providing
needed.
was
neglecting offset voltages
for the resolution is the
sensor
noise
two sensor
signal
of the
noise itself which is, in
noise ratio of the
to
the
on
sensing
element the offset
sured
tion
devices,
trench-Hall
non-optimized
(16]. This value
can
be further
technology. According
100 mT this offset
voltage
less, specifications tend
maximum offset
Another
voltage
limiting
therewith the
to
depends
voltage
results in
and
mass
properties.
In terms of
offset below I mT
improved by mainly optimizing
an
is
accuracy of
magnetic
a
10 mT
a
strength of
1°. Neverthe¬
magnet requiring
are
a
mechanical tolerances, and.
applied permanent magnet.
of the
can cause a
In
particular
limitation of the
for
accu¬
degrees.
It is
packaged
with standard
in line with commercial IC
high
mea¬
was
the fabrica¬
field
approximately
accuracies below 1° with
factor for the system accuracy
presented.
and
the
is favorable for low
compact CMOS monitor system for galvanically isolated
completely
inexpensive
Co-integrating
in the 0.1 mT range.
racy in the range of several
measurement
limiting factor
the main contribution. For the
Fig. 5.16, considering
to
homogeneity
a
various
on
causes
small, low-cost magnets, poor homogeneity
To conclude,
field of 0.3 T and
noise.
sensor
equivalent
an
chip
sensor
However, the electronics contributes
than the
general, higher
sensor.
CMOS
same
signal.
sensor
The absolute accuracy of the system
the
homogenous magnetic
a
resolution below 0.2° is achieved. The
a
and front-end electronics
amplification
responses. No correction of the
an
production.
volume batch fabrication of
packaging. Furthermore,
accurate
an
and
current
lead-on-chip technology
This
chips
technology
followed
by
includes
automatic
inexpensive 2D-magnetic-sensor
system in CMOS technology is demonstrated. Exploiting vertical trench-Hall
devices enables
co-integration
electrically insulated.
compensated by
The
means
of
sensor
sensor
of the
and front-end
bears the
spinning
potential
current,
accuracy.
130
circuitry
for
resulting
in
on
the
same
being dynamic
a
chip
offset
high angular system
5.3 References
5.3
[1]
References
W. Andrä,
thin-film
p46l,
[2]
S.
Kühn, and
P.
Pertsch, "Current
magnetoresistive sensors,"
measurements
based
on
Sensor and Actuators A, vol. 37-38,
1993.
L. Blossfeld. and S.
Mehrgardt, "Hallsensor/ German Patent,
no.
DE
41 41 386 Al. 1993.
[3]
R.
Popovic,
R. Racz, J.
Strom- und/oder
Hresja, H. Blanchart, "Magnetleldsensor und
Energiesensor/ European Patent, no. EP 0 772 046 A2.
1997.
[4]
R.
Popovic,
sensor
and J.
sowie
Hresja. "Anordnung mit
einem ferromagnetisehen
fluss-Konzentrafor und Verfahren
in
nungen
je
einem
zum
einem
ersten
integrierten Magnetleld¬
und zweiten Magnet-
Einbau einer Vielzahl
von
Kunststoffgehäuse/ European Patent,
Anord¬
no.
EP
0 537 419 AI, 1992.
[5]
Y.
Mitsuru, "Magnetic
Patent,
[6]
sensor
with terminal for
detecting current," Japan
61080074, 1986.
no.
Y Kuril mi,
"Magnetoelectric conversion," Japan Patent,
no.
04364472,
1992.
[7]
R. Steiner, M. Schneider, F.
Mayer.
"Fully packaged CMOS current
Digest of Technical Papers
IEEE
[8]
N. Ueda, "Studies
VLSI
[9]
M.
Packaging Workshop,
( 10]
monitor
Mayer,
and H. Baltes,
using lead-on-chip technology,"
MEMS '98, p. 603. 1998.
LOC Structure
Package." Proceedings of the
vol. Ill, p. 4, 1993.
Schneider, R. Castagnetti, M. Allan, and H. Baltes, "Integrated flux
concentrator
cal
on a new
U. Muench, M.
Papers
improves
CMOS
magnetotransistor,"
H. Blanchard, L. Chiesi, R. Racz. R.
Technical
IEEE
Digest of
Techni¬
MEMS '95, p. 151, 1995.
Digest erf
Popovic, "Cylindrical
International Electron Device
hall device,"
Meeting (IEDM '96).
p. 541. 1996.
LI 1 ]
J.
Trontelj,
field
L.
source
Trontelj,
used
as a
R.
Opara,
A.
reference in
Pletersek, "CMOS integrated magnetic
magnetic field
131
sensors on common
sub-
5
Applications
strate," IEEE Instrumentation and Measurement Technology Conference
(IMTC '94),
[12|
p. 461, 1994.
Castagnetti, F. Maloberti, and
magnetic sensor with on-chip signal process¬
A.Haeberli. M. Schneider, P. Malcovati, R.
H. Baltes, "Two-dimensional
for contactiess
ing
angle measurement,"
IEEE J. Solid State Circuits, vol.
31,no. 12, p. 1902. 1996.
Y. Yoshino. K. Ao. and M. Kalo. "MRE rotation
[13]
high-accuracy,
high-sensitivity magnetic sensor for automotive use," Society of Automo¬
tive Engineers, Sensor and Actuators Congress, p. 67, 1987.
[14]
M. Metz, A. Häberli, M. Schneider. R. Steiner. C Maier, and H. Baltes,
sensor:
"Contactiess
angle measurement using four Hall devices on single chip,"
Digest of'Technical Papers of Transducers '97, p. 385, 1997.
[ 15]
Product
[16]
Magnettechnik dauermagnetische Werkstoffe
Catalog, KRUPP WIDIA GmbH. Essen, Germany.
KRUPP WIDIA
R.
Steiner,
et
al., "In-Plane sensitive vertical trench-Hall device," Technical
Digest of International Electron
[ 17]
N.
und Bauteile,
Device
Meeting (IEDM '98),
p. 479. 1998.
Mathieu, A. Chovel, M. Chertouk, "Figure of merit of semiconductor
integrated magnetic sensors,"
Sensor and Materials, vol. 5,
no.
6, p. 359,
1994.
[18]
C.Y.
Chang,
and S.M. Sze, VLSI
Technology,
McGraw
Hill,
New York,
1996.
[19]
A.J.
Wilks,
Patent
[20]
PG. Williams.
Application PCT
"Magnetic
no.
WO
field detection
system,"
89/10570, 1989.
R. Steiner. A. Haeberli, F.-P. Steiner, Ch. Maier, and H.
reduction in Hall devices
International
by continuous spinning
Baltes., "Offset
current." Sensor and
Actuators A, vol. 66. p. 167, 1998.
[21 ]
R. Gottfried-Gottfried. "Thermal behavior of CMOS Hall
ferent
[22]
Wr.B.
operating modes,"
Davenport.
Sensor and Actuators A. vol.
W.L. Root, An Introduction to the
Noise. IEEE Press. New York. 1987.
sensors
41-42,
for dif¬
p. 430, 1994.
Theory erf Signals
and
5.3 References
[23]
W.
Taylor,
M,
Schneider, H. Baltes. and M. Allen. "Electroplated soft mag¬
netic materials for microsensors and microactuators," Digest of Technical
Papers of Transducers '97,
[24]
W.
[25]
D.
126]
B.
p. 1445, 1997.
Freitag, and J. Matthias, "Electrodeposited nickel-iron-molybdenum
thin magnetic films//. Electrochem. Soc, vol. 112, no. I. pp. 64-70, 1965.
Jaeggi. "Thermal converters by CMOS technology,"
Physical Electronics Laboratory, Zurich, 1996.
Kloeck,
chemical
S.D. Collins, N.F. de
etch-stop
for
Rooij.
high-precision
branes," IEEE Transaction
on
and R.L. Smith,
Pfi.D.
"Study
Thesis,
of electro¬
thickness control of silicon
Electron Devices, vol. 36,
mem¬
4, p. 663,
no.
1989.
[27]
M. Metz, M.
tion
R.S.
A. Haeberli, and H.
of CMOS
Devices
[28]
Schneider,
magnetotransistor offset."
Conference (ESSDERC '98), p. 184,
Popovic,
Baltes, "Analysis and reduc¬
IEEE
European
Solid-Stale
1998.
"The vertical Hall-effect device," IEEE Electron
Device
Lett., vol. EDL-5, p. 357, 1984.
[29]
A. Haeberli,
[30]
M. Schneider, A. Haeberli, VI. Metz, P. Malcovati, and H. Baltes.
"Compensation and calibration of IC microsensors."
Thesis, Physical Electronics Laboratory, Zurich, 1997.
ature
calibration of CMOS
magnetic
vector
system," Technical Digest of
Meeting (IEDM '96), p. 533, 1996.
measurement
133
probe
Ph.D.
"Temper¬
for contactiess
angle
International Electron Device
5
Applications
134
6.1 Conclusion
6 Conclusion
and
Outlook
6.1
Conclusion
The fabrication of
features such
lished
are
In this
cost
like the
of dedicated
use
is
magnetic
Hall devices. The model
the device
parameters
induction
sense
are
the
design
predicts
contacts, and the
essential
to
the
design
perpendicular
to
fields
magnetic
solu¬
compensation techniques
sensor
offers
a
the
on
results indicate that four
offset induced
by
non-linearities,
a sensor
sensors
of
spinning
phase spinning
layout
following general design
»
A Greek
•
An aspect ratio hlk
pT
chip surface,
chip
to the
common
response of the
treated.
of
and
surface. A
integrated
mode
voltage
sensor.
These
the double-Hall
Although,
voltage,
current.
a more
powerful
Theoretical and
is sufficient to cancel the
with maximum
netic induction in the range of 10
the
optimization
mechanical stresses. To avoid offset
considered in this work
cross
are
way to reduce the offset
technique
considered: the lateral
to
parallel
magnetic
Hall-based
of dedicated front-end electronics. Further¬
offset
simple
are
input resistance, the
more,
•
to
device model is introduced which allows the
is based
in certain
appropriate packaging
Two types of Hall devices
presented.
the vertical trench-Hall device sensitive
The
design software. Moreover,
work, the theoretical background relevant
Hall device sensitive to
at
with well estab¬
also available.
microsystems
simple
manufacturing
considered in this thesis,
cases
technology exploits unique
standard IC
effective batch fabrication,
and
reliability,
applications,
tions
as
microsystems utilizing
are
possible
useful for
to 100
experimental
major
voltages
method
source
introduced
symmetry is
of
by
employed.
applications involving
mag¬
mT. For the lateral Hall device, the
attributes have been chosen:
layout
-
to
10
achieve
high signal linearity.
pm/20 pm to 20 pm/20 pm,
ity at low input resistance.
Shielding of the device w ith
a
gate-polv silicon layer
135
to
to
yield high
improve
sensitiv¬
EMC.
6 Conclusion and Outlook
for the vertical trench-Hall devices, the
Similarly
attributes considered
design
include:
•
Placement of contacts
•
A trench
depth
Shielding
•
offset behavior
of
presented
object
itor has
a
detecting
racy
the
of
use
ment of the
a
50 to 80
x
x
a
80
<1 mT
pm2
are
10 x80
used for bias field
generated by
a
an
of merit is show
perfeetlv;
n
applications,
electrical current
a
This
is
a
significant impact
on
or
Although
the current
particular,
requirements
for
the
overall
the market.
136
can
as
accu¬
economically
in-plane
of the field
including
optimized
the
mon¬
such
Applications needing higher
associated with the rotary switch
issue
detection of
security applications,
suited for
electric current.
field lowers the
critical
litis includes
rotary switch. A summary of the
in Tab. 6.2.
vertical trench-Hall device. In
magnetic
pm2
permanent magnet. Two specific applications
monitor and
requirements
(with spinning)
merit of lateral and vertical Hall devices.
trench-Hall device should be further
make
Hall device
pT (with spinning)
10
field distribution of the permanent magnet,
erances.
Vertical trench-
field concentrators, however, this may not prove
ble. In contrast, the
in Tab. 6.1.
0.1 ...0.15% @±0.3T
here
an
given
of merit for the devices is
150 ppm @ ±0.3 T
limited accuracy, it is
require
trench for EMC.
250 to 300 mV/T
a current
the presence of
that is 2.4 pm.
100 to 150mV/T
attached to
key performance figures
region
sense contact.
5 to lOkO
induction
have been considered:
deep
a
2 to 6 kO
50
magnetic
an
of
parallel
Performance figures of
detection of
position
~
consumption
The Hall devices
use
perpendicular
sensitivity
linearity
Tab. 6.1
the
Lateral Hall device
@ I mA bias
sensitivity
or
polysilicon-filled
a
resistance
input
area
ith
w
performance figures
Performance figures
of merit
direction of
surface
chip
of 20 pm with thickness of the active
of the device
An overview of
the
on
via¬
be met
by
w-measure-
strength
and of the
associated mechanical tol¬
system
cost.
for low offset
The
vertical
(<100pT),
to
6.1 Conclusion
Performance
figures of merit
Current monitor
range
up to 20 A
360°
J 0 mA (A 2 Hz,
0.1 to 0.5°
resolution
Rotary
switch
80 mA @ 100 Hz
50 mA (/ 2 Hz,
accuracy
150
a
Tab. 6.2
Finally,
•
•
in case
ol
optimized
a
merit
summary of results and their
Lateral Hall devices of reduced
limited
which
are
exhibit
outstanding linearity.
only
voltages
of the considered applications.
comparison
area
to the state of the art
yield input
is
given:
resistances and sensitivities
the CMOS process parameters. The devices
by
Vertical trench-Hall devices show similar
Additionally,
and high linearity
(with
spinning current)'1
@ 100 Hz
mA
temaimng ollset
Performance figures of
0.1 to 1.0°
the yet
performance
to
lateral devices.
unoptimized
only can be compared to magnetotransistors. Further¬
more, the sensor can be offset compensated by the spinning current tech¬
nique, where values in the mT-range have already been achieved,
•
The
current
devices have very low cross-sensitivities
that
monitor combines low system cost with sufficient accuracy. It
represents the first
current monitor
niques (lead-on-chip).
sensor
measurement
A minimal distance between the
packaging tech¬
current path and (he
high sensitivity. Therefore, no additional (field
requiring hybrid packaging solutions, is needed.
emplovs
principle
Finally,
is
achieved
at
focus¬
the vertical trench-Hall device. Therefore, the
does not pose
magnet and associated
olution
•
core,
The rotary switch
nent
standard
is achieved for
sing) magnetic
•
requiring only
stringent requirements on the perma¬
mechanical tolerances. Consequently, good res¬
low overall system cost.
applications are completely in line
and, therefore, allow co-integration of dedicated
chip.
both
137
with
CMOS-technology,
electronics
on
the
same
6 Conclusion and Outlook
6.2
Outlook
The lateral Hall device should be introduced in
Since dedicated front-end electronics, such
and electronics should be accessible to
modeling
be based
can
However, future work
trench-Hall
device.
be
a
spinning
the
qualified
on
a
theory presented
device
The
promise, particularly,
using
the
on
optimization
already
the
general
user.
possibility
of
high
offers the necessary building blocks for the
a
large
Further work
tions of
ments.
a
group of
on an
low-cost
Finally,
of offset reduction
technology
current
volume fabrication. Next,
provided. Again,
this
applica¬
monitor up to 20 A, with moderate accuracy
require¬
packaging
only
on
if
a
large quantity
issues related to
and environmental test. The measurement
of systems
future work for the rotary switch is
extracting
the
angle
mainly
limited to
principle
of rotation from the
concerned,
no
expected
138
if
plastic
molded
coils.
sensor
AD-conversion should not be under estimated. As far
are
should
signal conditioning.
subsequent
serious issues
are
packaging, i.e.,
closed-loop approach utilizing on-chip compensation
The effort needed in
has to
and dedicated front-end elec¬
sensor
manufactured. Efforts should concentrate
on a
sufficient
is recommended, for
LOC
Flowever, this solution is viable
be based
the vertical
designers.
approach using
long-term reliability
on
holds
performance
demonstrated
device model similar to the lateral Hall device has to be
tronics to
The needed device
should be focussed
reliability requirements
spinning
the
blocks for the
building
method. First, the associated CMOS
current
by
in this work.
when combined with the
to meet the
professional design library.
offset reduction
as
technique, requires expert knowledge, only
current
sensor
a
as
signal
and
packaging
packaging
is used.
is
JtjLjL
A.l
The
JtLIN JLI1 V^lLk3
iL
Basic Field
magnetic
strength H
flux
Equations
density
or
magnetic induction
B is related to the
magnetic
field
as
B
where p( is the relative
ability in
and Unit Conversions
vacuum.
the external
The
magnetic
p0p;77,
=
permeability
and material
magnetic induction
field
strength
B
The relation between the
B in
77 and the
p0(f/
=
(A.l)
magnetization
+
a
dependent,
and p0 the perme¬
material is the
magnetization
superposition
of
M
M).
(A.2)
M and the
magnetic
field
strength
77 is
given by
M
=
xmH<
(A3)
using the magnetic susceptibility %m. The corresponding
system of above properties are given in Tab. A.l.
SI-un it
property
B
T
units
cgs-unit
(tesla)
G(gauss)
1 T
=
1
Vs/m2
A/m
Oe (oersted)
1 A/m
=
M
A/m
Oe
I A/m
=
Mo
T/Ara
G/Oe
471-10
-
—
Xin
a
Tab. A. 1
1 O
-
1 Oe
in
Useful
dec
an
convei
(LI.
=
siem
1 )
units
of magnetic properties.
139
the SI- and cgs-
conversion
H
lb
in
=
104
G
471-10 'Oe
47C-10",Oe
7T/Am=l
G/Oe'1
A.2 List of
Symbols
ß
M
Numerical
Y
[-1
Material
e
I-]
Dielectric Constant
e0
|F7cm]
Permittivity
Non-Linearity
Coefficient
Non-Linearity Coefficient
in Vacuum
Dielectric Constant of Silicon
X
Correction Factor
K
Phase
Angle
|cm~/Vs]
Electron
Mp
Lcm2/Vs]
Hole
Mo
[H/cm ]
Permeability
I1//»
[cm2/Vs]
Hall
Mobility
for Electrons
Mffl)//
[cm2/Vs]
Hall
Mobility
at
^aß
|Pa-'l
Piezoresistive Coefficients
P
[Q/m]
Resistivity
[O cm]
Mean
Pa
[Qcml
Resistivity
aß
[Pa]
Mechanical Stress
Effective
GO
LQ^cm"1]
[LT1 cm1]
X
fsl
Relaxation Time
%
Is]
Hole Relaxation Time
Ù
L-]
Contact
[V]
Electric Field
<?
L-]
(ùc
is-'l
Switching Angle
Cyclotron Frequency
L-J
Deflection
[cuF2]
Ion Dose
[V]
Fourier
B
LT]
Magnetic
B,
[V]
Fourier
Br
fT/Al
Magnetic Induction
D
fenr/sj
Diffusion Constant
Ad
Lm]
Geometric Deflection
o
p0
Doping Profile
An
P
x
Mobility
Mobility
in Vacuum
Zero Induction
Hydrostatic
Unstressed
Resistivity
Stress Free Material
Conductivity
Conductivity
of Electrons
of Electrons
Opening Angle
Angle,
Hall
Components
of Offset
Voltage
Induction
Components
140
Angle
of Restive
Voltage
per Unit Current
e
LCJ
Electron
E
[V/m]
Electric Field
Ea
LV/m]
Applied
Eu
[V/m]
Hall Electric Field
Erf(x)
1-1
Error Function
/
[Hz]
Frequency
Af
[Hz]
Bandwidth
F
[NI
Mechanical Force
FH
[N]
Hall Force
Fi
[N]
Lorentz Force
Gr
[-]
Resistive Correction Factor
G$
[-1
Sensitivity
h
[pm]
Length Side
I
[A]
Electric Current
hi
[V]
Contact Current at Contact
Jn
Electron Current
JP
[A/m2]
[A/m2]
Hole Current
k
[J/K]
Boltzmann Constant
k
[pm]
Width Side Arm Greek Cross Hall Devices
[-]
Kinetic Coefficient
K
1,2,3
Charge
Electric Field
Correction Factor
Arm Greek Cross Flail Devices
Density
I-J
Complete Elliptic Integral
kT
[eV]
Thermal
m0
[kg]
Rest Mass Electron
m*
[kg]
Effective Mass
Electron Carrier
Nv
[cm'3]
[cm"3]
[cnF3]
[cnf3]
[cm-3]
LcnF3]
Eff.
NLG
[-1
Geometrical
NLM
1-1
Mate ri al Non- Linearity
NLW
[T/vHz]
Noise Level
»,
NA
Nc
ND
Po
[cnf3]
[cm"3]
A)
[cm"-11
P
and /
Density
K(/;;2)
n
;
Energy
Density
Intrinsic Carrier Concentration
Acceptor
Eff.
Carrier Concentration
Density
of States (Conduction
Band)
Donor Carrier Concentration
Density
of States (Valence Band)
Non-Linearity
Hole Carrier
Density
Equilibrium
Hole Carrier
Background Doping
141
Density
Concentration
Peak
Doping
Concentration
Electrical
Charge
Scattering
Factor
Hall
Scattering
Factor
Resistance
Hall coefficient
Hall coefficient at Zero Induction
Hall coefficient
Including Scattering
Projected Range
Projected Straggle
Reduction
\
n+-Layer
alue
Reduction value n-well
Integral path
Jacobian
Integral Function
Absolute
Sensitivity
Current Related
Power
Sensitivity
Sensitivity
Voltage
Related
Sensitivity
Temperature
Depth Abrupt
Junction Profile
Charge Velocity
Drift
Velocity
Built-in
Hall
of Electrons
Voltage
Voltage
Superposition
Contact
Offset
of Hall And Offset
Voltage
at Contact
;
Voltage
and /'
Voltage
Resistive
Voltage
Superposition
Reference
Substrate
of Resistive And Offset
Voltage
Voltage
Depletion Layer
Thickness
n-Region
Depletion Layer
Thickness
p-Region
Voltage
A3
Physical Constants
£o
[As/VmJ
8.85418-10-!-
Permittivity
£Si
[-1
11.9
Dielectric Const. Silicon
Mo
[Vs/Am]
4ti- 10
1500
7
in Vacuum
Permeability
in Vacuum
p/;
(Si)
[cnr/Vs]
Vp
(Si)
[cm2/Vs]
450
Hole
LJ]
1.60218-10-'9
Electron Volt
[eV]
1.12
Bandgap
k
[J/K]
1.3807-10-23
Boltzmann Constant
kT/q
LV]
0.0259
Thermal
eV
Eg
(Si)
m0
Electrou
31
at
300K
Voltage
at
300K
9.1094-10
0.98/0.19-/;;0
1.45-1010
Effective Mass
Eff. Dens, of Stat. (Cond. Bd.)
Electrical
Hall
(Si)
[kg]
n,
(Si)
[ein j
Nc (Si)
Ny (Si)
[cnF3]
[cur3]
a
[CJ
2.80-1019
J.04-1019
1.60218-10"19
[-]
1.17
rH
Mobility
[kg!
m*
(Si)
Mobility
143
Rest Mass Electron
Intrinsic Carrier Concentration
Eff. Dens, of Stat. (Val. Bd.)
Charge
Scattering
Factor
A.4 List of Abbreviations
Circuit
ASIC
Application Specific Integrated
BPSG
Boro
CAD
Computer Aided Design
CYE, CXE
2 pm CMOS processes of Austria Mikro
CMOS
Complementary
DRAM
Dynamic
EDP
Ethylene-Diamine Pyrocatechol
EMC
Electromagnetic Compatibility
ESD
Electrostatic
FEM
Finite Element
IC
Integrated Circuit
Phospho
Silicate Glass
Metal Oxide Semiconductor
Random Access
Memory
Discharge
Modeling
J JL JLj Jl
Junction Field Effect Transistor
KOH
Potassium
LOC
Lead On
LOCOS
Local Oxidation
LPCVD
Low Pressure Chemical
MEMS
Micro Electro Mechanical System
MOS
Metal Oxide Semiconductor
PCB
Printed Circuit Board
PECVD
Plasma Enhanced Chemical
PMMA
Pol y methyl -Me t ha cry 1 at
PSG
Phospho SiLicate
R1E
Reactive Ion
SIMS
Secondary-Ion Mass Spectrometry
SOI
Silicon On Insulator
SOG
Spin
SOS
Silicon On
TEOS
Tetraethylprthosilicate
ULS1
Ultra
VLSI
Systeme
Hydroxide
Chip
Vapor Deposition
Vapor Deposition
Glass
Etching
On Glass
Large
Very Large
Sapphire
Scale
Scale
Integration
Integration
144
Int. AG.
Acknowledgments
First of all I would like to thank Prof. Dr. H.
tunity
to do this work at the
Baltes, for giving
me
the great oppor¬
Physical Electronics Laboratory (PEL).
The
profes¬
sional environment and the enthusiastic ambiance maintained in his research
group,
was
that I could
on
track, if
the basis of
always
finally making
go to my limits
something
em.
critical
of the
this thesis. It is
a
(or
even
possible.
beyond),
He motivated
and he
always put
me,
such
me
back
went in the wrong direction.
I wish to thank Prof.
proof-reading
this work
Dr. Dr. h.
pleasure
S. Midddelhoek, my
c.
manuscript
to
and
suggestions
to
co-examiner, for the
improve
the
thank Prof. Dr. Ch. Blatter and Dr. R.
quality
Vogt
of
for the
readiness to co-examine this thesis.
I wish to thank my
supervisors
Dr. F.-P. Steiner and Dr. R.
I also would like to thank Prof. Dr. A. Nathan for
topics concerning
theoretical aspects of Hall
thank him for his critical
A
friendship developed
Mikro
Systeme
beyond
proofreading
for their support.
discussions, in particular
sensors.
Furthermore, I would like
on
to
of this thesis.
with Dr. Th. Olbrich
International AG.
Vogt
During
during
the collaboration wiihAustria
my stay in Graz,
our
collaboration went
discussions about microsensors. 1 also would like to thank him for his
many critical
questions,
that
always helped
me, to focus my work to
practical
rel¬
evance.
It is my
taught
great pleasure
me
the
secrets
to
thank M. Schneider. M. Metz, and A. Häberli.
of Hall
sensors
("Overall it's just
that many discussions that started with selected
ended in
taught
ness.
a
me
She
completely
was a
a
technical paper.
dignified substitute
resistor"').
problems
different direction. M. Schneider
how to write
a
Finally,
was
They
I remember
on sensor
offset and
also the person who
1 would like to thank N. Ker-
for M. Schneider in
our
office.
I wish to thank Dr. O. Brand. Prof. Dr. J. G. Korvink. and Prof. Dr. O. Paul for
many technical discussions.
145
I
am
grateful
port. I
thanks
owe
Hug
to E.
to
and Y.
Allmen for very efficient administrative sup¬
D. Scheiwiller, M.
technical assistance. A
special
the mechanical work
shop.
The entire staff of the
Physical
or
von
Schlapfer, Igor Lcvak,
and Ch. Kolb for
thanks goes to P. Briihwiler and H.
Electronics
Laboratory
another to this thesis. I would like to thank
Hcdiger from
has contributed in
(in alphabetical order):
one
way
Dr. M. Bäch-
told, M. Brogle, Dr. D. Bolliger, Dr. J. Bühler, M. Emmenegger, Ch. Hagleilner,
Dr. M.
Hornung,
Dr. D.
Jäggi.
A. Koll, S. Koller. D.
Lange,
Maier, M. Mayer. F. Mayer, T. Midler. U. Mïmch.
A. Seh aufel bii hi, Dr. N.
Schneeberger,
Dr. P. Malcovati, Ch.
Plattner, Dr. B.Rogge,
L.
Trautweder, Dr. M.
S. Tascini, Dr. S.
von
Arx, M. Wälti, V. Ziebart. and M. Zimmermann.
I
appreciated
the collaboration with experts from Austria Mikro Systeme Interna¬
tional AG, Austria: R. Baresch, Prof. Dr. Dr. V.
war, Dr. FI.
Kempe,
family, in particular
Richard Steiner, and my many friends who gave
the last years.
to
Finally,
1
owe
me
my wife Martina Vanha
my parents Liselotte and
the
a
support necessary
over
She
con¬
big
this work in many different ways.
This work has been funded
Zurich,
Kröner, S. Nam-
Wille,
Foremost I would like to thank my
tributed
Dr. F.
April
by
the ESPRIT project
1999.
146
MaglC.
'thank
you".
Curriculum Vitae
Ralph
Born
Steiner Vanha
August 2. 1966, married
Citizen of Winterthur, Canton of Zurich. Switzerland
Dec. 1995
-
present
Doctoral work at the
directed
Apr.
1995
-
Dec. 1995
by Prof.
Dr.
Research assistant
Physical Electronics Laboratory
Henry Baltes at ETHZ.
at the
'Eidg.
Material priifungs- und
Forschungsanstalt \ Diibendorf.
Apr.
1995
Masters
diploma
Diploma
thesis
experimental Physics at ETHZ.
'Mechanical Material Properties of
in
on
Dielectric CMOS-1
Nov. 1990
Nov. 1987
-
-
Apr.
1995
Nov. 1990
dyers'.
Physics student at the Swiss Federal
nology Zurich (ETHZ). Switzerland.
Bachelor's
degree
in Electrical
Institute of Tech¬
Engineering
from Tech¬
nikum Winterthur, Winterthur, ZH.
Apr. 1986
-
Nov. 1987
Electronics technician
Swiss army
1982
-
Apr. 1986
Gebr. Sulzer AG, Winterthur.
service, and
(Tulane Univ., New
Apr.
at
Apprenticeship
English language program
Orleans, and U.C. Berkeley).
in Electronics at Gebr. Sulzer AG, Win¬
terthur.
147