CALIFORNIA INSTITUTE OF TECHNOLOGY PHYSICS MATHEMATICS AND ASTRONOMY DIVISION Sophomore Physics Laboratory Physics 5 and 105 Course Laboratory Notes Academic Year 2012-2013 ( Partial Revision December 2012) AF T Copyright©Virgínio de Oliveira Sanníbale DR Caltech Physics Deparment, MS 103-33 1200 E. California Blvd. 91125 Pasadena,CA http://www.ligo.caltech.edu/~vsanni/ph5/ 2 DR AF T Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 12 13 13 14 15 15 16 16 16 17 18 18 19 20 20 21 22 24 25 25 26 27 27 28 30 31 AF T Alternating Current Network Theory 1.1 Symbolic Representation of a Sinusoidal Signals, Phasors 1.1.1 Derivative of a Phasor . . . . . . . . . . . . . . . . 1.1.2 Integral of a Phasor . . . . . . . . . . . . . . . . . . 1.2 Network Definitions . . . . . . . . . . . . . . . . . . . . . 1.2.1 Series and Parallel . . . . . . . . . . . . . . . . . . 1.2.2 Active and Passive Components . . . . . . . . . . 1.3 Kirchhoff’s Laws . . . . . . . . . . . . . . . . . . . . . . . 1.4 Passive Ideal Components with Phasors . . . . . . . . . . 1.4.1 The Resistor . . . . . . . . . . . . . . . . . . . . . . 1.4.2 The Capacitor . . . . . . . . . . . . . . . . . . . . . 1.4.3 The Inductor . . . . . . . . . . . . . . . . . . . . . 1.5 The Impedance and Admittance Concept . . . . . . . . . 1.5.1 Impedance in Parallel and Series . . . . . . . . . . 1.5.2 Ohm’s Law for Sinusoidal Regime . . . . . . . . . 1.6 Two-Port Networks . . . . . . . . . . . . . . . . . . . . . . 1.6.1 Bode Diagrams . . . . . . . . . . . . . . . . . . . . 1.6.2 The RC Low-Pass Filter . . . . . . . . . . . . . . . 1.6.3 The RC High-Pass Filter . . . . . . . . . . . . . . . 1.7 Ideal Sources . . . . . . . . . . . . . . . . . . . . . . . . . . 1.7.1 Ideal Voltage Source . . . . . . . . . . . . . . . . . 1.7.2 Ideal Current Source . . . . . . . . . . . . . . . . . 1.8 Equivalent Networks . . . . . . . . . . . . . . . . . . . . . 1.8.1 Voltage Divider . . . . . . . . . . . . . . . . . . . . 1.8.2 Thévenin Theorem . . . . . . . . . . . . . . . . . . 1.8.3 Norton Theorem . . . . . . . . . . . . . . . . . . . 1.9 First Laboratory Week . . . . . . . . . . . . . . . . . . . . 3 DR 1 CONTENTS 4 Pre-laboratory Problems . . . . . . . . . . . . . . . . . Procedure . . . . . . . . . . . . . . . . . . . . . . . . . 31 33 2 Resonant Circuits 2.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.2 The LCR Series Resonant Circuit . . . . . . . . . . . . . . . . 2.2.1 Frequency Response with Capacitor Voltage Difference as Circuit Output . . . . . . . . . . . . . . . . . . 2.2.2 Frequency Response with Inductor Voltage Difference as Circuit Output . . . . . . . . . . . . . . . . . . 2.2.3 Frequency Response with the Resistor Voltage Difference as Circuit Output . . . . . . . . . . . . . . . . 2.2.4 Transient Response . . . . . . . . . . . . . . . . . . . . 2.3 The Tank Circuit or LCR Parallel Circuit. . . . . . . . . . . . . 2.3.1 LCR Circuit Frequency Response . . . . . . . . . . . . 2.3.2 Transfer Function . . . . . . . . . . . . . . . . . . . . . 2.3.3 Simplest Case . . . . . . . . . . . . . . . . . . . . . . . 2.3.4 High Frequency Approximation . . . . . . . . . . . . 2.3.5 LCR Parallel Circuit Transient Response . . . . . . . . 2.4 Laboratory Experiment . . . . . . . . . . . . . . . . . . . . . . 2.4.1 Pre-laboratory Exercises . . . . . . . . . . . . . . . . . 2.4.2 Procedure . . . . . . . . . . . . . . . . . . . . . . . . . 37 37 38 3 The Operational Amplifier 3.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2 The Ideal Operational Amplifier . . . . . . . . . . . . . . . . 3.2.1 Ideal Op-Amp Fundamental Equation (Golden Rules) 3.2.2 Op-Amp Input Output “Logic” . . . . . . . . . . . . . 3.2.3 Op-Amp with a Feedback Network . . . . . . . . . . 3.2.4 The Virtual Ground . . . . . . . . . . . . . . . . . . . . 3.3 Commonly Used Op-Amp Circuits . . . . . . . . . . . . . . . 3.3.1 Non-Inverting Amplifier . . . . . . . . . . . . . . . . . 3.3.2 Inverting Amplifier . . . . . . . . . . . . . . . . . . . . 3.3.3 Differential Input Stage . . . . . . . . . . . . . . . . . 3.3.4 Voltage Follower (Unity Gain “Buffer”) . . . . . . . . 3.3.5 Integrator Amplifier . . . . . . . . . . . . . . . . . . . 3.3.6 Differentiator Amplifier . . . . . . . . . . . . . . . . . 3.4 Negative Feedback Amplifiers . . . . . . . . . . . . . . . . . 57 57 58 59 59 60 60 60 61 62 62 63 64 65 66 38 40 41 43 45 46 48 49 49 50 52 52 53 AF T DR 1.9.1 1.9.2 CONTENTS 5 3.4.1 3.4.2 3.4.3 3.5 3.6 3.7 . . . . . . . . 68 68 69 69 69 70 70 71 . 73 . . . . . . . 73 74 75 76 77 79 79 AF T Diodes and Transistors 85 4.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 4.2 The Semiconductor Junction (Diode) . . . . . . . . . . . . . . 85 4.2.1 Zener Diodes . . . . . . . . . . . . . . . . . . . . . . . 87 4.2.2 Schottky Diodes . . . . . . . . . . . . . . . . . . . . . . 88 4.3 Diode Dynamic Impedance . . . . . . . . . . . . . . . . . . . 88 4.4 Practical Circuits . . . . . . . . . . . . . . . . . . . . . . . . . 89 4.4.1 Rectifiers, AC to DC Conversion . . . . . . . . . . . . 89 4.4.1.1 Half-Wave Rectifier . . . . . . . . . . . . . . 89 4.4.1.2 Full-Wave Rectifier Bridge . . . . . . . . . . 91 4.4.2 Voltage Limiter (Diode Clamp) . . . . . . . . . . . . . 91 4.5 The Bipolar Junction Transistor (BJT) . . . . . . . . . . . . . . 92 4.5.1 The Collector Emitter Characteristic . . . . . . . . . . 94 4.5.2 The BJT as a Current-Controlled Current Source (CCCS) 95 4.5.3 BJT Simplified DC Model . . . . . . . . . . . . . . . . 96 4.5.4 The BJT as an Amplifier . . . . . . . . . . . . . . . . . 97 4.5.4.1 BJT Amplifier Bias . . . . . . . . . . . . . . . 98 DR 4 Input Impedance Feedback Amplifier . . . . . . . . Output Impedance Feedback Amplifier . . . . . . . Simple Feedback Network . . . . . . . . . . . . . . . 3.4.3.1 Non-Inverting Configuration . . . . . . . . 3.4.3.2 Inverting Configuration . . . . . . . . . . . The Real Op-Amp . . . . . . . . . . . . . . . . . . . . . . . . 3.5.1 Bias Currents and Voltage and Current Offsets . . . 3.5.2 Compensated Op-Amp Transfer Function . . . . . . 3.5.2.1 Compensated Op-Amp with Constant Frequency Response Feedback . . . . . . . . . 3.5.2.2 Compensated Op-Amp in the Differentiator Configuration . . . . . . . . . . . . . . 3.5.3 The Common Mode Rejection Ratio (CMRR) . . . . 3.5.4 The Gain Bandwidth Product (GBWP) . . . . . . . . 3.5.5 The Slew Rate (SR) . . . . . . . . . . . . . . . . . . . 3.5.6 Ideal versus Real and Practical Considerations . . . Problems Preparatory to the Laboratory . . . . . . . . . . . Laboratory Procedure . . . . . . . . . . . . . . . . . . . . . . CONTENTS 6 4.5.4.2 4.5.5 4.5.6 4.5.7 BJT Amplifier Gain, Input and Output Impedance (Low Frequency Model) . . . . . . . . . . . 99 BJT as Switch . . . . . . . . . . . . . . . . . . . . . . . 100 BJT as Diode . . . . . . . . . . . . . . . . . . . . . . . . 101 Current Mirror . . . . . . . . . . . . . . . . . . . . . . 101 5 Basic Op-Amp Applications 5.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.1.1 Inverting Summing Stage . . . . . . . . . . . . . . . . 5.1.2 Basic Instrumentation Amplifier . . . . . . . . . . . . 5.1.3 Voltage to Current Converter (Transconductance Amplifier) . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.1.4 Current to Voltage Converter (Transresistance Amplifier) . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.2 Logarithmic Circuits . . . . . . . . . . . . . . . . . . . . . . . 5.2.1 Logarithmic Amplifier . . . . . . . . . . . . . . . . . . 5.2.2 Anti-Logarithmic Amplifier . . . . . . . . . . . . . . . 5.2.3 Analog Multiplier . . . . . . . . . . . . . . . . . . . . 5.2.4 Analog Divider . . . . . . . . . . . . . . . . . . . . . . 5.3 Multiple-Feedback Band-Pass Filter . . . . . . . . . . . . . . 5.4 Peak and Peak-to-Peak Detectors . . . . . . . . . . . . . . . . 5.5 Zero Crossing Detector . . . . . . . . . . . . . . . . . . . . . . 5.6 Analog Comparator . . . . . . . . . . . . . . . . . . . . . . . . 5.7 Regenerative Comparator (The Schmitt Trigger) . . . . . . . 5.8 Phase Shifter . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.9 Generalized Impedance Converter (GIC) . . . . . . . . . . . 5.9.1 Capacitor to Inductor Converter . . . . . . . . . . . . 5.10 Problems Preparatory to the Laboratory . . . . . . . . . . . . 107 107 107 108 6 Active Filters 6.1 Classification of Ideal Filters . . . . . . . . . . . . . . . . 6.2 Filters as Rational Functions . . . . . . . . . . . . . . . . 6.2.1 Second Order Low-Pass Filter . . . . . . . . . . 6.2.2 Second Order High-Pass Filter . . . . . . . . . . 6.2.3 Band-Pass Filter . . . . . . . . . . . . . . . . . . 6.3 Common Circuit Filters Topologies . . . . . . . . . . . . 6.4 Infinite Gain Multiple Feedback Configuration (IGMF) 6.4.1 Low-pass Filter . . . . . . . . . . . . . . . . . . . 127 128 129 131 132 133 134 135 136 109 DR AF T 110 111 112 112 114 114 114 116 116 117 118 119 121 122 123 . . . . . . . . . . . . . . . . . . . . . . . . CONTENTS 6.6 6.7 8 Basics on Oscillators 7.1 Introduction . . . . . . . . . . . . . . . 7.2 Barkhausen Criterion . . . . . . . . . . 7.2.1 Gain Stability . . . . . . . . . . 7.2.2 Automatic Gain Control (AGC) 7.2.3 Oscillation Kick-start . . . . . . 7.2.4 Frequency Stability . . . . . . . 7.3 Phase Shift Oscillator . . . . . . . . . . 7.4 The Wien-Bridge Oscillator . . . . . . 7.5 LC Oscillator . . . . . . . . . . . . . . . 7.6 Crystal Oscillator . . . . . . . . . . . . 7.7 Relaxation Oscillators . . . . . . . . . . 7.7.1 Square Wave Generator . . . . 7.7.2 Triangular Wave Generator . . Phase Locked Loop (PLL) 8.1 Phase Locked Loop Basic Analysis . 8.2 Phase Detector . . . . . . . . . . . . . 8.2.1 Analog Mixer Phase Detector 8.2.2 Logic Gate Phase Detector . . 8.3 Voltage Controlled Oscillator (VCO) 8.4 Varactors or Varycap . . . . . . . . . 8.5 CMOS 4046 PLL Circuit . . . . . . . 8.6 Pre-lab Problems . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137 138 139 140 141 141 142 142 143 144 144 144 145 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 149 149 149 151 151 151 152 152 153 155 157 160 160 161 . . . . . . . . 167 168 168 169 169 170 171 172 172 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . DR 7 6.4.2 High-pass Filter . . . . . . . . . . . . . . 6.4.3 Band-pass Filter . . . . . . . . . . . . . . Generalized Sallen-Key Filter Topology (GSK) 6.5.1 GSK Second Order Low-pass Filter . . . 6.5.2 Simple Case . . . . . . . . . . . . . . . . 6.5.3 GSK Second Order High-pass Filter . . 6.5.4 Simple Case . . . . . . . . . . . . . . . . 6.5.5 GSK Band-pass Filter . . . . . . . . . . . 6.5.6 Simple Case . . . . . . . . . . . . . . . . State Variable Filter Topology (SV) . . . . . . . Practical Considerations . . . . . . . . . . . . . 6.7.1 Component Values . . . . . . . . . . . . 6.7.2 Components technology . . . . . . . . . AF T 6.5 7 . . . . . . . . . . . . . . . . . . . . . . . . CONTENTS 8 9 Final Project, Some Useful Circuits 9.1 Solderless Breadboard . . . . . . . . . 9.2 Decoupling/Bypassing Capacitor . . . 9.3 Variable Resistors . . . . . . . . . . . . 9.4 Surface Mount Devices . . . . . . . . . 9.5 Switches . . . . . . . . . . . . . . . . . 9.6 Voice Coil Loud-speakers Driver . . . 9.6.1 Off the shelf Audio Amplifiers 9.7 Microphones . . . . . . . . . . . . . . . 9.8 Phototransistors . . . . . . . . . . . . . 9.9 Photodiodes . . . . . . . . . . . . . . . 9.9.1 Photovoltaic Mode . . . . . . . 9.9.2 Photocurrent Mode . . . . . . 9.10 Ultrasonic Transceivers . . . . . . . . . 9.11 Velocity Sensors . . . . . . . . . . . . . 9.12 Position Sensors . . . . . . . . . . . . . A Decibels A.1 Definition of Bel and Decibel . . . . A.2 Generalization of the Use of Decibel A.3 Useful Table and Properties . . . . . A.4 Standard Power References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 177 177 178 179 179 180 181 182 182 184 185 187 188 188 188 189 . . . . 193 193 194 194 195 B Resistor Color Code 197 C The Cathode Ray Tube Oscilloscope C.1 The Cathode Ray Tube Oscilloscope . . . C.1.1 The Cathode Ray Tube . . . . . . . C.1.2 The Horizontal and Vertical Inputs C.1.3 The Time base Generator . . . . . C.1.4 The Trigger . . . . . . . . . . . . . C.2 Oscilloscope Input Impedance . . . . . . . C.3 Oscilloscope Probe . . . . . . . . . . . . . C.3.1 Probe Frequency Compensation . C.4 Beam Trajectory . . . . . . . . . . . . . . . C.4.1 CRT Frequency Limit . . . . . . . . 199 199 200 200 200 202 203 204 205 208 209 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . DR AF T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . CONTENTS 9 D Electromagnetic Field Noise D.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . D.2 The Faraday Cage . . . . . . . . . . . . . . . . . . . . . . . . . D.3 Practical Considerations . . . . . . . . . . . . . . . . . . . . . 211 211 211 212 E Common Emitter BJT Amplifier E.1 Amplifier Design . . . . . . . E.2 Resume . . . . . . . . . . . . . E.3 Example . . . . . . . . . . . . E.4 Amplifier Gain and Sign . . . E.5 Input and Output Impedance E.6 I/O Coupling Capacitors . . . E.7 Emitter Bypass Capacitor . . 213 214 215 215 216 216 217 218 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . DR AF T F Push-Pull BJT Amplifier 219 F.1 Push-Pull BJT Configuration . . . . . . . . . . . . . . . . . . . 220 F.2 Dissipation and Efficiency . . . . . . . . . . . . . . . . . . . . 221 F.3 Distortion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 222 CONTENTS DR AF T 10 Chapter 1 Alternating Current Network Theory 11 DR AF T In this chapter we will study the properties of electronic networks propagating sinusoidal voltages and currents (alternate current/AC regime). In other words, voltage or current sources connected to the networks produce electromagnetic waves whose frequency can be ideally changed from 0 to ∞. Considering an electromagnetic wave whose frequency f is 1MHz, ( typical maximum frequency f used in this course of analog electronics) and the electromagnetic field propagates at a speed c = 3 · 108 m/s (1’/ns), the wavelength λ = c/ f will be usually much greater than several hundred feet, hundreds to thousands of times greater than the physical sizes of our electronic circuits. Consequently, each individual circuit component will have at any instant, to a high degree of accuracy, zero net total current flowing in or out of all its connections and components. Such components are known as a lumped elements. When fields wavelength becomes comparable to the size of the circuit components, fields and currents can vary across the element, making it a distributed element. Examples of distributed elements include antennas, microwave waveguides, and the electrical power distribution grid. For two-terminal lumped elements, we can conclude that at any instant, the current flowing out of one terminal must equal the current flowing into the other, so we can simply refer to the current flowing through the element and the potential difference (voltage difference or voltage drop) between the two terminals. CHAPTER 1. ALTERNATING CURRENT NETWORK THEORY 12 In general, if we have a sinusoidal signal (sinusoidal voltages, or currents) applied to a circuit having at least one input and one output, we will expect a change in the amplitude and phase at the output. The determination of these quantities for quite simple circuits can be very complex. It is indeed important to develop a convenient representation of sinusoidal signals to simplify the analysis of circuits in this AC regime. The AC analysis of such circuits is valid once the network is at the steady state, i.e. when the transient behavior (such as those ones produced by closing or opening switches) is extinguished. 1.1 Symbolic Representation of a Sinusoidal Signals, Phasors A sinusoidal quantity (a sinusoidal current or voltage for example) , A(t) = A0 sin(ωt + ϕ), or ~ = x + jy, A AF T is univocally characterized by the amplitude A0 , the angular frequency ω, and the initial phase ϕ. The phase ϕ corresponds to a given time shift t∗ of the sinusoid (ωt∗ = ϕ ⇒ t∗ = ϕ/ω ). ~ in the complex We can indeed associate to A(t) an applied vector A plane with modulus | A| = A0 ≥ 0, rotating counter-clockwise around the origin O with angular frequency ω and initial angle ϕ (see figure 1.1). Such vectors are called phasors. The complex representation of the phasor is1 √ ~ = A0 e j(ωt+ ϕ), A j = −1, x = A0 cos(ωt + ϕ) y = A0 sin(ωt + ϕ) 1 To DR Extracting the real and the imaginary part of the phasor, we can easily compute its amplitude A0 and phase ϕ, i.e. ! q ~] ℑ[ A ~ ]2 + ℑ[ A ~ ]2 ϕ = arg [ A] = arctan | A| = ℜ[ A ( t = 0 ), ~] ℜ[ A avoid confusion with the electric current symbol i, it is convenient to use the symbol j for the imaginary unit. 1.1. SYMBOLIC REPRESENTATION OF A SINUSOIDAL SIGNALS, PHASORS13 A A0 A(t) jy ϕ+ω t A(t) 0 t A(0) ϕ t*=ϕ/ω 0 x T= 2π/ω ~ at the Figure 1.1: Sinusoidal quantityA(t) and its phasor representation A initial time t = 0 and at time t. and reconstruct the real sinusoidal quantity. It is worth noting that in general, amplitude A0 and phase ϕ are functions of the frequency. The convenience of this representation will be evident, once we consider the operation of derivation and integration of a phasor. 1.1.1 Derivative of a Phasor ~ we get Computing the derivative of a phasor A, ~ dA ~ = jωA0 e j(ωt+ ϕ) = jω A, dt 1.1.2 Integral of a Phasor ~ is The integral of a phasor A Z t t0 AF T i.e. the derivative of a phasor is equal to the phasor times jω. i h ~ ′ = 1 A0 e j(ωt+ ϕ) − A0 e j(ωt0+ ϕ) = 1 A ~ + const., Adt jω jω DR i.e. the integral of a phasor is equal to the phasor divided by jω plus a constant. For the AC regime we can assume the constant to be equal to zero without loss of generality. 14 CHAPTER 1. ALTERNATING CURRENT NETWORK THEORY Figure 1.2: Generic representation of a network 1.2 Network Definitions DR AF T To make easier the understanding of network basic theorems, some more or less intuitive definitions must be stated. An electronic network or circuit is a set of electronic components/devices connected together to modify and transmit/transfer energy/information. This information is generally called an electric signal or simply a signal. To graphically represent a network, we use a set of coded symbols with terminals for the network lumped elements and lines for connections. These lines propagate the signal among the elements without changing it. The elements change the propagation of the electric signals. A network node is a point where more than two network lines connect. A network loop, or mesh, is any closed network line. To determine a mesh it is sufficient to start from any point of the circuit and come back running trough the network to the same point without passing through the same point. Quantities defining signal propagation are voltages V across the elements and currents I flowing through them. Solving an electronic network means determining the currents or the voltages of each point of it. Figure 1.2 shows a generic portion of a network with 4 visible nodes, and 3 visible meshes. The empty boxes are the electronic elements of the 1.2. NETWORK DEFINITIONS 15 network and their size is just for convenience and don’t correspond to any physical dimensions. These are the points in the network where voltages and currents are modified. 1.2.1 Series and Parallel Let’s consider the two different connection topologies shown in figure 1.3, the parallel and the series connections. A set of components is said to be in series if the current flowing through them and anywhere in the circuit is the same . A set of components is said to be in parallel if the voltage difference between them is the same. A A B B Figure 1.3: Considering the points A, and B, the components of the left circuit 1.2.2 Active and Passive Components AF T are in parallel, and those in the right circuit are in series. DR Circuit components can be divided into two categories: active and passive components. Active components are those devices that feed energy into the network. Voltage and current sources are active components. Amplifiers are also active components. Passive components are those components, that do not feed energy to the network. Resistors, capacitors, inductors are typical passive components. In general, both active and passive components dissipate energy. 16 CHAPTER 1. ALTERNATING CURRENT NETWORK THEORY 1.3 Kirchhoff’s Laws Kirchhoff’s laws, are fundamental for the solution of an electronic circuit. They can be derived from Maxwell’s equations in the approximation of slowly varying field. Kirchhoff’s Voltage Law (KVL): The algebraic sum of the voltage difference vk at the time t around a loop must be equal to zero at all times, i.e. ∑ vk (t) = 0 k Kirchhoff’s Current Law(KCL): The algebraic sum of the currents ik at the time t entering and leaving a node must be equal to zero at all times, i.e. ∑ ik (t) = 0. k These laws hold for phasors as well. 1.4 Passive Ideal Components with Phasors Let’s rewrite the I-V characteristic for the passive ideal components using the phasor notation. For sake of simplicity, we remove the arrow above the phasor symbol. To avoid ambiguity, we will use upper case letters to indicate phasors, and lower case letters to indicate a generic time dependent signal. 1.4.1 The Resistor v(t) = Ri (t). jω AF T For time dependent signals, Ohm’s law for a resistor with resistance R is t=0 R V I V DR I 1.4. PASSIVE IDEAL COMPONENTS WITH PHASORS 17 Introducing the phasor I = I0 e jωt (see figure above), we get v(t) = RI0 e jωt , and in the phasor notation V = R I. The frequency and time dependence are implicitly contained in the phasor current I. 1.4.2 The Capacitor The variation of the voltage difference dv across a capacitor with capacitance C due to the amount of charge dQ, is dv = dQ . C If the variation happens in a time dt and i (t) = dQ , dt we will have ⇒ 1 v(t) = C Z t 0 i (t′ )dt′ + v(0). jω t=0 I C V I DR V AF T dv(t) 1 = i ( t ), dt C For sinusoidal time dependence , we introduce the phasor I = I0 e jωt (see figure above), and get 18 CHAPTER 1. ALTERNATING CURRENT NETWORK THEORY 1 t jωt′ ′ v(t) = I0 e dt + v(0), C 0 Using the phasor notation and supposing that for t = 0 the capacitor is discharged, we finally get Z V= 1 I, jωC , v(0) = 0. 1.4.3 The Inductor The induced voltage v(t) of an inductor with inductance L, is v(t) = L di (t) . dt jω V I L t=0 I V Introducing the phasor I = I0 e jωt (see figure above), we get v(t) = L d I0 e jωt , dt V = jωL I. AF T and in the phasor notation 1.5 The Impedance and Admittance Concept Z (ω ) = DR Let’s consider a generic circuit with a port, whose voltage difference and current are respectively the phasors V = V0 e j(ωt+ ϕ), and I = I0 e j(ωt+ψ). The ratio Z between the voltage difference and the current V V = 0 e j( ϕ−ψ) . I I0 1.5. THE IMPEDANCE AND ADMITTANCE CONCEPT 19 is said to be the impedance of the circuit. The inverse 1 Y (ω ) = Z (ω ) is called the admittance of the circuit. For example, considering the results of the previous subsection, the impedance of a resistor, a capacitor, and an inductor are respectively ZR = R, ZC (ω ) = 1 , jωC ZL (ω ) = jωL, and the admittances are YR = 1 , R YC (ω ) = jωC, YL (ω ) = 1 . jωL In general, the impedance or admittance of a circuit port is a complex function, which depends on the angular frequency ω. Quite often, they are graphically represented by plotting the magnitude| Z(ω )| or |Y (ω )| in a double logarithmic scale and the phase arg [ Z(ω )] or arg [Y (ω )] in a logarithmic scale. For completeness, letŽs introduce some other definitions: • The real part R of the impedance Z(ω ) is called resistance. • The imaginary part X of the impedance Z(ω ) is called reactance. If X > 0, then X is an inductive reactance (from the fact that the reactance of an inductor is ωL ≥ 0). If X < 0 then X is a capacitive reactance ( the reactance of an capacitor is −1/ωC ≤ 0). AF T • The real part G of the admittance Y (ω ) is called conductance. • The imaginary B part of the admittance Y (ω ) is called susceptance. If B < 0, then is B an inductive susceptance. If B > 0 then B is a capacitive susceptance. 1.5.1 Impedance in Parallel and Series Ztot = Z1 + Z2 + ... + ZN , DR It can be easily demonstrated that the same laws for the total resistance of a series or a parallel of resistors hold for the impedance (impedances in series) 20 CHAPTER 1. ALTERNATING CURRENT NETWORK THEORY 1 1 1 1 = + + ... + , Ztot Z1 Z1 ZN (impedances in parallel) It is left as exercise to derive the homologue laws for the admittance. 1.5.2 Ohm’s Law for Sinusoidal Regime Thanks to the impedance concept, we can generalize Ohm’s law and write the fundamental equation (Ohm’s law for sinusoidal regime) V ( ω ) = Z ( ω ) I ( ω ). 1.6 Two-Port Networks + A Io Ii H(ω) Port 1 Vi Ii − C + Vo Port 2 Io B D − Figure 1.4: Two-port network circuit representation. The voltage difference signs and current directions follow standard conventions. DR AF T A terminal port is a terminal pair of a linear circuit whose input current equals the output current. A linear circuit with one pair of input terminals A, B and one pair output terminals C, D is called two-port network (see figure 1.4). The electronic circuits we will consider here, are two-port network with terminals B and C connected together[2]. In this case, to characterize the behavior of a two-port network, we can study the response of the output Vo as a function of the angular frequency ω of a sinusoidal input Vi . In general, we can write Vo (ω ) = H (ω )Vi (ω ), or H (ω ) = Vo (ω ) , Vi (ω ) 1.6. TWO-PORT NETWORKS 21 where the complex function H (ω ) is called the transfer function or frequency response of the two-port network. The transfer function contains the information of how the amplitude and the phase of the input changes when it reaches the output. Knowing the transfer function of this particular twoport network, we characterize the circuit2 . The definition of H (ω ) suggests a way of measuring the transfer function. In fact, exciting the input with a sinusoidal wave, we can measure at the output the amplitude and the phase lead or lag respect to the input signal. 1.6.1 Bode Diagrams To graphically represent H (ω ), it is common practice to plot the magnitude | H (ω )| (gain) in a double logarithmic scale, and the phase arg [ H (ω )] using a logarithmic scale for the angular frequency. These plots are called Bode diagrams. Units for ω are normally rad/s or Hz. The magnitude is quite often expressed in decibels dB (see appendix A) XdB = 20 log10 X 2A AF T For example 20dB = 10, 40dB=100, etc... Practically, plotting a quantity in dB (which is not a units symbol such as m,s,kg, Ω ) corresponds to plot the quantity on a logarithmic scale. The phase can be expressed in radians (rad) or in degrees (deg). Logarithmic scales have the advantage of emphasizing asymptotic trends and the disadvantage of flattening small variations. In other words, variations much smaller that the range of the plotted values become quite often indistinguishable in a logarithmic scale. To find out such kind of behavior, it is a good practice to look at magnitudes in both linear and logarithmic plots. The Asymptotic Bode diagram [1], a simplification of the frequency response of a system is a convenient approximation of the characteristics of H (ω ). DR thorough understanding of the transfer function of a circuit requires the concept of the Fourier transform and the Laplace transform and the convolution theorem. See [2] appendix C CHAPTER 1. ALTERNATING CURRENT NETWORK THEORY 22 I R Vin I Vout C Figure 1.5: RC low-pass filter circuit. 1.6.2 The RC Low-Pass Filter Figure 1.5 shows the RC low-pass filter circuit. The input and output voltage differences are respectively3 1 Vin = Zin I = R + I, jωC 1 I, Vout = Zout I = jωC and the transfer function is indeed H (ω ) = Vout 1 , = Vin 1 + jτω or H (ω ) = 1 , 1 + jω/ω0 τ = RC. ω0 = 1 . RC | H (ω )| = √ 1 AF T Computing the magnitude and phase of H (ω ), we obtain 2 1 + τ2ω arg( H (ω )) = − arctan ω ω0 3V out DR Figure 1.6 shows the magnitude and phase of H (ω ). The parameter τ and ω0 are called respectively the time constant and angular cut-off frequency as function of Vin can be directly calculated using the voltage divider equation. 1.6. TWO-PORT NETWORKS 23 0 Magnitude (abs) 10 −1 10 Phase (deg) 0 −45 −90 8 10 9 10 Frequency (rad/sec) 10 10 Figure 1.6: RC low-pass filter circuit transfer function. of the circuit. The cut-off frequency is the frequency where the output Vout √ is attenuated by a factor 1/ 2. AF T It is worthwhile to analyze the qualitative behavior of the capacitor voltage difference Vout at very low frequency and at very high frequency. For very low frequency the capacitor is an open circuit and Vout is essentially equal to Vin . For high frequency the capacitor acts like a short circuit and Vout goes to zero. DR The capacitor produces also a delay as shown in the phase plot. At very low frequency the Vout follows Vin (they have the same phase). The output Vout loses phase (ωt = ϕ ⇒ t = ϕ/ω) when the frequency increases. The output Vout starts lagging due to the negative phase ϕ, and then approaches a maximum delay at a phase shift of −π/2. 24 CHAPTER 1. ALTERNATING CURRENT NETWORK THEORY I C Vin I R Vout Figure 1.7: RC high-pass filter circuit 1.6.3 The RC High-Pass Filter Figure 1.7 shows the RC high-pass filter circuit. The input and the output voltage differences are respectively Vin Vout 1 = Zin I = R+ jωC = Zout I = RI, I, and indeed the transfer function is H (ω ) = Vout jωτ = , Vin 1 + jτω τ = RC. or jω/ω0 , 1 + jω/ω0 ω0 = 1 . RC AF T H (ω ) = Computing the magnitude and phase of H (ω ), we obtain τω , 1 + τ 2 ω2 ω 0 arg( H (ω )) = arctan ω DR | H (ω )| = √ Figure 1.8 shows the magnitude and phase of H (ω ). The definitions in the previous subsection, for τ and ω0 , hold for the RC high-pass filter. 1.7. IDEAL SOURCES 25 0 Magnitude (abs) 10 Phase (deg) 90 45 0 0 10 1 10 Frequency (rad/sec) 2 10 Figure 1.8: RC high-pass filter circuit transfer function. 1.7 Ideal Sources 1.7.1 Ideal Voltage Source DR AF T An ideal voltage source is a source able to deliver a given voltage difference Vs between its leads independent of the load R attached to it (see figure 1.9). It follows from Ohm’s law that a voltage source is able to produce the current I necessary to keep constant the voltage difference Vs across the load R. The symbol for the ideal voltage source is shown in figure 1.9. Quite often, a real voltage source exhibits a linear dependence on the resistive load R. It can be represented using an ideal voltage source Vs in series with a resistor Rs called input resistance of the source. Applying Ohm’s law, it can be easily shown that the voltage and current through the load R are R Vs V= Vs , I= . R + Rs R + Rs 26 CHAPTER 1. ALTERNATING CURRENT NETWORK THEORY If we assume R ≫ Rs , V ≃ Vs , ⇒ I≃ Vs . R Under the previous condition, the real voltage source approximates the ideal case. V + I Vs R V Vs − I Figure 1.9: Ideal voltage source. 1.7.2 Ideal Current Source I= Rs Is , R + Rs V= If we suppose ⇒ I ≃ Is , Rs R Is . Rs + R V ≃ RIs ≫ 0 DR Rs ≫ R, AF T An ideal current source is a source able to deliver a given current Is that does not depend on the load R attached to it (see figure 1.10). It follows from Ohm’s law that an ideal current source is able to produce the voltage difference V across the load R needed to keep Is constant. The symbol for the ideal current source is shown in figure 1.10. A real current source exhibits a dependence on the resistive load R, which can be represented using an ideal current source Is in parallel with a resistor Rs . Applying Ohm’s law and the KCL, it can be easily shown that the voltage and current through the load R are Under the previous condition, the real current source approximates the ideal case. 1.8. EQUIVALENT NETWORKS 27 V Is I R V Vs Is I Figure 1.10: Ideal current source. 1.8 Equivalent Networks Quite often, the analysis of a network becomes easier by replacing part of it with an equivalent and simpler network or dividing it into simpler sub-networks. For example, the voltage divider is an equation easy to remember that allows to divide a complex circuit in two parts simplifying the search of the solution. Thévenin and Norton theorems give us two methods to calculate equivalent circuits which behave like the original circuit, as seen from two points of it. The techniques briefly explained in this section, will be then extensively used in the next chapters . 1.8.1 Voltage Divider VTot = (Z1 + Z2 ) I V2 = Z2 I V2 = Z2 VTot , Z1 + Z2 which is the voltage divider equation. DR and indeed AF T The voltage divider equation is applicable every time we have a circuit which can be re-conducted to a series of two simple or complex components. Considering the circuit branch of figure 1.11 and applying Ohm’s law, we have 28 CHAPTER 1. ALTERNATING CURRENT NETWORK THEORY VTot Z1 I V2 Z2 Figure 1.11: Voltage divider circuit. 1.8.2 Thévenin Theorem Thévenin theorem allows us to find an equivalent circuit for a network seen from two points A and B using an ideal voltage source VTh in series with an impedance ZTh . ZTh + Black Box VTh ZL ZL − AF T Figure 1.12: Thévenin equivalent circuit illustration. DR The equivalence means that if we place a load ZL between A and B in the original circuit (see figure 1.12) and measure the voltage VL and the current IL across the load, we will obtain exactly the same VL and IL if ZL is placed in the equivalent circuit. This must be true for any load we connect between the points A and B . The previous statement and the linearity of the circuit can be used to find VTh and ZTh . In fact, if we consider ZL = ∞ (open circuit, OC), we will have VTh = VOC . 1.8. EQUIVALENT NETWORKS 29 The Voltage VTh is just the voltage difference between the two leads A and B. For ZL = 0 (short circuit, SC) we must have ISC = VTh V = OC . ZTh ZTh and therefore VOC . ISC The last expression says that the Thévenin impedance is the impedance seen from the points A and B of the original circuit. If the circuit is known, the Thévenin parameter can be calculated in the case for the terminals A and B open. In fact, VTh is just the voltage across A and B of a known circuit. Replacing the ideal voltage sources with short circuits (their resistance is zero) and ideal current sources with open circuits ( their resistance is infinite), we can calculate the impedance ZTh seen from terminals A and B. Considering the previous results, we can finally state Thévenin theorem as follows: Any circuit seen from two points can be replaced by an ideal voltage source of voltage VTh in series with impedance ZTh . VTh is the voltage difference between the two point of the original circuit. ZTh is the impedance seen from these two points, short-circuiting all the ideal voltage generators and open-circuiting all the ideal current generators. ZTh = Example: VTh = R1 Vs . R1 + R2 AF T We want to find the Thévenin circuit of the network enclosed in the gray rectangle of figure 1.13. To find RTh , and VTh we have to disconnect the circuit in the points A and B. In this case, the voltage difference between these two points, thanks to the voltage divider equation, is RTh = DR Short circuiting Vs we will have R1 in parallel with R2 . The Thévenin resistance RTh will be indeed R1 R2 . R1 + R2 30 CHAPTER 1. ALTERNATING CURRENT NETWORK THEORY R2 A + R Th R0 Vs − + R1 V0 A R0 + + V0 VTh − − − B B Figure 1.13: Thévenin equivalent circuit example Black Box ZL I No ZNo ZL Figure 1.14: Norton equivalent circuit illustration. 1.8.3 Norton Theorem DR AF T Any kind of active network seen from two points A and B can by replaced by an ideal current generator INo in parallel with a impedance ZNo . The current INo corresponds to the short-circuit current of the two points A and B. The Resistance ZNo is the Thévenin resistance ZNo = ZTh . The proof of this theorem is left as exercise. 1.9. FIRST LABORATORY WEEK 31 1.9 First Laboratory Week This first laboratory class is essentially intended to help the student to become acquainted with the laboratory instrumentation (function generator, digital multimeter, circuit bread board, connectors), and with the use of passive components and their mathematical descriptions. 1.9.1 Pre-laboratory Problems To complete the preparatory problems, it is recommended to read sections 1.1 to 1.6, and appendix C for the laboratory procedure. CH1 CH2 AF T CH2 CH1 DR Vertical Sensitivity [50 mV/div], 1div = distance between thick lines 1. Considering the figure below (a “snapshot” of an oscilloscope display), determine the peak to peak amplitude, the DC offset, the frequency of the two sinusoidal curves, and the phase shift between the two curves (channels horizontal axis position is indicated by an arrow and the channel name on the right of the figure). Horizontal Sensitivity [1 ms/div], 1div= distance between thick lines CHAPTER 1. ALTERNATING CURRENT NETWORK THEORY 1. Sketch in a graph the magnitude and phase of the RC series circuit input impedance Zi . Determine the two asymptotic behavior of | Zi | ,i.e. where the resistive and the capacitive behavior dominate. 2. Assuming that R2 ≫ R1 , repeat the previous problem for the following circuit I R1 Vi C R2 Vo Hint: in this case there are three dominant behaviors, two resistive and one capacitive, and two frequencies which separate the three dominant behaviors. 3. The circuit below includes the impedance of the input channel of the CRT oscilloscope, and Vs is indeed the real voltage measured by the instrument. I R Vin C VC Cs Rs Vs Oscilloscope Input Stage C ≫ Cs , AF T Find the voltage Vs (ω ) , and the angular cut-off frequency ω0 of the transfer function Vs /Vin ( i.e. the value of ω for which |Vs /Vin | = √ 1/ 2). Show that for ω = 0 the Vs (ω ) formula simplifies and becomes the resistive voltage divider equation. Demonstrate that the conditions to neglect the input impedance of the oscilloscope are the following : R ≪ Rs DR 32 (Hint: use the voltage divider equation to write VC .) 1.9. FIRST LABORATORY WEEK 33 4. Considering the previous circuit, calculate the value of R needed to obtain Vin ≃ Vs with a fractional systematic error of 1%, if ω = 0rad/s and Rs = 1MΩ. 5. Determine the values of R, and C needed to get a RC series circuit cut-off frequency of 20kHz. Choose values which make the oscilloscope impedance negligible (Rs = 1MΩ, Cs = 25pF). 1.9.2 Procedure Whenever you work with electronic circuits as a beginner (all students are considered beginners; it doesn’t matter which personal skills they already have), some extra precautions must be taken to avoid injuries. These are the main ones: • N EVER CONNECT INSTRUMENT PROBES OR LEADS TO AN OUTLET OR MORE IN GENERAL TO THE POWER LINE . • DO NOT TRY TO FIX / IMPROVE AN INSTRUMENT BY YOURSELF. • DO NOT POWER AN INSTRUMENT WHICH IS NOT WORKING OR DIS - ASSEMBLED . • D O NOT TOUCH A DISASSEMBLED OR PARTIALLY DISASSEMBLED IN - STRUMENT, EVEN IF IT IS NOT POWERED . • TO PROTECTIVE GOGGLES EVERY TIME YOU USE A SOLDERING AF T • W EAR IRON . AVOID EXPLOSIONS , NEVER USE A SOLDERING IRON ON A POW- ERED CIRCUIT AND BATTERIES . • P LACE WORK . A FAN TO DISPERSE SOLDER VAPORS DURING SOLDERING DR Read carefully the text before starting the laboratory measurements. BNC cables and wires terminated with banana connectors are available to connect the circuit under measurement to the instruments. 34 CHAPTER 1. ALTERNATING CURRENT NETWORK THEORY BNC4 cables, a diffused type of radio frequency (RF) coaxial shielded cable, have an intrinsic and quite well defined capacitance due to their geometry as shown in the figure below A C A C C0 B D B D They have typical linear density capacitance ∆C/∆l ≃= 98pF/m. Wires terminated with banana connectors have smaller capacitance than BNC cables but not as constant as BNC cables (Why?). 1. Build a RC low-pass or a RC high-pass filter with a cut-off frequency between 10kHz to 100kHz. Choose components values which make the perturbation of the input impedance of the oscilloscope negligible. Then, do the following (a) Verify the circuit transfer function, and in particular for frequencies ν ≪ ν0 and ν ≫ ν0 (b) Find the cut-off frequency νo knowing the expected magnitude and phase values, and compare with the theoretical values (c) Change the capacitor value to be comparable to the oscilloscope input capacitance or the BNC cable capacitance and experimentally find the new cut-off frequency ν1 . Compare with the theoretical value. AF T (d) Drive the circuit input with a square wave and verify the transient response of the circuit. 2. Measure the output impedance of the function generator for a given fixed sinusoidal frequency. Place at least three different loads to perform the measurement. 4 “BNC” DR seems to stand for Bayonet Neill Concelman (named after Amphenol engineer Carl Concelman). Other sources claims that the acronym means British Navy Connector. What is certain is that the BNC connector was developed in the late 1940’s as a miniature version of the type C connector (what does the “C” stand for ?) Bibliography [1] Ref for Maxwell equations versus Kirchhoff’s laws. 35 DR AF T [2] Microelectronics, Jacob Millman, and Arvin Grabel , Mac-Graw Hill BIBLIOGRAPHY DR AF T 36 Chapter 2 Resonant Circuits 2.1 Introduction Resonators, one of the most useful and used device, are essentially physical systems that present a more or less pronounced peak in their transfer function. In general, their performance is measured by a dimensionless parameter named quality factor Q, which characterizes the sharpness of the resonant peak. The higher the quality factor the sharper is the peak and the better is the resonator. AF T Quite often, the major issues of building a resonator are to obtain very high quality factors and good stability. For example, mechanical oscillators made of fused silica fibers under load, can achieve quality factors above 108 in the acoustic band[?]. Very high quality factors in electronics can be achieved using the mechanical resonances of piezoelectric materials such as quartz. Lasers and resonant cavities made of mirrors can be used to build resonators in the optical frequency range. The same principle can be applied in the microwave range. Thermal stabilization is always a key ingredient to obtain high stability. 37 DR Resonators made with electronic passive components, reaching quality factors values up to 10-100 or more, are quite easy to realize. In the next sections we will study two typical resonant circuits, the LCR series and LCR parallel circuits. CHAPTER 2. RESONANT CIRCUITS 38 Vi R VR L VL C VC Figure 2.1: LCR series circuit. 2.2 The LCR Series Resonant Circuit Figure 2.1 shows the so called LCR series resonant circuit. Depending on voltage difference, we are considering as the circuit output ( the capacitor, the resistor, or the inductor), this circuit shows a different behavior. Let’s study in the frequency and in the time domain the response of this passive circuit for each one of the possible outputs. 2.2.1 Frequency Response with Capacitor Voltage Difference as Circuit Output HC ( ω ) = 1 . jωRC − ω2 LC + 1 DR and the transfer function will be AF T Considering the voltage difference VC across the capacitor to be the circuit output, we will have 1 Vin = R + jωL + I, jωC 1 I, VC = jωC 2.2. THE LCR SERIES RESONANT CIRCUIT 39 For sake of simplicity, it is convenient to define the two following quantities r 1 L L 1 2 , Q= = ω0 ω0 = LC R C R The parameter Q is the quality factor of the circuit, and the angular frequency ω0 is the resonant frequency of the circuit if R = 0. Considering the previous definitions, and after some algebra, HC (ω ) becomes ω02 HC ( ω ) = 2 . ω0 − ω2 + jω ωQ0 (2.1) Computing the magnitude and phase of HC (ω ), we obtain | HC (ω )| = r ω02 ω02 2 − ω2 arg [ HC (ω )] = − arctan + ω ωQ0 1 ω0 ω Q ω02 − ω2 2 , ! . The magnitude has maximum for 1 2 2 ω C = ω0 1 − , 2Q2 and the maximum is | HC (ωC )| = q Q 1− 1 4Q2 . AF T If Q ≫ 1 then ωC ≃ ω0 , and | HC (ωC )| ≃ Q. Far from resonance ωC , the approximate behavior of | HC (ω )| is ⇒ DR | HC (ω )| ≃ 1 , ω2 ω ≫ ωC ⇒ | HC (ω )| ≃ 02 . ω Figure 2.2 shows the magnitude and phase of HC (ω ). In this case, the circuit is a low pass filter of the second order because of the asymptotic slope 1/ω2 . ω ≪ ωC CHAPTER 2. RESONANT CIRCUITS 40 Bode Diagram 20 Magnitude (dB) 10 0 −10 −20 −30 −40 0 Phase (deg) −45 −90 −135 −180 4 10 5 6 10 Frequency (rad/sec) 10 Figure 2.2: Transfer function HC (ω ) of the LCR series resonant circuit with a resonant angular frequency ωC ≃ 10.7krad/s. 2.2.2 Frequency Response with Inductor Voltage Difference as Circuit Output H L (ω ) = − AF T Let’s considering now the voltage difference VL across the inductor as the circuit output. In this case, we have ω2 LC . jωRC − ω2 LC + 1 Using the definition of Q, and ω0 and after some algebra, HL (ω ) becomes −ω2 ω02 − ω2 + jω ωQ0 DR H L (ω ) = (2.2) 2.2. THE LCR SERIES RESONANT CIRCUIT 41 Computing the magnitude and phase of HL (ω ), we obtain | HL (ω )| = r ω2 2 2 + ω ωQ0 ! 1 ωω0 Q ω02 − ω2 ω02 − ω2 arg [ HL (ω )] = arctan The magnitude has a maximum for ω2L = ω02 1 , 1 1 − 2Q 2 and the maximum is | HL (ω L )| = q Q 1− 1 4Q2 . Again, if Q ≫ 1 then ω L ≃ ω0 , and | HL (ω L )| ≃ Q. Far from resonance ω L , the approximate behavior of | HL (ω )| is ω ≪ ωL ⇒ ω ≫ ωL ⇒ ω2 | HL (ω )| ≃ 2 ω0 | HL (ω )| ≃ 1 AF T Figure 2.3 shows the magnitude and phase of HL (ω ). In this case the circuit is a second order high pass filter. 2.2.3 Frequency Response with the Resistor Voltage Difference as Circuit Output DR Considering the voltage difference across the resistor as the circuit output, we will have jωRC HR (ω ) = . 1 − ω2 LC + jωRC Using the definition of Q and ω0 , and after some algebra, HR (ω ) becomes CHAPTER 2. RESONANT CIRCUITS 42 Bode Diagram 40 Magnitude (dB) 20 0 −20 −40 −60 180 Phase (deg) 135 90 45 0 4 10 5 6 10 Frequency (rad/sec) 10 Figure 2.3: Transfer function HL (ω ) of the LCR series resonant circuit with a resonant angular frequency ω L ≃ 10.7krad/s. ω02 − ω2 + jω ωQ0 . Computing the magnitude and phase of HR (ω ), we obtain | HR (ω )| = r ω0 Qω 2 + ω ωQ0 ! ω02 − ω2 arg [ HR (ω )] = arctan Q ωω0 2 DR ω02 − ω2 (2.3) AF T HR (ω ) = jω ωQ0 2.2. THE LCR SERIES RESONANT CIRCUIT 43 The magnitude has maximum for ω2R = ω02 , and the maximum is | HR (ωR )| = 1 . Far from the resonance ωR , the approximate behavior of | HR (ω )| is ω ≪ ωR ⇒ ω ≫ ωR ⇒ 1 ω Q ω0 ω0 | HR (ω )| ≃ ω | HR (ω )| ≃ Figure 2.4 shows the magnitude and phase of HR (ω ). In this case the circuit is a first order band pass filter. 2.2.4 Transient Response The equation that describes the LCR series circuit response in the time domain is Z di 1 t ′ ′ vi = Ri + L + i (t )dt , (2.4) dt C 0 AF T where i (t) is the current flowing through the circuit and vi (t) is the input voltage. Supposing that v0 , t > 0 , vi ( t ) = 0, t ≤ 0 and differentiating both side of eq. 2.4, we obtain the linear differential equation t>0 DR di d2 i 1 + L 2 + i = 0, dt C dt or, considering the definition of ω0 , and Q, R d2 i ω0 di + ω02 i = 0. + Q dt dt2 CHAPTER 2. RESONANT CIRCUITS 44 Bode Diagram 0 Magnitude (dB) −10 −20 −30 −40 −50 90 Phase (deg) 45 0 −45 −90 4 10 5 6 10 Frequency (rad/sec) 10 Figure 2.4: Transfer function HR (ω ) of the LCR series resonant circuit with resonant angular frequency ωR ≃ 10.7krad/s. The solutions of the characteristic polynomial equation associated with the differential equation are p 1 ω0 1 ± 1 − 4Q2 . 2 Q AF T λ1,2 = − As usual, we will have three different solutions depending on the discriminant value ∆ = 1 − 4Q2 . DR Under-damped Case: discriminant less than zero (Q > 1/2) In this case we have two complex conjugate roots and the differential equation solution is the typical exponential ring down 2.3. THE TANK CIRCUIT OR LCR PARALLEL CIRCUIT. i ( t ) = i0 e ω − 2Q0 t ωC2 sin (ωC t + ϕ0 ) , = ω02 1 1− 2Q2 45 . Critically Damped Case: Discriminant equal to zero(Q = 1/2) In this case we have a critically damped current and no oscillation ω0 i (t) = i0 e− 2Q t Over-damped Case: Discriminant greater than zero (Q < 1/2) This is the case of two coincident solutions . We will have indeed, an exponential decay (no oscillations) i ( t ) = i0 e ω − 2Q0 t Ae −ωC t + Be +ωC t , ωC2 = ω02 1 1− 2Q2 , Voltages across each single element can be easily computed considering the relation between v(t) and i (t). Let’s just write the voltage across the capacitor for the under-damped case. Considering that the integration operation in this case changes just the phase and creates an offset, the voltage across the capacitor, neglecting this offset, will be AF T ω0 vC (t) = v0 e− 2Q t sin (ωC t + ψ) . 2.3 The Tank Circuit or LCR Parallel Circuit. DR Figure 2.5 shows the so called LCR parallel resonant circuit or tank circuit, where the source depicted with an arrow inside a circle is an ideal current source. The resistor of resistance r accounts for inductor resistance. Let’s study the frequency and the transient response using the Thévenin representation shown in figure 2.6. CHAPTER 2. RESONANT CIRCUITS 46 L Is R C Vo r Figure 2.5: The tank circuit. 2.3.1 LCR Circuit Frequency Response Using Thévenin theorem for the current source and R, the LCR parallel circuit considering the equivalent circuit as shown in figure 2.6 where the current source and the resistor R have been replaced with the Thévenin circuit. Considering that the current I of the current source can be written as Vi , R I = Y Vo = we have Vi = R 1 1 + + jωC Vo , R r + jωL 1 1 + + jωC Vo R r + jωL Defining the following complex quantity as 1 r ∗ (ω ) + and 1 1 = , ∗ jωL (ω ) r + jωL R∗ = R || r ∗ , Vi = R 1 1 + + jωC Vo R∗ jωL∗ DR eq. 2.5 becomes (2.5) AF T I = (2.6) 2.3. THE TANK CIRCUIT OR LCR PARALLEL CIRCUIT. 47 R + L Vo C Vs − r Figure 2.6: The tank circuit with the current source and the resistance R replaced with the Thévenin equivalent circuit. After some algebra, we will have jωL∗ Vo R∗ . = ∗ Vi R − ω2 CL∗ R∗ + jωL∗ R (2.7) Generalizing the definition of ω0 , and Q ω0∗ = p 1 L∗ (ω )C Q ∗ = R∗ (ω ) , s C L∗ (ω ) , and substituting in eq. 2.7 we finally obtain jωω0∗ /Q∗ R∗ H (ω ) = (ω0∗ )2 − ω2 + jωω0∗ /Q∗ R ∗ " r (ω ) = r 1 + ωL r 2 # , r 2 ωL i. r 2 L (ω ) = L 1 + ωL DR and finally 1 1 1 i+ h = h 2 r + jωL r 1 + ωL jωL 1 + r AF T Let’s find the implicitly defined functions r ∗ , L∗ . Using the term containing the inductance L in eq. 2.6, we obtain ∗ CHAPTER 2. RESONANT CIRCUITS 48 Bode Diagram 0 Magnitude (dB) −20 −40 −60 −80 −100 90 Phase (deg) 45 0 −45 −90 1 10 2 10 3 10 4 10 Frequency (rad/sec) 5 6 10 10 7 10 Figure 2.7: Typical bode plot of a LCR parallel circuit with resonant angular frequency near the acoustic band. As expected , if r is not zero, then the magnitude doesn’t go to zero for ω = 0. 2.3.2 Transfer Function | H (ω )| = rh ωω0∗ Q∗ 2 ω0∗ i2 + ω2 − ω2 Q∗ 0 ωω0 | R∗ | ∗ 2 R ωω 0 Q∗ ) , DR arg( H (ω )) = arctan ( − ω2 AF T From the solution of the LCR parallel circuit we have whose bode plots are shown in figure 2.7. 2.3. THE TANK CIRCUIT OR LCR PARALLEL CIRCUIT. 49 2.3.3 Simplest Case If r = 0, then we will have much simpler expressions for the thank circuit formulas, i.e. r 1 C ω0 = √ , Q=R , L LC and H (ω ) = ω02 jωω0 /Q − ω2 + jωω0 /Q . The magnitude and the phase will be ωω0 Q | H (ω )| = r 2 2 , ω02 − ω2 + ) ( ω02 − ω2 . arg( H (ω )) = arctan Q ωω0 ωω0 Q 2.3.4 High Frequency Approximation For high frequency ω ≫ r/L, we have and ω0 becomes 2 , ⇒ L∗ ≃ L 1 ω0 ≃ √ . LC AF T L r (ω ) ≃ r ω r ∗ Evaluating the several defined quantities at ω0 , we will have DR L , rC LR R ∗ ( ω0 ) ≃ RCr + L r C LR Q ∗ ( ω0 ) ≃ RCr + L L r ∗ ( ω0 ) ≃ CHAPTER 2. RESONANT CIRCUITS 50 Step Response 0.04 0.03 Amplitude 0.02 0.01 0 −0.01 −0.02 −0.03 0 0.2 0.4 0.6 Time (sec) 0.8 1 1.2 −3 x 10 Figure 2.8: Typical step response of a LCR parallel circuit near the acoustic band. 2.3.5 LCR Parallel Circuit Transient Response γ= 1 , 2Q AF T Let’s briefly analyze the response to a step of the LCR parallel circuit for the under-damped case. If we define the following quantity DR called damping coefficient, and if 0 < γ < 1, then we will have at the circuit output 2γ −ω0 γt v ( t ) = v0 e cos γ−1 q 1 − γ2 ω0 t + ϕ 0 + v1 . 2.3. THE TANK CIRCUIT OR LCR PARALLEL CIRCUIT. 51 DR AF T p The voltage output v(t) is a damped sinusoid with angular frequency 1 − γ2 ω0 and time constant τ = 1/ω0 γ. The DC offset v1 depends on the inductor resistance r and the initial step. Figure 2.8, a typical step response of the LCR circuit shows a ring-down with a DC offset. 52 CHAPTER 2. RESONANT CIRCUITS 2.4 Laboratory Experiment Real inductors have not negligible resistance. To build a LCR series circuit with a highest quality factor it is indeed necessary to minimize the resistance of the circuit by mounting in series the inductor and the capacitor only. Typical effective resistance of the inductors used in the laboratory is about 10Ω to 80Ω at resonance . Because of the internal resistance of the function generator (the best scenario gives ∼ 50Ω) is then comparable at some frequencies to LCR load, we will expect that the approximation of ideal generator will be no longer valid. Moreover, harmonic distortion of the function generator will be quite evident in the LCR series circuit because of the dependence of the load on the frequency. An estimation of a ring-down time constant τ can be obtained as follows. From the ring-down equation we have that after a time t = τ the amplitude is reduced by a factor 1/3 (e ≃ 1/2.718). This means that we can easily estimate τ by just measuring the time needed to reduce the amplitude down to about 1/3 of its initial value. A similar but quite coarse way is to count how many periods n∗ the amplitude takes to decrease to 1/3 of its initial value. Then the estimation will be n∗ ∗ τ ≃ Tn = , νres where T, and νres are respectively the period and the frequency of the oscillation. Considering that Q = πνres τ then Q ≃ πn∗ . DR 2.4.1 Pre-laboratory Exercises AF T The quality factor can also be estimated from the frequency response considering that νres Q= , ∆ν where ∆ν is the Full Width at Half Maximum (FWHM) of the peak resonance. It is suggested to read the appendix about the electromagentic noise to complete the pre-lab problems and the laboratory procedure. 2.4. LABORATORY EXPERIMENT 53 1. Determine the capacitance C of a LCR series circuit necessary to have a resonant frequency νC = 20kHz if L = 10mH, and R = 10Ω. Then, calculate Q, τ, ν0 , (ω = 2πν) of the circuit. 2. Find the LCR series input impedance Zi and plot its magnitude in a logarithmic scale. Determine at what frequency is the minimum of | Zi | . 3. Supposing that the internal resistance of the function generator is Rs = 50Ω, and using the previous values for L, C, and R, calculate the circuit input voltage attenuation at the frequency of | Zi | minimum and at twice that frequency. 4. Determine the capacitance C of a tank circuit necessary to have a resonant frequency νC = 20 kHz if L = 10mH, R = 10kΩ, and r = 10Ω. Use the high frequency approximation. Then, calculate Q, τ, ν0 , of the circuit. 5. Estimate the time constant τ of the ring-down in figure 2.8. Supposing that R = 10kΩ, estimate r from figure 2.7. 6. Calculate the maximum frequency of the EM field isolated by a Faraday cage with a dimension d = 10mm (hint: consult the proper appendix). 2.4.2 Procedure AF T 1. Build a LCR series circuit with a resonant frequency of around 20kHz, using inductance, capacitance, and resistance values calculated in the pre-lab problems. Then, do the following steps: (a) Using the oscilloscope and knowing the expected magnitude and phase values at the resonant frequency νC , find νC and compare it with the theoretical value computed using the components measured values. DR (b) Verify the circuit transfer function HC (ν) using the data acquisition system and the proper software. (c) Estimate the quality factor Q of the circuit from the transfer function measurement and compare it with the theoretical value. CHAPTER 2. RESONANT CIRCUITS (d) Explain why the input voltage Vi changes in amplitude if we change frequency. (e) Considering the harmonic distortion of the function generator, explain why the frequency spectrum of the input signal changes quite drastically when we approach the resonance νC . (f) Download the simulation file from the ph5/105 website for the LCR series circuit, input the proper components values, run the AC response simulation, and find the discrepancies beteween your measurement and the simulation. (g) Modify the simulated circuit to qualitatively account for the eventual notch measured between 100 kHz and 1 MHz (hint: use the inductor model specified in the appendix considering the extra capacitor only). 2. Build a LCR parallel circuit with a resonant frequency around 20kHz, using inductance, capacitance, and resistance values calculated in the pre-lab problems. Then, do the following steps: (a) Using the oscilloscope and knowing the expected magnitude and phase values at the resonant frequency νC , find νC and compare it with the theoretical value computed using the components measured values. (b) Verify the circuit transfer function HC (ν) using the data acquisition system and the proper software. AF T (c) Estimate the quality factor Q of the circuit from the step response. (d) Download the simulation file from the ph5/105 website for the LCR parallel circuit, input the proper components values, run the AC response simulation, and find the discrepancies beteween your measurement and the simulation. (e) Modify the simulated circuit to qualitatively account for the eventual notch measured between 100 kHz and 1MHz (hint: use the capacitor model specified in the appendix considering the extra inductors only). DR 54 2.4. LABORATORY EXPERIMENT 55 3. Check the effect of the Faraday cage ( a metallic coffee can) using 10x probe connected to the oscilloscope. Add a 1m long wire to increase the antenna effect. Note the differences when the antenna is approached to the fluorescent lights, and when you touch the antenna. Keeping the cage in the same position and without touching the cage, explain what you observe and coarsely estimate the amplitude and frequency content of the picked-up signal in the following conditions: (a) Antenna outside the cage, (b) Antenna inside the cage, DR AF T (c) Antenna inside the cage with ground probe connected to the cage. AF T CHAPTER 2. RESONANT CIRCUITS DR 56 Chapter 3 The Operational Amplifier 3.1 Introduction Operational amplifiers are one of the most extensively used analog integrated circuits especially because of their ability to approximate reasonably well the ideal behavior. For this reason, real operational amplifiers can be quite often modeled as ideal or quasi-ideal. Moreover, the versatility this device, which hides a large internal complexity 1 , makes the operational amplifier suitable for many different applications. AF T In the first section, the mathematical formulation makes the ideal operational amplifier concept quite awkward, especially after a first reading. Using the ideal device properties in conjunction with the so called feedback network, which links the output of the amplifier inputs, will clarify the definition of the ideal operation amplifier. The subsequent section is dedicated to the explanation of some basic operational amplifier circuits. Finally, section 3.5 introduces a more realistic model of operational amplifier together with some of the particular behavior of this electronic device. 1A 57 DR modern operational amplifier made of a cascade of stages, each one designed mainly to match the ideal characteristics, can have around 50 components both active and passive. See the Analog Devices Web site, for example. CHAPTER 3. THE OPERATIONAL AMPLIFIER 58 3.2 The Ideal Operational Amplifier The ideal operational amplifier (Op-Amp) is a linear amplifier with two differential inputs v+ , v− and one output vo (see figure 3.1) and with the following characteristics: • v 0 = A v ( v + − v − ), Av > 0, (linearity) • input resistance Ri → ∞, • output resistance Ro → 0, • voltage gain Av → ∞, • frequency response constant for any frequency. Aside the welcome property of linearity and infinite frequency response, the need of all the other characteristics can be justified as follows. Infinite input resistance Ri means essentially that the Op-Amp inputs do not produce perturbations to any circuit to which they are connected to. Zero output resistance Ro perfectly isolates the Op-Amp from any perturbation. Infinite input impedance and zero output impedance implies also no dissipation of energy. The condition of infinite voltage gain Av is necessary if we want a device able to deliver any gain, once a network which connects the output to the input is added to the Op-Amp. In general, this kind of network is called feedback network. v− vi = v +− v− v+ − A >0 vo= Avv i vi = v +− v− + v+ AF T − + v− + − vo= Avv i DR Figure 3.1: Op-Amp symbol, some definitions of variables and ideal model with an voltage controlled source. 3.2. THE IDEAL OPERATIONAL AMPLIFIER 59 3.2.1 Ideal Op-Amp Fundamental Equation (Golden Rules) The consequence of the following conditions • Av → ∞, • vo < ∞ if vi = v+ − v− < ∞, is the following very useful and important formula v+ − v− = 0, at all times. i+ − i− = 0, at all times, (3.1) Equation 3.1 will be called the first Op-Amp golden rule. The consequence of the following condition is • Ri → ∞, (3.2) Equation 3.2 will be called the second Op-Amp golden rule. These two rules are fundamental for the solution of any circuit involving Op-Amps. We will see in the next sections the importance of this equations once a feedback network is connected to the Op-Amp. 3.2.2 Op-Amp Input Output “Logic” Rf R + Vs − I I − + Vo DR A AF T It is worthwhile here to notice the behavior of Op-Amp output as function of the two inputs. From the definition of Op-Amp we have that a signal sent to the negative input V− is amplified and changed in sign. A signal sent to the positive input V+ is just amplified. Two signals sent each to one input are indeed subtracted and amplified. Figure 3.2: Op-Amp with a feedback network. 60 CHAPTER 3. THE OPERATIONAL AMPLIFIER 3.2.3 Op-Amp with a Feedback Network Let’s consider the circuit in figure 3.2, where a feedback resistance R f is connected to the negative input. The current through the resistors R and R f is the same because the ideal Op-Amp input does not drive any current (Ri = ∞). Furthermore, since Vi = V+ − V− = 0 and with the use Ohm’s law and the KVL, it follows that I= Vs Vo =− . R Rf (3.3) The output voltage Vo and voltage gain A will be Vo = AVs , A=− Rf . R The gain of the Op-Amp depends just on the resistances ratio R f and R. 3.2.4 The Virtual Ground AF T Let’s re-analyze the circuit in figure 3.2. Considering that the golden rule imposes Vi = V+ − V− = 0, and the negative input is grounded, the node A must always be at zero voltage. This is equivalent to having A virtually grounded. The adjective virtual is necessary because even if A is at the potential of the ground there is no current flowing through A ( Ri = ∞) as in a real ground. In other words, the virtual ground happens to be because the Op-Amp does its best to keep Vi = 0. 3.3 Commonly Used Op-Amp Circuits DR In the study of the several common Op-Amp configurations, we will use the approximation of an ideal circuit. A more realistic model is often necessary to understand some behaviors of real circuits. For an initial design, and where the the ideal Op-Amp characteristics are well approximated, the ideal model is quite often sufficient. 3.3. COMMONLY USED OP-AMP CIRCUITS 61 Rf R − Vo + + Vs − Figure 3.3: Non-inverting configurations of the Op-Amp. 3.3.1 Non-Inverting Amplifier Let’s consider the non-inverting configuration of the Op-Amp in figure 3.3. Because of Vi = 0, we will have Vs − V− = Vs − RI = 0. Considering that the output voltage Vo is Vo = ( R f + R) I, Vs = R Vo . R + Rf The output voltage Vo and voltage gain A will be Vo = AVs , A = 1+ Rf . R AF T we can use the expression of I to obtain DR Considering that in this configuration Vs is directly connected to V+ and V− is not a virtual ground, the input impedance of the amplifier is Ri + R, where Ri is the real input impedance of the Op-Amp. CHAPTER 3. THE OPERATIONAL AMPLIFIER 62 3.3.2 Inverting Amplifier This circuit has been already discussed in section 3.2.3. For completeness, the solution and some comments are here reported Rf . R It is worthwhile to notice that because V− = 0, the circuit input impedance is just R. Having values of R typically of few kΩ, the inverting configuration doesn’t preserve the high impedance characteristic of an Op-Amp. A connection of the circuit input to a network can potentially create appreciable perturbations. Vo = AVs , A=− 3.3.3 Differential Input Stage Rf V2 I1 R1 V1 − I1 Vo + R2 R0 AF T Figure 3.4: Differential input configuration of the Op-Amp. Let’s now solve the differential input circuit of the Op-Amp in figure 3.4. Writing the voltage drop across R1 and R f , we obtain the linear system V− − V1 = R1 I, Vo − V− = R f I. DR Solving the system with respect to Vo , we get Rf Rf Vo = 1 + V− − V1 . R1 R1 3.3. COMMONLY USED OP-AMP CIRCUITS vi (t) − 63 vo (t) G + Figure 3.5: Voltage follower or unity gain buffer. Using the voltage divider equation to obtain V+ and because V+ − V− = 0, we have R0 V− = V+ = V2 , R2 + R0 and finally, we get Vo = Rf R1 + R f R0 V2 − V1 . R1 R2 + R0 R1 A way to to obtain the same voltage gain for V2 and V1 is to impose R0 = R f and R1 = R2 = R. The output voltage becomes Vo = A(V2 − V1 ), A= Rf . R AF T This differential configuration is not very convenient because it does not preserve the high input impedance of the Op-Amp. In fact , considering that the Op-Amp input impedance is very high, we have that the resistance seen from V2 is R2 + R0 . Usually, the sum of those resistors is at least one order of magnitude smaller than the Op-Amp input impedance. If we need to build a variable gain differential amplifier, we will need to change more than one resistor value. Matching the resistances values can become an issue when thermal drifts become important. More practical and stable configurations called instrumentation amplifiers are available “off the shelf”. 3.3.4 Voltage Follower (Unity Gain “Buffer”) DR The circuit sketched in figure 3.5 is called voltage follower or unity gain buffer. The feedback line with no load gives vo (t) = v− . CHAPTER 3. THE OPERATIONAL AMPLIFIER 64 Moreover, because of the golden rule we will have v− = v+ , which implies v o = vi . The output voltage vo (t) follows the input voltage vi (t) with unitary gain. Considering that the high impedance input and the low impedance output values of Op-Amps are close to the state of the art in the electronic design2 , the voltage follower can be used as an isolation stage (buffer) between two circuits. 3.3.5 Integrator Amplifier Rf Cf R − + vo (t) AF T vi (t) Figure 3.6: Active integration stage using an Op-Amp. 2 Devices DR expressly made to work as input unity gain buffer, and output unity gain buffer are also available. Analog Devices SSM2141 and SSM2142 are complementary buffers devices which can drive long delay lines for example. 3.3. COMMONLY USED OP-AMP CIRCUITS 65 Let’s consider the circuit in figure 3.6 without the resistance R f . The voltage drop vo across the capacitor C f is vo (t) = − 1 Cf Z t −∞ (3.4) i (τ )dτ and the current flowing through the resistance R is i (t) = vi ( t ) . R Placing the expression of i (t) obtained from the previous equation into eq.(3.4), we will obtain vo (t) = − 1 τ Z t −∞ vi (t′ )dt′ , τ = RC f . DR 3.3.6 Differentiator Amplifier AF T Real Op-Amps or signals connected to the input have often (always ) a DC offset. This offset is indeed integrated and after a given time will saturate the amplifier output. This saturation is essentially a manifestation of the instability of the circuit at low frequency. Moreover, the initial charge of the capacitor is undefined, making the initial output state unpredictable. A common way to avoid these problems is to introduce the resistance R f in parallel with the capacitor C f which reduces the amplifier DC gain. An intuitive way to understand the effect of this feedback resistance is that it does not allow the capacitor to be charged "ad libitum". The choice of the R f is not so trivial if we want to preserve the characteristic of good integrator. Using the simple phasor analysis it easy to prove that the good integrator condition is ω ≫ 1/C f R f . If the DC current must be integrated, we can place a switch in parallel with the capacitor to be opened when the integration is started. In this way we will have the capacitor state completely defined. Let’s now consider the circuit in figure 3.7 without the feedback capacitor C f . Applying a similar analysis to that used in the integrator amplifier we CHAPTER 3. THE OPERATIONAL AMPLIFIER 66 Cf Rf i(t) C − vi (t) + vo (t) Figure 3.7: Differentiator stage using an Op-Amp. will have dvi , dt vo (t) = − R f i. i (t) = C and indeed dvi , τ = R f C. dt This configuration without C f doesn’t work well with real Op-Amps, because of stability problems. In fact, the introduction of the capacitor compromises the internal compensation of the Op-Amp. Placing a capacitor C f in the feedback network restores the compensation making the overall circuit stable. The choice of C f is not trivial if we want to preserve the circuit differentiator characteristics. Section 3.5.2 explains in more details the effect of this configuration on the compensation of a real Op-Amp. AF T vo (t) = − τ 3.4 Negative Feedback Amplifiers DR Let’s consider an amplifier with a negative feedback network as show in figure 7.1. Considering the voltage at the summation point output is V ′ = Vi − β(ω )Vo , 3.4. NEGATIVE FEEDBACK AMPLIFIERS Vi V´ + 67 Vo A(ω) − βVo β(ω) Figure 3.8: Amplifier with negative feedback. and the amplifier gain is A(ω ), the output voltage will be Vo = AV ′ = A(Vi − βVo ) . Collecting Vo , we will have Vo = A Vi , 1 + βA and the so called closed loop transfer function, ACL , will finally be ACL (ω ) = A . 1 + βA (3.5) We can clearly see that if the denominator goes to zero for a given frequency ω ∗ , we are in trouble, ACL (ω ∗ ) diverges, and the amplifier saturates. The trick to avoid this situation, is to study the following equation (3.6) AF T AOL (ω ) = β(ω ) A(ω ) = −1, where | AOL | = 1 DR where AOL is the feedback amplifier open loop transfer function. If the phase where the magnitude of AOL is equal to one is different from 1800 plus multiples of 3600 , the denominator never goes to zero and the saturation is avoided. However, this is not enough because we can have just an oscillation with no saturation if the AOL phase is too close to 1800 . The rule of thumb is to have a so called phase margin of about 600 from 1800 . Finally, we can formulate the criterion for the stability: ⇒ −120 < arg( AOL ) < 120 . CHAPTER 3. THE OPERATIONAL AMPLIFIER 68 Another important result of the theory of feedback amplifier is the following straightforward result if βA ≫ 1 ⇒ ACL (ω ) ≃ 1 . β Where the open loop transfer function Aβ is greater than one, the feedback amplifier response does not depend on the response A(ω ) of the amplifier with no feedback. It is worthwhile to notice that the ideal amplifier (A → ∞) has ACL = 1/β for all angular frequencies. A close loop ideal amplifier does not have undesired instabilities, but just the ones that can be introduced by the feedback network. 3.4.1 Input Impedance Feedback Amplifier The input impedace of a feedback amplifier is Zi = Zi′ (1 + βA) , where Zi′ is the impedance of the amplifier without feedback network. For frequency values such that β ( ω ) A (ω ) ≫ 1 ⇒ Zi ≃ Zi′ βA . In conclusion, the impedance of a feedback amplifier scales with the open loop gain. In other words, where the loop gain is much greater than one the input impedance increases by the loop gain. 3.4.2 Output Impedance Feedback Amplifier Zo = Zo′ 1 + βA For frequency values such that ⇒ Zo ≃ Zo′ . βA DR β (ω ) A (ω ) ≫ 1 AF T The output impedace of a feedback amplifier is Where the loop gain is much greater than one the output impedance decreases by the loop gain. 3.4. NEGATIVE FEEDBACK AMPLIFIERS 69 3.4.3 Simple Feedback Network Just to familiarize with the concept of feedback amplifier let’s analyze some very simple circuit like the Op-Amp non inveriting and inverting amplifiers. 3.4.3.1 Non-Inverting Configuration Zf Z− V− − Vi Vo + Figure 3.9: Non-inverting configuration Op-Amp with generic impedance. Considering the Op-Amp Non-Inverting configuration as shown in figure 3.9, and the voltage divider equation we have V− = Z− Vo , Z f + Z− (3.7) and the feedback network transfer function is β(ω ) = V− Z− = . V0 Z f + Z− ACL ≃ Zf 1 = 1+ . β Z− 3.4.3.2 Inverting Configuration β= Vi V0 DR In this case the feedback network transfer function β is AF T The approximate gain of the feedback amplifier is as expected CHAPTER 3. THE OPERATIONAL AMPLIFIER 70 Zf Vi Z− V− − Vo + Figure 3.10: Inverting configuration Op-Amp with generic impedance. Considering the inverting configuration stage as shown in figure 3.10, because of the virtual ground we have Z− Vi = ZI ⇒ β(ω ) = − , −Vo = Z f I Zf and the gain of the feedback amplifier is simply ACL ≃ Zf 1 =− . β Z− 3.5 The Real Op-Amp AF T Lets consider in this section a more realistic model of the Op-Amp by including a finite input impedance Ri , non zero output impedance Ro , finite and frequency dependent A (ω ), input bias currents ib+ , bb− and input voltage offset vb . Using ideal components, the equivalent circuit of the real Op-Amp is shown in figure 3.11. 3.5.1 Bias Currents and Voltage and Current Offsets DR Imbalances inside of the Op-Amp, mainly due to differences in the electronics components, produce undesirable bias currents and a voltage offset at the inputs. Input voltage and current offsets can be modeled by introducing ideal generators as shown in figure 3.11. Current Offset is defined as the difference in the magnitude of the bias currents, i.e. ios = |ib+ | − |ib− | 3.5. THE REAL OP-AMP 71 A way to characterize the voltage offset is to use the voltage follower configuration (see section 3.3.4) with the input Vi connected to the ground. The voltage offset will be directly the output voltage Vo . Current input biases can be studied connecting a resistor between the one input and ground and measuring the voltage drop across the resistor. vb v− − vi = v +− v− v+ vo + − ib− Ri + Ro + ib+ vo= Av(v +−v−−vb ) Av (ω) − Figure 3.11: Equivalent circuit for an Op-Amp using ideal components. Voltage offsets and current biases are taken into account using ideal voltage and current generators. 3.5.2 Compensated Op-Amp Transfer Function AF T Practical Op-Amps are often designed to have a frequency response dominated by a single pole, i.e. the transfer function with no feedback from DC to a given frequency is well approximated by just a simple low-pass filter. In this case, the Op-Amp transfer function with no feedback can be written as A0 A(ω ) = , (3.8) 1 + j ωω0 DR where A0 is the DC gain and ω0 is the angular frequency of the dominant pole (the cut-off angular frequency of the low pass filter). This behavior is obtained by introducing a compensating circuit (quite often a capacitor) in the architecture of the Op-Amp. This choice comes from the stability requirement that we mentioned in the previous section. In fact, an amplifier with a transfer function with CHAPTER 3. THE OPERATIONAL AMPLIFIER 72 100 Differential Open Loop Gain (dB) 80 60 40 20 0 1 10 2 10 3 4 10 10 Frequency (Hz) 5 10 6 10 7 10 Figure 3.12: Differential gain of the AD711 Op-Amp (cut-off frequency ν0 = 18Hz, unity gain frequency ν1 = 4MHz, and DC gain a0 = 110dB). Dominant single pole behavior is valid up to about 4MHz, where the slope becomes steeper than 1/ω. AF T a dominant pole cannot lose more than 900 making quite easy the design of a stable feedback network. For example, feedback networks with just resistors, (ideal resistors don’t loose phase) will not generate oscillations. Typical values for pole frequencies are between 5Hz and 100Hz. Figure 3.12 shows the differential transfer function of the Op-Amp AD711 with no feedback network. DR Let’s study more in details the compensated Op-Amp response with a feedback. Considering the frequency response of a compensated feedback amplifier the closed loop transfer function with a feeback network β(ω ) will 3.5. THE REAL OP-AMP 73 be ACL (ω ) = A0 1 + j ωω0 !, 1+ βA0 1 + j ωω0 ! , A0 , 1 + βA + j ωω0 A0 ω = 1+j . 1 + A0 β ω0 (1 + βA0 ) = 3.5.2.1 Compensated Op-Amp with Constant Frequency Response Feedback In the particular case that β(ω ) is constant and β = β 0 ≥ 1, the previous equation becomes A0 , 1 + β 0 A + j ωω0 A0 ω = 1+j . 1 + A0 β ω0 (1 + βA0 ) ACL (ω ) = and therefore A1 , ACL (ω ) = 1 + j ωω1 ( A0 A1 = 1+ A 0 β 0 ω1 = ω0 (1 + β 0 A 0 ) AF T In this case, the feedback Op-Amp response ACL is the same as of the open loop transfer function AOL but with a smaller DC gain (about 1/β 0 ) and higher cut off angular frequency ω1 of about ω0 β 0 A0 . 3.5.2.2 Compensated Op-Amp in the Differentiator Configuration Let’s find the frequency response of the "real" Op-Amp differentiator circuit of figure 3.7. For the basic differentiator (no capacitor C f ) the feedback network transfer function is 1 ω Z =− = j 1, Zf jωRC ω ω1 = 1 . RC DR β=− Considering eq. (3.5), we have that the gain of the differentiator is CHAPTER 3. THE OPERATIONAL AMPLIFIER 74 ACL (ω ) = 1 A(ω ) = , 1 + jA(ω ) ω1 /ω 1/A + j ω1 /ω and finally ACL (ω ) = A0 1 + j A0 ωω1 + ω ω0 = − A0 ω0 ω2 jω . − jωω0 + A0 ω0 ω1 Resonance occurs when the denominator goes to zero, i.e for s p ω02 ω0 ±j + A0 ω0 ω1 ≃ ± j A0 ω0 ω1 , ω0 ≪ ω1 , A ≥ 1 . ω∗ = j 2 4 3.5.3 The Common Mode Rejection Ratio (CMRR) We want characterize the rejection of an Op-Amp output as a differential amplifier, of signals sent to both inputs. For an ideal Op-Amp we expect to obtain Vo = 0 for all frequencies, i.e. a perfect rejection. To define a convenient parameter which measures the rejection it is necessary to define the following ones, the common mode gain AC (ω ) = Vo , V+ − V− V+ = V− = Vs sin(ωt), and the differential mode gain Vo , V+ − V− V+ = Vs sin(ωt), V− = 0. AF T A D (ω ) = The Common Mode Rejection Ratio (CMRR) is defined as the modulus of the ratio of the differential gain A D over the common mode gain AC , i.e. CMRR(ω ) = A D (ω ) AC (ω ) DR Ideally, the CMRR should be infinity for all frequencies. For values below ~90, CMRR can be measured using the Op-Amp differential configuration (see figure 3.4) by measuring AC and A D as a function of the frequency. To minimize possible large systematic errors, it is 3.5. THE REAL OP-AMP 75 necessary to have the same gain for the to inputs V1 and V2 . This can be achieved by placing a trimmer in the voltage divider mesh of the differential configuration circuit. Adjusting the trimmer we can minimize Vo for a single frequency and study the CMRR for a given bandwidth. Figure 3.13shows the CMRR as a function of frequency of a typical Op-Amp. A typical value for CMRR is 90dB. 90 CMRR (dB) 80 70 60 50 40 30 1 10 100 1000 Frequency (Hz) 10000 100000 Figure 3.13: CMRR as a function of frequency of a typical Op-Amp. AF T 3.5.4 The Gain Bandwidth Product (GBWP) The gain bandwidth product, GBWP, is a common way to characterize the gain with respect to the available bandwidth of amplification. Using the previously defined notation, the GBWP is simply defined as DR GBWP = A0 ω0 . The larger the GBWP the better is the Op-Amp, and the closer the OpAmp is to the ideal operational amplifier. CHAPTER 3. THE OPERATIONAL AMPLIFIER 76 Input/Output Voltage (V) 16 14 12 10 8 Input Output 6 4 2 0 0 10 20 30 40 50 60 70 time (us) Figure 3.14: Slew rate illustration. The output vo takes 40µs to reach the desired voltage. The device is said to be slew rate limited. 3.5.5 The Slew Rate (SR) The slew rate or maximum slew rate SR of an Op-Amp is defined as the maximum rate of the output voltage vo per unit time ∆vo (vi ) SR = max . ∆t AF T The slew rate can be easily observed sending a square wave (see figure 3.14) to the Op-Amp input vi , and looking at the raising and falling slope of the output signal vo . If the slopes do not change while changing the input amplitude, then the Op-Amp is slew rate limited. A similar procedure can be applied using a sinusoidal signal as input. In this case, if we increase the input amplitude too much, the output will become distorted and will look somehow closer to a triangular wave than a sinusoid. Considering a sinusoid of frequency ω0 and amplitude Vo d Vo sin ω0 t = ω0 Vo max {cos ω0 t} = ω0 V0 . SR = max dt DR For an undistorted signal with amplitude V and maximum frequency ω, we must have SR ≫ ωV . 3.5. THE REAL OP-AMP 77 Usually, a frequency compensated Op-Amp has an integrating stage somewhere, and therefore the slew rate is often proportional to the inverse of the capacitance of the compensating network. Typical good slew rate values are of the order of few V/µs. The slew rate parameter essentially measures the ability of an Op-Amp to follow voltage changes for large voltage inputs. The inability of following the voltage input usually comes from limitations on the current inside the amplifier compesation circuit. In fact, on a capacitor compensated amplifier the bottle-neck id the current to charge or discharge the capacitor. 3.5.6 Ideal versus Real and Practical Considerations The following table summarizes the main characteristic of an ideal OpAmp together with those of typical real Op-Amp. In some cases we can find Op-Amps excelling some of the mentioned characteristics , quite often at the expense of other characteristics. Ideal Op-Amp Typical Op-Amp Open-Loop DC Gain Av ∞ > 104 Open-Loop Bandwidth ∞ ∼ 10Hz (dominant pole) Common Mode Rejection Ratio CMRR ∞ > 70dB Input Resistance Ri ∞ > 10MΩ Output Resistance Ro 0 < 100Ω Input Current δI± 0 < 0.5µA Input Offset Voltage δV± 0 < 10mV Input Offset Current δIi 0 DR AF T Property < 200pA 78 CHAPTER 3. THE OPERATIONAL AMPLIFIER What are the conditions that dictate the range of the feedback impedances R f ? Apart from special cases, the feedback current I should be only a small fraction of the maximum output current Io , i.e. I = 1%Io . A typical OpAmp has a maximum output of 10mA at 10V, i.e. Rf = V 10V = = 100kΩ I 10 · 1%mA Anyway, typical feedback resistors should be in the range of R f = 50 − 1MΩ. Small difference on the differential stage of the Op-Amp produces a DC offset δV at the input, which can produce large DC output if the gain is extremely high. For example, if we have AF T G ≥ 104 , ⇒ Vo ≥ 10V. DR δV = 10mV, 3.6. PROBLEMS PREPARATORY TO THE LABORATORY 79 3.6 Problems Preparatory to the Laboratory 1. Supposing that the open-loop gain of an Op-Amp is a simple low pass filter (first order) with DC gain 144dB and cut-off frequency f 0 = 10Hz, sketch in a bode diagram, the magnitude of the frequency response of a non-inverting stage with gain G = 10 at 10Hz. 2. Prove that the good integrator condition for the circuit in figure 3.6 is ω ≫ 1/R f C f . (Hint: calculate the response of the circuit and compare it with the ideal response of the ideal inverting integrator, i.e. A(ω ) = −1/( jωRC). Calculate the DC gain of the integrator transfer function. 3. Using an integrator stage with a feedback resistor R f , and time constant τ = RC, compute the values for τ and R f needed to integrate a sinusoidal wave with frequency f > 1kHz and with 10% of losses in the integration. Choose a value of R ≫ Rs , where Rs = 50Ω is the input impedance of the used function generator. 4. Show that the slope of an integrated square wave is the inverse of of the time constant τ = RC f of the Integrator shown in figure 3.6. Which characteristics of the square wave are needed to fulfill the requirement to not saturate the integrator output ? 5. Consider a differential stage having the following resistances values: R1 = R2 = 50 kΩ, R f = R0 = 100 kΩ . Calculate the following quantities 3.7 Laboratory Procedure AF T (a) the two input impedances Z1 and Z2 , (b) the output impedance Zo , (c) Considering that the Op-Amp max output current and voltage are respectively Imax =10mA and Vmax = 10V, calculate the smallest load Rmin it can drive . DR Read carefully the entire procedure before starting the experiment, and note on your log book all the unpredicted behavior you experience in the circuits response. 80 CHAPTER 3. THE OPERATIONAL AMPLIFIER Consult the data-sheet to properly map the µ741 and AD711 Op-Amp pin-out. Op-Amp output high frequency noise can be reduced by adding 100nF capacitors closest as possible to the ±15V power supplies input of the OpAmp. Before powering your circuit up, cross-check the power supply connections. It is always a good practice to turn on the power supplies at the same time to avoid potential damages of the Op-Amps. 1. Build a non-inverting staga amplifier with a µ741 Op-Amp with a gain of 100 and do the following: (a) measure the transfer function of the amplifier, (b) download the simulation file from the ph5/105 website for the circuit, input the proper components values, (c) run the AC response simulation with the ideal compensated Op-Amp and find the discrepancies beteween your measurement and the simulation, (d) replace the ideal Op-Amp with the model of the Op-Amp you are using and compare the frequency response with the simulation. 2. Using the previous circuit, (a) estimate the slew rate of the Op-Amp, AF T (b) compare the measured slew rate to the simulation using the OpAmp model, (c) replace the AD711 and remeasure the slew rate. 3. Build an integration stage with a time constant τ ∼ 100µs using an AD711 Op-Amp . Include a feedback resistor R f to avoid saturation at the output and do the following steps: DR (a) measure the impulse response, (b) measure the frequency response, 3.7. LABORATORY PROCEDURE 81 (c) estimate the integrator time constant τ using a square wave, (d) download the simulation file from the ph5/105 website for the circuit, input the proper components values, (e) run the AC response simulation with the ideal compensated Op-Amp and find the discrepancies beteween your measurement and the simulation. DR AF T (f) run the transient analysis and compare it with the measured impulse response. AF T CHAPTER 3. THE OPERATIONAL AMPLIFIER DR 82 Bibliography [1] The Art of Electronics, Paul Horowitz and Winfield Hill, Cambridge University Press. [2] Microelectronics Jacob Millman & Arvin Grabel, McGraw-Hill Electrical Engineering Series [3] Analog Devices web site www.analog.com AD625: Programmable Gain Instrumentation Amplifier Data Sheet (Rev. D, 6/00). 83 DR AF T [4] An Introduction to Operational Amplifiers with Linear IC, Second Edition, Luces M. Faulkenberry, edited by John Wiley and Son. BIBLIOGRAPHY DR AF T 84 Chapter 4 Diodes and Transistors 4.1 Introduction In this chapter we will analyze two new electronic devices, the semiconductor diode and the bipolar junction transistor (BJT). For a better understanding of their behavior and characteristics, we will also introduce some basic applications. Unfortunately, there will be no time to study the quite complex physics of semiconductors, and especially the conduction mechanism, which substantially differs from that of metals. The interested student should look for a course and books on solid state physics. It is important to notice that to quickly grab how the BJT device works, it is fundamental to acquire a clear understanding of the semiconductor diode’s behavior. AF T 4.2 The Semiconductor Junction (Diode) The semiconductor junction or semiconductor diode is a device which shows non-linear behavior due to its peculiar conduction mechanism. In fact, if ID and VD are the current and the voltage difference across the junction, we will have − 1 ), DR ID (VD ) = I0 (e − qVD ηk B T (4.1) where I0 is the reverse saturation current, k B = 1.3807 · 10−23J/K, the 85 CHAPTER 4. DIODES AND TRANSISTORS 86 ID( µA) −100 I0 Vb −50 1 0 Von VD (V) 0.5 Figure 4.1: Diode characteristic (continuous curve), simplified diode characteristic (dashed curve). Note the different scales in first and third quadrant of the diode characteristic plot. Boltzmann constant, T the absolute temperature , q = −1.60219 · 10−19 C, the electron charge, and η a dimensionless parameter which depends on the diode type. Considering that the ambient temperature is T ≃ 300K, we will have k B T ≃ 4.14 · 10−21 J ≃ 0.026eV. For silicon diodes the reverse saturation current I0 is of the order of few tenths of nano-amperes. Instead of following Ohm’s law, the semiconductor junction follows an exponential law. Deviations from this law are negligible depending on the current magnitude and the diode characteristics. 1 The thermally generated carriers accelerated by the AF T Figure 4.1 shows standard symbols for a semiconductor diode and the I-V characteristic. The break-down voltage Vb reported in the same figure is the reverse voltage which essentially short circuits the junction (typically between -100V and -50V). This behavior is not accounted in equation (4.1), and is generated by the so called avalanche multiplication mechanism and the Zener mechanism1 . DR electric field have enough energy to disrupt the electrons bond of the crystal atoms producing new carriers (electron-holes pairs). The new and accelerated pairs generate new carriers producing an avalanche of carriers, and indeed a break-down current. A sufficient strong electric field can also disrupt electrons bonds creating an electronhole reverse current. This effect is called Zener Breakdown mechanism. 4.2. THE SEMICONDUCTOR JUNCTION (DIODE) A ID A D0 VD ID K 87 A D0 VD ID K D0 VD K Figure 4.2: diode standard symbols. Starting from left, diode symbol , Zener diode symbol, and Schottky diode symbol. Diode terminals A, and K are respectively called anode and cathode. A simplified model of the junction diode is that of a perfect switch, i.e. ID (V ) = ∞ V ≥ Von , 0 V < Von where Von is the diode turn-on voltage or cut-in voltage, which depends on the junction type and on the current magnitude. For current up to ID ∼ 100 mA, silicon diodes have Von ≃ 0.6V, and germanium diodes have Von ≃ 0.3V . For voltages greater than Von , the diode is a short circuit (current is not limited by the diode) and is said to be forward biased. For smaller values it is an open circuit (current across the diode is zero ) and is reverse biased. 4.2.1 Zener Diodes DR V < Vb −∞ 0 0 ≤ V < Von , ID (V ) = +∞ V ≥ Von AF T Zener diodes are particular semiconductor diodes with adequate power dissipation to operate in the break-down voltage region. They have a well defined Vb , with values ranging from about few volts to several hundreds volts. Zener diode symbol is shown in Figure 4.2. Approximating the characteristics with a piecewise linear relationship, we have Often, the break-down curve is virtually vertical so that the previous approximation of the reverse biased region is quite good. CHAPTER 4. DIODES AND TRANSISTORS 88 4.2.2 Schottky Diodes A junction made of a semiconductor and a metal can behave like a semiconductor diode[2]. For example, Lightly doped silicon and aluminum can form a semiconductor junction. Such kind of devices, called Schottky barrier diodes (or simply Schottky diodes), still follow the diodes characteristics (4.1) with usually a lower turn-on voltage Von and a larger in magnitude reverse saturation current Is . The symbol for Schottky diode device is shown in Figure 4.2. 4.3 Diode Dynamic Impedance For linear devices the current is proportional to the applied voltage and for a given frequency the impedance (V/I ) is constant. With non-linear circuits this is not true anymore, but we can generalize the impedance concept introducing the dynamic impedance Rd = dV dI Let’s apply this definition to the diode. Starting from the I-V characteristic equation and neglecting the reverse saturation current, after some algebra we obtain ID kB T ln . VD = −η q I0 Rd = − η kB T 1 q ID AF T Taking the derivative on both sides we obtain As we can see, the dynamic impedance of the diode depends on the current ID . Considering a silicon diode with a typical value of η = 2 at room temperature ( T = 300 K ), we will have 5.2 · 10−2 , ID ID = 1mA ⇒ Rd ≃ 52 Ω . DR R d ( ID ) ≃ For small variations of the current around 1mA, we can assume that the impedance of a forward biased diode with η = 2 is ∼ 50 Ω . The 4.4. PRACTICAL CIRCUITS 89 ID D + Vs RL VL − Figure 4.3: Half-wave rectifier circuit. dynamic impedance concept will be quite useful for studying the bipolar junction transistor. 4.4 Practical Circuits To better understand the behavior of a semiconductor junction, let’s analyze a few typical applications of semiconductor diodes. Some other applications in connection to other components will be studied in the following chapters. 4.4.1 Rectifiers, AC to DC Conversion 4.4.1.1 Half-Wave Rectifier AF T The purpose of a rectifier circuit is to convert alternating current into a unidirectional current. This can be achieved using semiconductor diodes. The typical alternating current to direct current converter is a rectifier connected to an active low pass filter with a so called regulator circuit, which smooths the rectifier output and minimizes ripples. The simplest regulator is a capacitor placed in parallel with the rectifier output. Regulators can be easily found in literature (see [1]). DR The simplest rectifier circuit is the so called half-wave rectifier shown in Figure 4.3. Using the diode ideal characteristic, it is quite straightforward to predict the voltage difference across the the resistor R L . In fact, when the sinusoidal signal is positive, it will forward bias the diode and we will CHAPTER 4. DIODES AND TRANSISTORS 90 V V0 0.7V t VL Vs Figure 4.4: Voltage difference across the load connected to the half-wave rectifier output. have a voltage drop across the resistor VL = RI. For the negative half cycle, because the diode is reverse biased VL must be zero. Considering the diode threshold voltage V0 , and the diode resistance R f during the positive half cycle we will have VL = RL (Vs − V0 ), R f + RL and if RL ≫ R f ⇒ VL ≃ (Vs − V0 ). VL = RL Vs , Rr + R L and if R L ≪ Rr ⇒ VL ≃ AF T During the negative half cycle we will have RL Vs ≃ 0. Rr DR The main disadvantage of this circuit is the very poor efficiency (less than 50% of current is rectified). In fact, instead of rectifying the entire signal the circuit chops the negative half cycle out (see Figure 4.4). 4.4. PRACTICAL CIRCUITS 91 A D1 D3 vs (t) C D RL D4 D2 B Figure 4.5: Full-wave rectifier bridge circuit or simply bridge rectifier. 4.4.1.2 Full-Wave Rectifier Bridge The Full-Wave rectifier bridge (see Figure 4.5), a more efficient way of rectifying an AC current, uses four arranged diodes in the so called bridge configuration. To understand the circuit “logic”, let’s consider the two possible states of the nodes A and B shown in Figure 4.5. • When the node A is positive (B negative) the diodes D2 , and D3 are forward biased (i.e. the diodes are a “short circuit”) and D1 , and D4 are reverse biased (i.e. the diodes are an “open circuit”). The current flows through the resistor R L and the node C is positive. • When the node A is negative (B positive), the diodes D1 , and D4 are forward biased (short circuit) and D2 , and D3 are reverse biased. The current flows through the resistor R L and the node C is still positive. 4.4.2 Voltage Limiter (Diode Clamp) AF T Using the full-wave rectifier we will indeed have the negative half cycle rectified as shown in Figure4.6. DR Diodes can be used to limit the voltage applied to an input as shown in Figure 4.7. Let’s consider the diode D1 connected to Vmax . If Vi exceeds Vmax + Von the diode is not reverse biased anymore and starts conducting, i.e the circuit limits the input voltage Vi to Vmax + Von . Analogously, D2 limits the minimum input voltage Vi to Vmin + Vo . The resistor is necessary to limit the current flowing through the diodes. In fact, without the resistor CHAPTER 4. DIODES AND TRANSISTORS 92 V 2V0 VL t Vs Figure 4.6: Voltage difference across the load connected to the full-wave rectifier output Vmax Vi R D1 Device to Protect D2 Vmin Figure 4.7: Diode clamps circuit. AF T if we exceed one of the voltage limits an excessive current can destroy the forward biased diode junction. The worst scenario is when the broken diode becomes an open circuit and then the device to protect becomes completely unprotected. 4.5 The Bipolar Junction Transistor (BJT) DR The bipolar junction transistor is essentially a device formed by two semiconductor junctions which share one semiconductor layer (see Figure 4.8). The common layer is called the base and the two others are the collector 4.5. THE BIPOLAR JUNCTION TRANSISTOR (BJT) Collector n 93 Base Emitter p n E C B Figure 4.8: Qualitative physical model of a npn junction. and emitter. We will have then the emitter-base and the collector-base junctions. There are two types of BJT: the npn and the pnp transistor. In the pnp transistor the collector and the emitter are p-type and the base is n-type. The npn transistor has a p-type base , and n-type collector and emitter. Standard symbols for both types are shown in Figure 4.9. Because the two junctions have two possible states (forward or reverse biased), the BJT can have four possible operating modes as shown in the following table Forward-Active: Bias Emitter-Base Forward Reverse Forward Reverse Bias Collector-Base Reverse Reverse Forward Forward AF T Operating Mode Forward-Active Cutoff Saturation Reverse-Active The BJT approximates a current-controlled source of current as explained in section 4.5.2. Cutoff: DR Both junctions are reverse biased. Neglecting the reverse saturation current, no current flows through the junctions. This mode, together with the saturation mode, is used to implement the switch device (see section4.5.5). CHAPTER 4. DIODES AND TRANSISTORS 94 IC IB C IC IB + pnp VCE B + npn B − IE E C VCE − IE E Figure 4.9: Standard circuit symbols for npn and pnp transistors. Saturation: Both junctions are forward biased, and the current IC flows from the collector through the emitter. Reverse-Active: The BJT still approximates a current-controlled source of current, but the amplification factor is usually less than that of the forward-active mode. 4.5.1 The Collector Emitter Characteristic Saturation Region AF T Figure 4.10 shows collector emitter characteristic curves family of a typical npn transistor. Each curve corresponds to a given value of the base current IB , with the base emitter junction forward biased. The curves have three regions which are called, the saturation, forwardactive, and breakdown regions. The break-down region starts for VCE values larger than those shown in the plots . DR The saturation region is where the collector emitter voltage difference VCE slightly changes as a function of the collector current IC . For the 2N2222 this regions is where VCE is between 0V to about 0.3V. 4.5. THE BIPOLAR JUNCTION TRANSISTOR (BJT) 95 Ib=200µA 35 30 Ib=150µA Collector Current IC [mA] 25 20 Ib=100µA 15 10 Ib=50µA 5 Ib=20µA Ib=10µA 0 0 0.5 1 Collector Emitter Voltage VCE [V] 1.5 Figure 4.10: Collector Emitter voltage characteristics for the 2N2222 npn transistor. The value above each curve is the corresponding base current IB . Forward-Active Region Break-Down Region AF T The collector current IC slightly changes as a function of the collector emitter voltage VCE . Normally, this region is quite larger than the saturation region. For the 2N2222 it is where VCE is between 0.3V to about 50V. This is the region where the VCE doesn’t change and IC rapidly increases. In this case, the conduction in the junction is produced by the avalanche mechanism. For the 2N2222 this region starts from VCE > 60V. 4.5.2 The BJT as a Current-Controlled Current Source (CCCS) DR As stated before, the bipolar junction transistor is a device that approximates a current-controlled source of current CCCS (see Figure 4.11). In other words, because its current output io is proportional to the current CHAPTER 4. DIODES AND TRANSISTORS 96 ii io io A i (1) i vi A ii vo A i (2) i R A i (3) i vo Figure 4.11: Ideal current controlled source (diamond symbol), i.e. the current output io is proportional to the current input ii , and is independent of the load R. In other words, if we change the load R and vo consequently, io stays constant. input ii we can linearly control io by changing ii , i.e. i o ( t ) = β F i i ( t ). 4.5.3 BJT Simplified DC Model AF T if | β F | > 1 then the BJT is a current amplifier. As shown in Figure 4.11, once ii is set io must be constant independently of the load R placed at the output. If the voltage across the output vo changes we don’t expect to see any changes on io . The curve height simply depends on the current input ii . This approximation is valid for the so called small signal model and the low frequency model. Non linearities arise for large signals and at high frequency the response cannot be flat. It is clear from the VCE characteristic that, if we want to use the BJT as CCCS , we have to bias it with a DC voltage to work in the forward-active region. DR The simplified DC model of the BJT for the forward-active mode is shown in Figure 4.12 with two different arrangements. The first mimics the topology of the BJT symbol, and the second the topology of the CCCS in Figure 4.11. This model is good enough to properly bias the transistor to work as an amplifier. 4.5. THE BIPOLAR JUNCTION TRANSISTOR (BJT) C iC iB + B iC B βF i B iB 97 C = − VBE + βF i B − VBE E E Figure 4.12: Simplified DC model for the bipolar junction transistor working in forward-active mode. The two drawings are just two different arrangement of the same circuit. The current controlled current source represents the VCE characteristic in the forward-active region. The battery in the base emitter circuit represents the voltage across the base-emitter forward biased junction (it could be replaced with a diode). A typical value is VBE = 0.7V. 4.5.4 The BJT as an Amplifier +VCC vi + C RC IB B vo + − IC C VCC + − VBE + βF i B − E VCC + AF T RB − forward-active DC model (right). DR Figure 4.13: The BJT as an AC basic amplifier (left ), and same circuit using the Left circuit of Figure 4.13 shows the basic configuration of a BJT as a simple current amplifier. Resistors RB and RC are chosen to properly bias CHAPTER 4. DIODES AND TRANSISTORS 98 and limit the currents across the junctions. The capacitance at the input is necessary to prevent the DC bias from reaching the device connected to the amplifier input. Let’s better analyze how to properly bias the transistor junctions. 4.5.4.1 BJT Amplifier Bias To obtain the largest voltage dynamic range, and considering the VCE characteristic, and neglecting the saturation region, we must have VCC ≃ 2 VCE . (4.2) Plugging the forward-active DC model into the amplifier circuit as shown in Figure 4.13, we will have2 VCC = VCE + RC IC , Considering equation4.2 and the previous equation, the collector resistor value will be VCC − VCE V RC = = CE . IC β F IB For the base resistor we will have VCC = VBE + RB IB , RB = 2VCE − VBE . IB AF T and finally This circuit is not very useful because the junctions bias and the gain depend on β F , which is quite often not well know and can easily vary by a factor of two for the same transistor. Moreover, β F is quite sensitive to temperature fluctuations. Anyway, this circuit is pedagogically interesting because of it simplicity. 2 The DR repeated index is a common convention used to distinguish between the voltage of the transistor’s connections and the source voltages applied to the transistor connections. In this case between the collector voltage VC and the source voltage VCC . 4.5. THE BIPOLAR JUNCTION TRANSISTOR (BJT) 99 Numerical Example A typical BJT a transistor has VCE between 1V and 10V. Considering the following parameters β F = 100 625Ω RC ≃ VCE = 5V ⇒ R ≃ 116.25kΩ . VBE = 0.7V B VCC ≃ 10V IB = 80µA 4.5.4.2 BJT Amplifier Gain, Input and Output Impedance (Low Frequency Model) IB C B + VCC − IC RC RB Vi hie hfe I B Vo VCC + − E Figure 4.14: BJT basic amplifier using the low frequency model (gray box). The parameters h f e = β F and hie are provided by the manufacturer Ri ≃ RB || hie , DR AF T Because the emitter-base junction is forward biased, the input impedance seen from the points B and E is quite low. This consideration with the fact that the BJT approximates a CCCS is sufficient enough to define a model for the BJT transistor response for the low frequency region. Figure 4.14 shows the model applied to the basic amplifier. The resistance hie is indeed the dynamic input impedance of the forward biased emitter-base junction. From Figure 4.14 we can easily calculate the amplifier voltage gain, which is R I R | Av | = C C = h f e C (β F = h f e ) hie IB hie Considering that the ideal current source is an open circuit and the ideal voltage source is a short circuit, we will have Ro ≃ RC . CHAPTER 4. DIODES AND TRANSISTORS 100 Thermal fluctuations can substantially change the response of the BJT. A way to avoid such kind of behavior is to add a feedback network. Essentially, a feedback network samples the output and sends it back to the input with negative sign minimizing the output fluctuations. For example, if the amplifier gain increases because of a temperature increase, the feedback signal will increase as well reducing the input signal by the amount necessary to keep the gain constant. Feedback networks can create instabilities due to phase delays in the loop (the feedback signal can change sign). It is indeed necessary to satisfy stability criterion to avoid oscillations. A detailed explanation of feedback theory can be found in [2] and [3]. 4.5.5 BJT as Switch +VCC RC vo + vi vi + t0 t1 t − RB − vo t0 t1 t AF T Figure 4.15: BJT as a switch Figure 4.15 shows a npn BJT configured as a switch. In this case, the function of the two resistors RB and RC are just to limit the current flowing through the transistor junctions. The input voltage vi control the output state of the switch. For sake of simplicity let’s neglect the reverse currents components to study the circuit. DR • If vi = 0, The emitter-base junction is reverse biased and no current flows through the circuit. This implies that vo ≃ VCC and (BJT in cutoff state). 4.5. THE BIPOLAR JUNCTION TRANSISTOR (BJT) 101 • If vi = V and supposing that this voltage forward bias both junctions we will have vo ≃ 0 (BJT in saturation). Let’s consider now the BJT reverse currents. • If vi = 0, we will have iC = ICO and vo = VCC − ICO RC . Because ICO ∼ 1nA ICO RC is negligible and v0 = VCC . • If vi = V, then v0 is essentially the voltage drop VBE of the forward biased base-emitter junction vo = 0.7V. 4.5.6 BJT as Diode Q Figure 4.16: BJT as diode. 4.5.7 Current Mirror AF T Figure 4.16 shows the typical configuration used to make a BJT working as simple diode. The emitter-base junction acts as a simple semiconductor diode. Short circuiting the collector-base ensures that the collectorbase junction is always reverse biased. Let’s consider the left circuit shown in Figure 4.17 where VCC forward bias the emitter-base junction. From the KVL obtain IR = VCC − VBE . R DR If VCC and R are kept constant (VBE = 0.7, typically ) then IR is constant as well. Applying the KCL to node we obtain IR = IC + IB CHAPTER 4. DIODES AND TRANSISTORS 102 VCC VCC IR R IR R IC2 IC IC1 IB Q1 Q1 Q2 IB1 IB2 Figure 4.17: BJT as diode. and considering that Ic = βIB we will finally have IR = 1 1+ β IC . ⇒ IC ≃ IR . The collector current IC is indeed constant if VCC and R are kept constant. Let’s now consider the circuit on the right-hand side of Figure 4.17. Because of the KVL we will have VBE1 = VBE2 IC1 = IC2 . AF T Supposing that the two transistors Q1 and Q2 are perfectly identical and because they have the same VBE we must have We will have indeed that the output IC2 will work as a constant current source. Let’s analyze the stability of the circuit for a change on the transistor parameter β. From the KVL and KCL we have VCC − VBE R = IC + 2IB IR DR IR = 4.5. THE BIPOLAR JUNCTION TRANSISTOR (BJT) 103 After some simple algebra and considering that IC = βIB we will have IC = β VCC − VBE β+2 R Studying the fluctuation of the transistor we will have ∆IC ∆β ≃2 2 . IC β In other words, the stability of this current source due to the fluctuations of the transistor properties are expected to be remarkably good. In fact, if we suppose to have β = 100 and change of 100% in β then ∆I β = 100 ⇒ C ≃ 0.02 ∆β = 100 IC DR AF T For their simplicity, current mirror are extensively used in ICs design where a constant current source is needed. AF T CHAPTER 4. DIODES AND TRANSISTORS DR 104 Bibliography [1] ??Find a reference to Regulators?? [2] Microelectronics, Jacob Millman & Arvin Grabel, McGraw-Hill Electrical Engineering Series. 105 DR AF T [3] The art of Electronics Second Edition, Paul Horowitz & Winfield Hill, Cambridge University Press BIBLIOGRAPHY DR AF T 106 Chapter 5 Basic Op-Amp Applications 5.1 Introduction In this chapter we will briefly describe some quite useful circuit based on Op-Amp, bipolar junction transistors, and diodes. 5.1.1 Inverting Summing Stage Rf V1 R I1 V2 R A I Vn − Vo + AF T I2 I R In Figure 5.1: Inverting summing stage using an Op-Amp. The analysis of the DR circuit is quite easy considering that the node A is a virtual ground. Figure 5.1 shows the typical configuration of an inverting summing stage using an Op-Amp. Using the virtual ground rule for node A and 107 CHAPTER 5. BASIC OP-AMP APPLICATIONS 108 Ohm’s law we have In = Vn , R N I= ∑ In . n =1 Considering that the output voltage V0 is Vo = − R f I, we will have N Vo = A ∑ Vn , A=− n =1 Rf . R 5.1.2 Basic Instrumentation Amplifier Instrumentation amplifiers (In-Amp) are designed to have the following characteristics: differential input, very high input impedance, very low output impedance, variable gain, high CMRR, and good thermal stability. Because of those characteristics they are suitable but not restricted to be used as input stages of electronics instruments. Vi− R2 + G − R1 − Vo + R1 Vi+ G + Input Stage R2 AF T − Differential Stage Figure 5.2: Basic instrumentation amplifier circuit. DR Figure 5.2 shows a very basic In-Amp circuit made out of three OpAmps. In this configuration, the two buffers improve the input impedance of the In-Amp, but some of the problems of the differential amplifier are 5.1. INTRODUCTION 109 still present in this circuit, such as common variable gain, and gain thermal stability. A straightforward improvement is to introduce a variable gain on both amplifiers of the input stage as shown in Figure 5.3(a), but unfortunately, it is quite hard to keep the impedance of the two Op-Amps well matched, and at the same time vary their gain and maintaining a very high CMRR. A clever solution to this problem is shown in Figure 5.3(b). Because of the virtual ground, this configuration is not very different from the previous one but it has the advantage of requiring one resistor to set the gain. In fact, if R3 = R4 then the gain of the Op-Amps A1 and A2 can be set at the same time adjusting just RG . For an exhaustive documentation on instrumentation amplifiers consult [2]. Vi− Vi− + + A1 A1 − − R1 R3 R4 R2 Vi+ R3 RG − R4 − A2 + (a) Vi+ A2 + (b) AF T Figure 5.3: Improved input stages of the basic instrumentation amplifier. 5.1.3 Voltage to Current Converter (Transconductance Amplifier) DR A voltage to current converter is an amplifier that produces a current proportional to the input voltage. The constant of proportionality is usually called transconductance. Figure 5.4 shows a Transconductance Op-Amp, which is nothing but a non inverting Op-Amp scheme. CHAPTER 5. BASIC OP-AMP APPLICATIONS 110 if Zf R − + Rf vs (t) Zf Amperometer Figure 5.4: Basic transconductance amplifier circuit. The current flowing through the impedance Z f is proportional to the voltage vs . In fact, assuming the Op-Amp has infinite input impedance, we will have vs (t) i f (t) = . R Placing an amperometer in series with a resistor with large resistance as a feedback impedance, we will have a high resistance voltmeter. In other words, the induced perturbation of such circuit will be very small because of the very high impedance of the operational amplifier. 5.1.4 Current to Voltage Converter (Transresistance Amplifier) v o ( t ) = − R f i s ( t ). AF T A current to voltage converter is an amplifier that produces a voltage proportional to the input current. The constant of proportionality is called transimpedance or transresistance, and its units are Ω. Figure 5.5 show a basic configuration for a transimpedance Op-Amp. Due to the virtual ground the current through the shunt resistance is zero, thus the output voltage is the voltage difference across the feedback resistor R f , i.e. DR Photo-multipliers photo-tubes and photodiodes drivers are a typical application for transresistance Op-amps. In fact, quite often the photocurrent produced by those devices need to be amplified and converted into a voltage before being further manipulated. 5.2. LOGARITHMIC CIRCUITS 111 is Rf − Rs is v o=−is R f + Figure 5.5: Basic transimpedance Op-Amp. 5.2 Logarithmic Circuits By combining summing circuits with logarithmic and anti-logarithmic amplifiers we can build analog multipliers and dividers. The circuits presented here implements those non-linear operations just using the exponential current response of the semiconductor junctions. Because of that, they lack on temperature stability and accuracy. In fact, the diode reverse saturation current introduces an offset at the circuits output producing a systematic error. The temperature dependence of the diode exponential response makes the circuit gain to drift with the temperature. Nevertheless these circuits have a pedagogical interest and are the basis for more sophisticated solutions. For improved logarithmic circuits consult [1] chapter 7, and [1] section 16-13 and[3]. Q vi R − vo vi R − + vo + (b) DR (a) AF T D Figure 5.6: Elementary logarithmic amplifiers using a diode or an npn BJT. 112 CHAPTER 5. BASIC OP-AMP APPLICATIONS 5.2.1 Logarithmic Amplifier Figure 5.6 (a) shows an elementary logarithmic amplifier implementation whose output is proportional to the logarithm of the input. Let’s analyze this non-linear amplifier in more detail. The Op-Amp is mounted as an inverting amplifier, and therefore if vi is positive, then vo must be negative and the diode is in conduction. The diode characteristics is i = Is e−qvo /k B T − 1 ≃ Is e−qvo /k B T Is ≪ 1, where q < 0 is the electron charge. Considering that i= vi , R after some algebra we finally get vo = kB T [ln (vi ) − ln ( RIs )] . −q 5.2.2 Anti-Logarithmic Amplifier AF T The constant term ln ( RIs ) is a systematic error that can be measured and subtracted at the output. It is worth to notice that vi must be positive to have the circuit working properly. An easy way to check the circuit is to send a triangular wave to the input and plot vo versus vi . Because the BJT collector current Ic versus VBE is also an exponential curve, we can replace the diode with an npn BJT as shown in Figure 5.6. The advantage of using a transistor as feedback path is that it should provide a larger input dynamic range. If the circuit with the BJT oscillates at high frequency, a small capacitor in parallel to the transistor should stop the oscillation. DR Figure 5.7 (a) shows an elementary anti-logarithmic amplifier, i.e. the output is proportional to the inverse of logarithm of the input. The current flowing through the diode is i ≃ Is e−qvi /k B T Is ≪ 1. 5.2. LOGARITHMIC CIRCUITS 113 R R D vi vi vo − Q vo − + + (b) (a) Figure 5.7: Elementary anti-logarithmic amplifiers using a diode or an pnp BJT. Considering that vo = − Ri , thus vo ≃ − RIs e−qvi /k B T . If the input vi is negative, we have to reverse the diode’s connection. In case of the circuit of Figure 5.7 (b) we need to replace the pnp BJT with an npn BJT. Same remarks of the logarithmic amplifier about the BJT, applies to this circuit. Logarithmic Amplifier v2 Logarithmic Amplifier R R R − + AF T v1 Anti−Log Amplifier vo anti-logarithmic amplifiers DR Figure 5.8: Elementary analog multiplier implementation using logarithmic and CHAPTER 5. BASIC OP-AMP APPLICATIONS 114 5.2.3 Analog Multiplier Figure 5.8 shows an elementary analog multiplier based on a two log one anti-log and one adder circuits. Fore more details about the circuit see [1] section 7-4 and [1] section 16-13. R v1 v2 Logarithmic Amplifier Logarithmic Amplifier R − R + Anti−Log Amplifier vo R0 Figure 5.9: Elementary analog divider implementation using logarithmic and anti-logarithmic amplifiers. 5.2.4 Analog Divider AF T Figure 5.8 shows an elementary logarithmic amplifier based on a two log one anti-log and one adder circuits. Fore more details about the circuit see [1] section 7-5 and [1] section 16-13. 5.3 Multiple-Feedback Band-Pass Filter DR Figure 5.10 shows the so called multiple-feedback bandpass, a quite good scheme for large pass-band filters, i.e. moderate quality factors around 10. Here is the recipe to get it working. Select the following parameter which define the filter characteristics, i.e the center angular frequency ω0 the quality factor Q or the the pass-band interval (ω1 , ω2 ) , and the passband gain A pb 5.3. MULTIPLE-FEEDBACK BAND-PASS FILTER 115 C1 Vi R3 C2 R1 − G Vo + R2 R0 Figure 5.10: Multiple-feedback band-pass filter. ω0 = √ ω2 ω1 ω0 Q = ω2 − ω1 A pb < 2Q2 Set the same value C for the two capacitors and compute the resistance values Q ω0 CA pb Q = ω0 C (2Q2 − A pb ) 2Q = ω0 C R2 R3 Verify that R3 < 2Q2 2R1 DR A pb = AF T R1 = See [1] sections 8-4.2, and 8-5.3 for more details. 116 CHAPTER 5. BASIC OP-AMP APPLICATIONS 5.4 Peak and Peak-to-Peak Detectors The peak detector circuit is shown in Figure 5.11. The basic ideal is to implement an integrator circuit with a memory. To understand the circuit letŽs first short circuit Do and remove R. Then the Op-amp A0 is just a unitary gain voltage follower that charges the capacitor C up to the peak voltage. The function of D0 and of A1 (high input impedance) is to prevent the fast discharge of the capacitor. Because of D0 the voltage across the capacitor is not the max voltage at the input, and this will create a systematic error at the output vo . Placing a feedback from vo to vi will fix the problem. In fact, because v+ must be equal to v− , A0 will compensate for the difference. Introducing the resistance (R ≃ 100kΩ) in the feedback will provide some isolation for vo when vi is lower than vC . The Op-Amp A0 should have a high slew rate (~20 V/µs) to avoid the maximum voltage being limited by the Op-Amp slew rate. The capacitor doesn’t have to limit the Op-Amp A0 slew rate S, i. e. iC dv ≪ =S C dt DR 5.5 Zero Crossing Detector AF T It is worthwhile to notice that if D0 and D1 are reversed the circuit becomes a negative peak detector. The technology of the hold capacitor C is important in this application. The best choice to reduce leakage is probably polypropylene, and after that polystyrene or Mylar. Using a positive and a negative peak detector as the input of a differential amplifier stage we can build a peak-to-peak detector (for more details see [1] section 9-1). Some things to check: holding time (a given % drop from the maximum) versus capacitor technology, systematic errors , settling time required for the output to stabilize. When vi is positive and because it is connected to the negative input then vo becomes negative and the diode D1 is forward biased and conducting. 5.6. ANALOG COMPARATOR 117 R D1 − D0 − vi A A vC vo + + C0 RESET Figure 5.11: Peak detector circuit. 5.6 Analog Comparator An analog comparator or simply comparator is a circuit with two inputs vi , vre f and one output vo which fulfills the following characteristic: vo = V1 , vi > vre f V2 , vi ≤ vre f AF T An Op-Amp with no feedback behaves like a comparator. In fact, if we apply a voltage vi > vre f , then V+ − V− = vi − vre f > 0. Because of the high gain, the Op-Amp will set vo to its maximum value +Vsat which is a value close to the positive voltage of the power supply. If vi < vre f , then vo = −Vsat . The magnitude of the saturation voltage are typically about 1V less than the supplies voltages. Depending on which input we use as voltage reference vre f , the Opamp can be an inverting or a non inverting analog comparator. DR It is worthwhile to notice that the analog comparator circuit is also a 1 bit analog digital converter , which converts voltages to the two levels V1 and V2 . CHAPTER 5. BASIC OP-AMP APPLICATIONS 118 Vi − V1 Vo + R+ Rf (utp) V+ t (ltp) V+ +Vsat t −Vsat Figure 5.12: Schmitt Trigger and its qualitative response to a signal that swings up and down between and through the saturation voltages ±Vsat . AF T 5.7 Regenerative Comparator (The Schmitt Trigger) 1 Otto DR The Regenerative comparator or Schmitt Trigger1 shown in Figure 5.12 is a comparator circuit with hysteresis. It is important to notice that the circuit has a positive feedback. With positive feedback, the gain becomes larger than the open loop gain making the comparator to swing faster to one of the saturation levels. Herbert Schmitt (1913-1998) American scientist considered the inventor of this device, that appeared in an article in 1938 with the name of "thermionic trigger"[3]. 5.8. PHASE SHIFTER 119 Considering the current flowing through R+ and R f ,we have I= V+ − Vo V1 − V+ , = R+ Rf ⇒ V+ = V1 R f + Vo R+ . R f + R+ The output Vo can have two values, ±Vsat . Consequently, V+ will assume just two trip points values (utp) V+ = V1 R f + Vsat R+ R f + R+ (ltp) V+ (utp) = V1 R f − Vsat R+ R f + R+ (ltp) When Vi < V+ , Vo is high, and when Vi < V+ To set V+ = 0 it requires that V1 = − , Vo is low. R+ Vo Rf This circuit is usually used to drive an analog to digital converter (ADC). In fact, jittering of the input signal due to noise which prevents from keeping the output constant, will be eliminated by the hysteresis of the Schmitt trigger (values between the trip points will not affect the output). See [1] section 11 for more detailed explanations. Example1: (Vsat = 15V) 5.8 Phase Shifter AF T Supposing we want to have the trip points to be V+ = ±1.5V, if we set V1 = 0 then R f = 9R+ . DR A phase shift circuit shown in Figure 5.13, produces a sinusoidal signal at the output Vo which is equal to the sinusoidal input Vi with a defined phase shift . The basic idea of this clever circuit is to subtract using an Op-Amp two equal sinusoids one of which is lagging behind because is low pass filtered (the difference of these two same frequency sinusoid is a phase shifted attenuated sinusoid). The Op-Amp provides also the unitary gain. CHAPTER 5. BASIC OP-AMP APPLICATIONS 120 R0 R0 − Vi Vo + C R Figure 5.13: Phase shifter circuit. Using the same method applied to compute the differential Op-Amp stage transfer function, we obtain H (ω ) = 1 − jωRC , 1 + jωRC The amplitude and phase of the transfer function are therefore H (ω ) = 1 for any frequency, ϕ(ω ) = arctan (−ωRC) − arctan (ωRC) = −2 arctan (ωRC) . Example AF T The phase shift is double the one of a simple low pass filter and therefore can go from 0◦ down to −180◦ . Exchanging the potentiometer and the capacitor changes the phase lag to a phase lead. Supposing that we want a phase shift of −90◦ for a 1 kHz sinusoid with capacitor with a reasonable capacitance value C = 10 nF, then − tan Cω 2 = 10−8 1 = 15.915 kΩ. · 2π · 103 DR R= ϕ The value of R0 can be in the range of few kilohoms to tens kilohoms. 5.9. GENERALIZED IMPEDANCE CONVERTER (GIC) 121 5.9 Generalized Impedance Converter (GIC) A Z1 + A − Z2 Z Z3 + − Z4 Z5 Figure 5.14: Generalized Impedance Converter (GIC). The fundamental equation of the GIC, which can be found after tedious calculation, is Z Z3 Z5 Z= 1 Z2 Z4 • C to L converter and vice versa, • impedance scaler • negative resistance DR • LC parallel to LC series and vice versa, AF T By a careful choice of passive components, one can implement types of impedance with values impossible to attain with standard passive components. This holds true where the Op-Amps behave very closely to ideal Op-Amps and if one lead of Z is grounded. For example, we can make: CHAPTER 5. BASIC OP-AMP APPLICATIONS 122 This circuit is also a gyrator, i.e. a two voltage controlled current sources, where the currents have opposite direction. For more details consult [7]. 5.9.1 Capacitor to Inductor Converter If we choose, for example, Z1 = Z2 = R1 , Z3 = R3 , Z4 = 1 , jωC Z5 = R5 , then the GIC becomes Z = jωR3 R5 C . DR AF T The circuit will behave as an inductor with inductance L = R3 R5 C. If we chose large resistance values R3 , R5 and reasonably large capacitance values C, we can implement very large inductance values practically impossible to attain using standard inductors. 5.10. PROBLEMS PREPARATORY TO THE LABORATORY 123 5.10 Problems Preparatory to the Laboratory 1. Considering the following circuit, determine the voltage output Vo for the following input voltages Vi = −2V, 1V, 1.5V, 3V +10V Vi − Vo G +1.5V + −10V 2. Consider the Schmitt trigger of Figure 5.12. (a) If Vo = −15V and V+ = 0V, compute V1 . (b) If Vo = +15V, and V1 = 15V, compute V+ . 3. Design a Schmitt trigger with two diode clamps and one resistor connected to the output. (a) Limit the output Vo from 0 to 5V. (b) Compute the resistance value R necessary to limit the diode current to 10mA. 4. What is the practical maximum and minimum output voltage of the logarithmic amplifier in Figure 5.6? DR AF T 5. Chose and study at least two circuits to study and design, one from this chapter and one form the next one on active filters . New circuits different than those ones proposed in this chapter are also welcome. For a good source of new circuits based on Op-Amps see [1] , [4], and [2]. AF T CHAPTER 5. BASIC OP-AMP APPLICATIONS DR 124 Bibliography [1] Luces M. Faulkenberry, An introduction to Operational Amplifiers with Linear IC Applications, Second Edition. [2] Charles Kitchin and Lew Counts, A Designer’s Guide to Instrumentation Amplifiers (2nd Edition), Analog Devices (http://www.analog.com/en/DCcList/0,3090,759%255F%255F42,00.html) [3] Theory and Applications of Logarithmic Amplifiers, National Semiconductors, AN-311 ( http://www.national.com/an/AN/AN311.pdf ). [4] Horowitz and Hill, The Art of Electronics, Second Edition [5] Microelectronics Jacob Millman & Arvin Grabel, McGraw-Hill Electrical Engineering Series [6] A thermionic trigger, Otto H Schmitt 1938 J. Sci. Instrum. 15 24-26. 125 DR AF T [7] Sedra Smith, Microelectronics Circuits, third edition, Oxford University Press. BIBLIOGRAPHY DR AF T 126 Chapter 6 Active Filters Introduction An electronic circuit that modifies the frequency spectrum of an arbitrary signal is called filter. A filter that modifies the spectrum producing amplification is said to be an active filter. Vis à vis its definition, it is convenient to study the filter characteristics in terms of the frequency response of its associated two port network H (ω ) = Vo (ω ) , Vi (ω ) where Vi and Vo are respectively the input voltage and the output voltage of the network, and ω the angular frequency. Depending on the design, active filters have some important advantages: AF T • they can provide gain, • they can provide isolation because of the typical characteristic impedances of amplifiers, • they can be cascaded because of the typical characteristic impedances of amplifiers, Here some disadvantages: 127 DR • they can avoid the use of inductors greatly simplifying the design of the filters. CHAPTER 6. ACTIVE FILTERS 128 • they are limited by the amplifiers’ band-with, and noise, • they need power supplies, • they dissipate more heat than a passive circuit. Let’s make some simple definitions useful to classify different types of filters. 6.1 Classification of Ideal Filters Based on their magnitude response | H (ω )|, Some basic ideal filters can be classified as follows: |H(ω)| 1 |H(ω)| 1 0 ω0 ω 0 ω0 Low-pass ω High-pass |H(ω)| |H(ω)| 1 1 0 0 ω1 ω Band-pass |H(ω)| 1 0 Notch ω DR ω0 ω0 ω1 Stop-band/band-reject ω AF T ω0 Practical filters approximate more or less the ideal definitions. 6.2. FILTERS AS RATIONAL FUNCTIONS 129 DA1 A1 DA3 A3 DA2 A2 ω1 ω2 ω3 ω4 ω 5 ω 6 ω 7ω 8 ω Figure 6.1: Graphical definition of the filter performance specifications, and hypothetical filter response (red curve) that satisfy the specification. Usually, the filter requirements are specified defining the band frequencies with their gains (attenuation or amplification) gain ripples, and slope transitions in terms of power of the frequency. Figure 6.1 shows a quite general graphical definition of the design parameters of a filter with an hypothetical design. For a complete specification one should also define the requirement for phase response. 6.2 Filters as Rational Functions Let’s consider filters whose transfer function can be expressed as rational function or standard form β 0 + β 1 jω + β 2 ( jω )2 + . . . + β M ( jω ) M For the filter not to diverge M≥N ⇒ . AF T H (ω ) = α0 + α1 jω + α2 ( jω )2 + . . . + α N ( jω ) N | H (ω )| < ∞ for any value of ω DR Writing the transfer function as a polynomial factorization we obtain ( ω − z1 ) n 1 ( ω − z2 ) n 2 . . . ( ω − z N ) n N H (ω ) = k ( ω − p 1 ) m1 ( ω − p 2 ) m2 . . . ( ω − p M ) m M CHAPTER 6. ACTIVE FILTERS 130 Denominator roots p1 , p2 , . . . , pn are called poles, and numerator roots z1 , z2 , . . . , zm are called zeros. The integers n1 , n2, . . . , n N , and m1 , m2, . . . , m N are therefore the multiplicity of poles and zeros. Poles and zeros values determine the shape of the filter, and apart from zero frequency, one could say that poles provide attenuation and zeros amplification. The transition from transmission to attenuation, and vice versa, in the filter magnitude | H (ω )| is characterized by an asymptote slope which determine the so called filter order. For example, considering the RC low pass filter with ω0 = 1/RC, we have one pole p1 = jω0 H (ω ) = ω0 ⇒ first oder low pass filter with cut-off freq. ω0 ω0 + jω For the RC high pass filter with ω0 = 1/RC, we have one pole p1 = jω0 and one zero z1 = 0 H (ω ) = ω ⇒ first oder high pass filter with cut-off freq. ω0 ω0 + jω AF T In the next sub-sections, we will analyze into more details filters with the following transfer function ω1 + ω12 Q1 H (ω ) = H0 ω −ω2 + jω 0 + ω02 Q DR −ω2 + jω 6.2. FILTERS AS RATIONAL FUNCTIONS 131 6.2.1 Second Order Low-Pass Filter Figure below shows the second order low pass filter bode plot, with resonant frequency ωres , and characteristic frequency ω0 Hmax Filter ωres Magnitude [dB] 10 ω0 0 −10 −20 −30 −40 2 10 ωres ω0 103 10 ωres ω0 103 Frequency [rad/s] 10 4 Phase [Deg] 0 −50 φres −90 −100 −150 2 10 4 ω02 H0 ω −ω2 + jω 0 + ω02 Q Resonance ω0 r 1− 1 2Q2 Maximum H0 r Q 1 1− 4Q2 DC Gain High Freq. Gain H0 0 DR Transfer Function AF T The second order low-pass filter written in standard form CHAPTER 6. ACTIVE FILTERS 132 6.2.2 Second Order High-Pass Filter Magnitude [dB] Hmax 10 Filter ωres ω0 0 −10 −20 −30 2 3 10 4 ω0 ωres10 10 ω0 ωres103 Frequency [rad/s] 10 Phase [Deg] 150 100 90 φres 50 0 2 10 4 H0 ω2 ω −ω2 + jω 0 + ω02 Q Resonance ω0 r 1 1− 2Q2 Maximum H0 r Q 1 1− 4Q DR Transfer Function AF T The second order high-pass filter written in standard form DC High Freq. Gain Gain 0 H0 6.2. FILTERS AS RATIONAL FUNCTIONS 133 6.2.3 Band-Pass Filter Hmax5 Filter ωres Magnitude [dB] 0 ω0 −5 −10 −15 −20 −25 −30 2 3 10 4 ω0ωres 10 10 ω0ωres 103 10 Phase [Deg] 50 φres 0 0 −50 2 10 4 Frequency [rad/s] AF T The band-pass filter written in standard form is Transfer Function Resonance Maximum DC Gain High Freq. Gain ω0 Q H0 ω −ω2 + jω 0 + ω02 Q ω0 H0 0 0 DR jω CHAPTER 6. ACTIVE FILTERS 134 For example, depending on the output we consider, the already studied LRC series circuit is a low-pass, a band-pass, or a high-pass filter with the transfer function described above. When we will study difference filters topologies we will reduce their transfer function into one of the standard form above. 6.3 Common Circuit Filters Topologies This is a brief and not exhaustive at all list of filter topologies that use resistors, capacitors, and operational amplifiers to implement the filters types described above: • Infinite gain, multiple feedback (IGMF) • State Variable (SV) DR • Switched Capacitor Filters (SC) AF T • Generalized Sallen-Key (GSK) Cascading these implementation allows to increase the filter order. 6.4. INFINITE GAIN MULTIPLE FEEDBACK CONFIGURATION (IGMF)135 6.4 Infinite Gain Multiple Feedback Configuration (IGMF) I4 Vi Y4 Y5 I3 I1 A VA Y1 Y3 B V− V+ I2 Y2 − Vo + Figure 6.2: Infinite Gain Multiple Feedback Filter. Let’s consider the circuit in Figure 6.2 with generic admittances Y1 , Y2 , Y3 , Y4 , and Y5 . Applying the KCL to node A and considering the circuit virtual ground (V− = 0), we have VA Y3 + (Vo − VA ) Y4 + (Vi − VA ) Y1 + VA Y2 = 0 . (6.1) Again, applying KCL to node B and for the virtual ground we have Vo Y5 + VA Y3 = 0 ⇒ VA = − Y5 Vo Y3 AF T Replacing the last expression into eq. 6.1 and after some algebra we obtain the generic transfer function for the circuit Vo Y1 Y3 . =− Vi Y5 (Y1 + Y2 + Y3 + Y4 ) + Y3 Y4 DR Choosing the proper type of admittances we can construct different types of active filters, low-pass band-pass, and high-pass. It is worthwhile noticing that IGMF configuration allows to implement low-pass, bandpass, and high-pass filter with capacitors, resistor and no inductors. This simplifies considerably the design of the filters. CHAPTER 6. ACTIVE FILTERS 136 6.4.1 Low-pass Filter C5 R4 Vi R1 R3 − Vo G + C2 Figure 6.3: Low-pass filter configuration of the infinite gain multiple feedback filter. A possible choice to implement a low-pass filter as shown in Figure 6.3 is Y1 = 1 , R1 Y2 = jωC2 , Y3 = 1 , R3 1 , Y5 = jωC5 , R4 and the transfer function of the circuit becomes 1/R1 R3 Vo . =− Vi jωC5 (1/R1 + jωC2 + 1/R3 + 1/R4 ) + 1/R3 R4 Y4 = Vo = Vi − −ω2 1 R1 R3 C2 C5 AF T Rearranging the expression to obtain a rational fraction in ω we finally obtain 1 1 + jω (1/R1 + 1/R3 + 1/R4 ) + C2 R3 R4 C2 C5 . DR Comparing the denominator of the previous equation with the denominator of the transfer function in section 6.2.1 we find that the frequency ω0 , the quality factor Q, and the DC gain H0 are respectively s C2 R4 1 , Q = ω0 . , H0 = − ω0 = R3 R4 C2 C5 R1 (1/R1 + 1/R3 + 1/R4 ) 6.4. INFINITE GAIN MULTIPLE FEEDBACK CONFIGURATION (IGMF)137 6.4.2 High-pass Filter C4 Vi C1 R5 C3 − Vo G + R2 Figure 6.4: High-pass filter configuration of the infinite gain multiple feedback filter. A possible choice to implement a high-pass filter as shown in Figure 6.4is Y1 = jωC1 , Y2 = 1 , R2 Y4 = jωC4 , Y5 = 1 , R5 Y3 = jωC3 , and the transfer function of the circuit becomes Vo jωC1 jωC3 . = −1 1 /R5 ( jωC1 + /R2 + jωC3 + jωC4 ) + jωC3 jωC4 Vi Rearranging the expression to obtain a rational fraction in ω we obtain −ω2 (−C1/C4 ) . 1 1 + −ω2 + jω (C1 + C3 + C4 ) R5 C3 C4 R2 R5 C3 C4 AF T Vo = Vi DR Comparing the denominator of the previous equation with the denominator of the transfer function in section 6.2.2 we find that the frequency ω0 , the quality factor Q, High frequency gain H∞ are respectively s 1 R5 C3 C4 C1 , Q = ω0 , H∞ = − . ω0 = R2 R5 C3 C4 C4 (C1 + C3 + C4 ) CHAPTER 6. ACTIVE FILTERS 138 6.4.3 Band-pass Filter C4 Vi R1 R5 C3 − Vo + R2 Figure 6.5: Band-pass filter configuration of the infinite gain multiple feedback filter. A possible choice to implement a Band-pass filter is shown in Figure 6.5. The admittances are 1 1 , Y3 = jωC3 , , Y2 = Y1 = R1 R2 1 , R5 and the transfer function of the circuit becomes Vo jωC3 /R1 = −1 . 1 1 Vi /R5 ( /R1 + /R2 + jωC3 + jωC4 ) + jωC3 jωC4 Y4 = jωC4 , Y5 = DR AF T Rearranging the expression to get a rational fraction in ω we finally obtain C3 + C4 jω Vo R5 R5 C3 C4 =− . C3 + C4 R1 + R2 Vi R1 2 −ω + jω + C3 C4 R5 R1 R2 R5 C3 C4 Comparing the denominator of the previous equation with the denominator of the transfer function in section 6.2.3 we find that the resonance frequency, and the quality factor are respectively s R1 + R2 R5 C3 C4 R5 ω0 = , Q = ω0 , H0 = − R1 R2 R5 C3 C4 C3 + C4 R1 6.5. GENERALIZED SALLEN-KEY FILTER TOPOLOGY (GSK) 139 6.5 Generalized Sallen-Key Filter Topology (GSK) I4 Vi Y4 I3 I1 Y1 A VA B V+ I3 Y3 V− Y2 C I5 Y5 + Vo − Y6 I6 Figure 6.6: Generalized Sallen-Key Topology. Let’s consider the circuit in Figure 6.6 with generic admittances Y1 , Y2 , Y3 , Y4 , Y5 , and Y6 . Applying the KCL to node A , we have (Vi − VA ) Y1 + (Vo − VA ) Y4 + (V+ − VA ) Y2 = 0 . (6.2) Applying KCL to node B (V+ − VA ) Y2 + V+ Y3 = 0 ⇒ VA = Y2 + Y3 V+ . Y2 Applying KCL to node C ⇒ V− = V+ = Y6 V0 . Y6 + Y5 AF T (V0 − V− ) Y6 − V− Y5 = 0 DR Replacing the expression found for VA , and V+ into eq. (6.2) and after quite some boring algebra, we obtain Y1 Y2 Y6 Y5 Vo = 1+ . Vi Y6 Y1 Y6 (Y2 + Y3 ) + Y3 Y6 (Y2 + Y4 ) − Y2 Y4 Y5 Let’s analyze some admittances’ configuration of the this filter topology. CHAPTER 6. ACTIVE FILTERS 140 6.5.1 GSK Second Order Low-pass Filter C4 R1 Vi R2 Vo + − C3 R6 R5 Figure 6.7: Low-pass filter configuration of the Generalized Sallen-Key filter. A possible choice to implement a low-pass filter as shown in Figure 6.7 is Y1 = 1 , R1 Y4 = jωC4 , Y2 = 1 , R2 Y5 = 1 , R5 Y3 = jωC3 , Y6 = 1 , R6 and the transfer function of the circuit becomes 1+ R6 R5 1 R1 R2 C3 C4 . 1 1 1 1 R6 2 −ω + jω + + − R1 C4 R2 C4 R2 C3 R5 R1 R2 C3 C4 AF T Vo = Vi DR Comparing the denominator of the previous equation with the denominator of the transfer function in section 6.2.1we find that the frequency square ω02 , the quality factor Q, and the DC gain H0 are respectively 1 R1 R2 R5 C3 C4 R6 2 ω0 = . , Q = ω0 , H0 = 1 + R1 C4 R2 C3 R5 ( R1 + R2 ) C3 − R1 R6 C4 R5 6.5. GENERALIZED SALLEN-KEY FILTER TOPOLOGY (GSK) 141 6.5.2 Simple Case If R1 = R2 = R, C3 = C4 = C, and R5 = R6 = 0, then ω02 Vo , = Vi −ω2 + jωω0 + ω02 ω02 = 1 R2 C 2 , ,Q = 1, which is the transfer function of a second order low-pass filter with low quality factor. 6.5.3 GSK Second Order High-pass Filter R4 Vi C2 C1 Vo + − R3 R6 R5 AF T Figure 6.8: High-pass filter configuration of the Generalized Sallen-Key filter. To implement a low-pass filter as shown in Figure 6.8 one needs to choose the admittances as follows Y4 = 1 , R4 Y2 = jωC2 , Y5 = 1 , R5 Y3 = 1 , R3 Y6 = 1 , R6 DR Y1 = jωC1 , and the transfer function of the circuit becomes CHAPTER 6. ACTIVE FILTERS 142 Vo = Vi R6 1+ R5 −ω² + jω −ω2 1 1 R6 1 + − R3 C2 R3 C1 R4 C1 R5 1 + R3 R4 C1 C2 . Comparing the denominator of the previous equation with the denominator of the transfer function in section 6.2.2 we find that the frequency square ω02 , the quality factor Q, and the DC gain H0 are respectively 1 R3 R4 R5 C1 C2 R6 2 ω0 = . , Q = ω0 , H0 = 1 + R3 C1 R4 C2 R5 (C1 + C2 ) R3 − C1 R6 R4 R5 6.5.4 Simple Case If R1 = R2 = R, C3 = C4 = C, and R5 = R6 = 0, then Vo −ω2 , = Vi −ω2 + jωω0 + ω02 ω02 = 1 , R2 C 2 ,Q = 1, which is the transfer function of a second order high-pass filter with low quality factor. 6.5.5 GSK Band-pass Filter R4 R1 C2 AF T Vi Vo + − R3 C3 R6 DR R5 Figure 6.9: Band-pass filter configuration of the Generalized Sallen-Key filter. 6.5. GENERALIZED SALLEN-KEY FILTER TOPOLOGY (GSK) 143 To implement a band-pass filter as shown in Figure 6.9 one needs to choose the admittances as follows Y1 = 1 , R1 Y4 = 1 , R4 Y2 = jωC2 , Y5 = Y3 = 1 , R5 1 + jωC3 , R3 Y6 = 1 , R6 and the transfer function of the circuit becomes Vo = Vi 1+ R6 R5 jω R1 C3 . R 1 R1 + R4 1 1 C + C 6 2 3 2 + + + − −ω + jω C2 C3 R1 C3 R3 C2 R4 C3 R4 R5 C2 C3 R1 R3 R4 Comparing the denominator of the previous equation with the denominator of the transfer function in section 6.2.3 we find that the frequency square ω02 , the quality factor Q, and the DC gain H0 are respectively C2 C3 R1 R3 R4 R5 , (C2 + C3 ) R3 R4 R5 + C2 R1 R4 R5 + C3 R1 R3 R5 − C2 R1 R3 R6 ω02 R1 + R4 1 = ,H0 = C2 C3 R1 R3 R4 R1 C3 R6 1+ R5 6.5.6 Simple Case Q . ω0 AF T Q = ω0 If R1 = R3 = R4 = R, C2 = C3 = C, and R5 = R6 = 0, then √ 2 , ω0 = RC ,Q = √ 2 , 3 DR ω0 Vo Q , = ω Vi −ω2 + jω 0 + ω02 Q jω which is the transfer function of a second order high-pass filter with low quality factor. CHAPTER 6. ACTIVE FILTERS 144 6.6 State Variable Filter Topology (SV) The state variable filter provides a low pass, a band pass, and a high pass filter outputs. At the same time, it allows to change the gain, the cut-off frequencies, and the quality factor independently, but it requires 4 OpAmps. Vi R1 R2 R3 − G C1 R4 VHP + VBP − C2 R5 − G VLP G + + R6 R7 Figure 6.10: State variable filter circuit. 6.7 Practical Considerations 6.7.1 Component Values AF T TBF How do we select the values of capacitance and resistance? Here are some considerations that should help the filter design: DR • reducing the resistance values reduces the thermal noise and therefore the filter noise, • reducing resistance values minimizes the op-amp voltage offsets, 6.7. PRACTICAL CONSIDERATIONS 145 • increasing the resistance reduce the current load on the op-amps, • increasing the resistances usually allows to decrease the capacitance and therefore it make easier to find capacitors because of the small capacitance values needed, • reducing the capacitance minimizes the capacitance fluctuations due to temperature, • increasing the capacitance allows to reduce resistance values and therefore the thermal noise. As we can clearly see, some of the consideration cannot be used at the same time. Based on the design requirements one can decide which of the consideration above are more important to finally meet the design requirements. Rules of Thumb Particularly critical design often overrule these following rules: • Capacitor with capacitance less of ~100 pF should be avoided, • Try to use resistor with resistance between few kilo-ohms to few hundreds of kilo-ohms. 6.7.2 Components technology Capacitors Resistor AF T The use of low loss dielectric is very important to obtain good results. If possible one should use plastic film capacitors or C0G/NPO ceramic capacitors, 1% tolerance for temperature stability. DR Low thermal noise resistors such as metal film resistors 1% tolerance for temperature stability should be used. AF T CHAPTER 6. ACTIVE FILTERS DR 146 Bibliography 147 DR AF T [1] Hank Zumbahlen, State Variable Filters, Mini Tutorial MT-223, Analog Devices BIBLIOGRAPHY DR AF T 148 Chapter 7 Basics on Oscillators 7.1 Introduction AF T Waveform generators are circuits which provide a periodic signal with constant frequency, phase, and amplitude. The quality of these devices are measured by the frequency stability, amplitude stability, and absence of distortion. The last characteristics is essentially cleanness of the spectrum signal. For example, the spectrum of a perfect sinusoidal oscillator must be a delta of Dirac at the oscillating frequency. Practically, sinusoidal oscillators has a sharp narrow peak at the oscillation frequency, and other less taller peaks at different frequencies, mainly at multiples of the oscillation frequency (harmonics ). In this chapter we will study the criterion to sustain a sinusoidal oscillation with a positive feedback amplifier, the so-called Barkhausen criterion, and some simple circuit to produce different waveforms. Direct Digital Synthesis[1], a more versatile and effective technique to produce arbitrary waveforms, is out of the scope of these simple notes. 7.2 Barkhausen Criterion DR Let’s consider an ideal amplifier with a positive feedback network as show in figure 7.1. Considering that the summation point output is Vi + β(ω )Vo , 149 CHAPTER 7. BASICS ON OSCILLATORS 150 Vi + β Vo Vi Vo A(ω) βVo β(ω) Figure 7.1: Amplifier with positive feedback and the amplifier gain is A(ω ), the output voltage will be Vo = A(Vi + βVo ), Collecting Vo we will finally have Vo = A Vi . 1 − βA For | β(ω ) A(ω )| = 1, arg [ β(ω ) A(ω )] = 0, 360, ... ℜ[ βA] = 1, AF T the output Vo diverges. If the previous condition is satisfied for the angular frequency ω0 , any excitation at the frequency ω0 will make the output to oscillate at the frequency ω0 with infinite amplitude. If Vi goes to zero as fast as 1 − βA then the output will theoretically oscillate at the frequency ω0 with amplitude A. The previous condition which can be rewritten as ℑ[ βA] = 0 (7.1) DR is the so called Barkhausen criterion for the oscillation. The term βA is called the open loop gain or simply loop gain since that is exactly the gain of the loop in the feedback amplifier network when the loop is open at the summing point. In the discussion of the oscillator circuits, we will assume that the amplifier is able to deliver the required positive or negative gain without adding any additional phase. In the general case, this is clearly a crude approximation, but it is used here just to simplify the study of the circuits. 7.2. BARKHAUSEN CRITERION 151 7.2.1 Gain Stability Oscillators with exactly unitary open loop gain at a given frequency and input Vi equal to zero at any time are just a mere mathematical abstraction. In real circuits, there will always be some noise at ω0 and the gain cannot be kept absolutely stable. For example, external perturbations, drifts due to temperature, and components aging would make these two conditions impossible to keep. Practically, it is necessary to have a loop gain βA somewhat larger than unity to start and sustain the oscillation. This can lead to a slow drift of the oscillation amplitude, and in the worst case, the oscillation can even saturate or stop. It is worthwhile to notice that large values of the amplifier gain A, that produce saturation at the output, can be used to generate squares or pulse waves. Moreover, cascading a proper filtering stage, one can select just one frequency and make a quite amplitude stable sinusoidal generator. 7.2.2 Automatic Gain Control (AGC) 7.2.3 Oscillation Kick-start AF T To properly sustain the oscillation in case of temperature drifts, we need to add to the positive feedback path another feedback loop this time negative to stabilize the gain. This path often called Automatic Gain Control (AGC) circuit can be done using temperature sensitive components. For example, semiconductor diodes, transistors, or even incandescent bulbs, whose resistivity increases or decreases with temperature can be used in the AGC. DR We don’t have to provide an initial kick to start the oscillation. This is true, because every time we turn on a circuit on or we toggle a switch, a step like perturbation propagates through the circuit providing an initial excitation at the right frequency. Moreover, the probability to have a small signal perturbation ( due to the omnipresent noise ) at the right frequency is usually quite high. CHAPTER 7. BASICS ON OSCILLATORS 152 VDD RD C C C Vo Vo Vi Q0 gmVi R R R rd RD RS Figure 7.2: Phase shift oscillator using a JFET as amplification stage (left gray rectangle) and a phase shift network (right gray rectangle). The circuit on the left represents the low frequency model of the JFET amplifier. 7.2.4 Frequency Stability 7.3 Phase Shift Oscillator AF T The frequency stability of an oscillator is a quite complex topic of study. Here we can simply say that it depends mainly on the ability of the circuit to maintain the loop gain phase constant to 0◦ or to multiples of 360◦ . Phase fluctuations will therefore introduce noise in the oscillator frequency. DR The phase shift oscillator exemplifies the concepts set forth above. Referring to figure 7.2, we can distinguish the JFET amplifier stage and the positive feedback network made of three cascaded RC phase shifting filters. Supposing that the amplifier load ZL is negligible, i.e. | ZL | ≫ RD ||rd then, the amplifier will just change sign (180◦ ) to any signal injected in the gate. The network feedback will provide additional phase shift to satisfy the Barkhausen criterion at a given angular frequency ω0 . 7.4. THE WIEN-BRIDGE OSCILLATOR 153 It can be proved that β(ω ) = Vi = Vo 1− 5 (ωτ )2 +j 1 1 (ωτ )3 6 ωτ − τ = RC , (7.2) The amplifier gain, supposed to be constant is A = − gm RD , where gm is the JFET amplifier gain. Imposing the condition ℑ[ βA] = 0, we get 1 1 ω0 = √ . 6τ Replacing the previous expression in the open loop gain Aβ and using the second condition ℜ [ βA] = 1, we get gm RD = 29 To sustain the oscillation, the amplifier must have a gain of at least 29/RD . 7.4 The Wien-Bridge Oscillator The Wien Bridge Oscillator show in figure 7.3, uses a differential amplifier to provide positive and negative feedback to satisfy the two condition of oscillation. Referring to figure 7.3 , setting YC = 1/ ( jωC) , and thanks to the voltage divider equation we can write R + YC + and β(ω ) = RYC YC + R Vo = 1 (YC + R) RYC 2 1 V+ = Vo 3 + j ωτ − Vo = +1 1 ωτ 1 YC R AF T V+ = RYC YC + R + R YC +3 Vo τ = RC. ωτ − 1 = 0, ωτ ⇒ DR The oscillation will happen where the phase shift is zero, i.e. for ω0 = 1 . τ CHAPTER 7. BASICS ON OSCILLATORS 154 Rf Vo R− − V+ Vo A R Rf C + V− R V+ R C R− C R C Figure 7.3: Wien Bridge oscillator, and components rearrangement to show the bridge topology. The angular oscillation frequency ω0 depends on the inverse of the resistance R and the capacitance C. Because the attenuation at the resonant frequency is V+ 1 = . Vo 3 Rf Vo‘ = 1+ . V+ R− AF T the negative feedback must have a theoretical gain of A(ω0 ) = 3. The resistances R− and R f must be given by the usual equation DR The oscillation frequency can be continuously tuned using coupled variable resistors. To minimize distortions due to the Op-amp saturation when the gain is larger than one, it is required to provide a circuit with variable gain. Essentially, we need an overall gain larger than one for small signal to sustain the oscillation and gain of about 1 or less for large signal to avoid distortion. The negative feedback path shown in figure 7.4 does the job. 7.5. LC OSCILLATOR 155 D1 D0 Rf Rf Figure 7.4: Automatic gain control circuit for the Wien bridge oscillator negative feedback. For large signals one of the diodes becomes forward biased reducing the feedback resistance and the Op-Amp gain. For smaller signal the gain is not affected by the diodes. Practically, Wien Bridge oscillators are used in the kilohertz region with a variable range up to ~10 times ω0 . 7.5 LC Oscillator A quite general form of oscillator circuits is depicted in figure 7.5. In this case it is not straightforward to separate the oscillating feedback network and the amplifier itself. Let’s suppose that the amplifier is ideal but has a non zero output resistance Ro . Referring to figure 7.5 we have β= Vi . V0∗ Vo = or Z V0∗ , Z + Ro Z = Z2 || ( Z1 + Z3 ) , DR and AF T Applying the voltage divider equation twice we have the two equations Z1 Vo Vi = Z1 + Z3 Z 1 1 = . ∗ Vo Z + Ro V0 CHAPTER 7. BASICS ON OSCILLATORS 156 Vi Ro Vo* + A Vo Vo − Z3 + A(V+− V− ) Z2 Z3 Vi Z2 − I=0 Z1 Z1 Figure 7.5: LC Oscillator circuit using an ideal Op-Amp with non zero output impedance Ro and its equivalent ideal circuit. Note that the feedback loop is connected to the negative input of the amplifier, and therefore to get a positive loop feedback the feedback network has to flip the signal phase by 180◦ . After some algebra we finally get β= Z1 Z2 . Ro ( Z1 + Z2 + Z3 ) + Z2 (Z1 + Z3 ) (7.3) Let’s consider the case of the LC tunable oscillators, i.e. the impedances are purely reactive (real part equal to zero) Zi = jXi , Xi > 0 for i = 1, 2, 3 β= For β to be real AF T Then the previous eq. (7.3) becomes − X1 X2 . jRo ( X1 + X2 + X3 ) − X2 (X1 + X3 ) X1 + X2 + X3 = 0 , and X1 , X1 + X3 DR β ( ω0 ) = where ω0 is the oscillation frequency. Using the two previous equation we finally get 7.6. CRYSTAL OSCILLATOR 157 X β ( ω0 ) = − 1 X2 ⇒ AOL X = −A − 1 X2 . Since AOL must be positive and A > 0, then X1 and X2 must have same sign. For example they have be both capacitors or inductors. From the condition of imaginary part equal to zero we find that if X1 and X2 are capacitors, then X3 must be an inductor, and vice versa. Here is the oscillator circuit name depending on the choice of the reactance: • Colpitts Oscillator: X1 and X2 capacitive reactances and X3 an inductive reactance ( X1,2 = −1/(ωC1,2 ), X3 = ωL3 ). The oscillator angular frequency and the gain in this case are v u 1 C2 u , ω0 = t β ( ω0 ) = C1 C2 C1 L 3 C1 + C2 • Hartley oscillator: X1 and X2 inductive reactances and X3 a capacitive reactance ( X1,2 = ωL1,2 , X3 = −1/(ωC3 )). The oscillator angular frequency and the gain in this case will be s 1 L ω0 = , β ( ω0 ) = 1 C3 ( L1 + L2 ) L2 7.6 Crystal Oscillator AF T Using a BJT amplifier we can usually obtain higher oscillating frequency than using standard operational amplifiers. In this case the high frequency hybrid-π model[2] must be used to properly model the transistor behavior. Moreover, the BJT amplifier low input impedance makes the design more complicated. 1 Piezoelectricity DR Crystal oscillators are based on the property of piezoelectricity1 exhibited by some crystals and ceramic materials. Piezoelectric materials change was discovered by Jacques and Pierre Curie in the 1880’s during experiments on quartz. CHAPTER 7. BASICS ON OSCILLATORS 158 C3 L3 C2 C1 L2 L1 Figure 7.6: Colpitts (left) and Hartley (right) feedback circuits β(ω ) for the LC oscillator circuit of Figure 7.5. 2 Mechanical AF T size when an electric field is applied between two of its faces. Conversely, if we apply a mechanical stress, piezoelectric materials generate an electric field. Some crystals have internal mechanical resonances with very high quality factors (quartz can reach quality factors of 104 ) 2 and can be indeed used to generate very stable oscillators. Figure 7.7 shows the circuit symbol for a piezoelectric component and the equivalent circuit modeled using ideal components. Usually, to apply an electric field to a crystals is necessary to make a conductive coating on two parallel faces, and this process creates a capacitor with an interposed dielectric. This explain the presence of the capacitor of capacitance C p in the model. The LCR series circuit accounts for the particular mechanical resonance we want to use to build the oscillator. To design a crystal oscillator it is important to study the reactance ( the imaginary part of the impedance) whose qualitative behavior is shown in figure 7.8. Where the reactance is essentially inductive and very close to the resonance, the crystal behaves as a simple equivalent inductor. We can indeed replace the inductor Ls of the LC oscillator of figure 7.5 with the piezoelectric crystal to build a simple oscillator. Crystal oscillators using a Colpitts configuration and a BJT in commonemitter or common-collector configuration, can work from few kHz up to DR resonance stability depends mainly on the fact that the resonance value is determined by the crystal geometry. It the crystal size slightly depends on the temperature we can have very stable resonators. Active temperature stabilization can clearly improve frequency stability. 7.6. CRYSTAL OSCILLATOR 159 Cs Ls Cp Rs Figure 7.7: Circuit symbol for a piezoelectric oscillator (or quartz oscillator) and the equivalent electronic circuit. The LCR series circuit accounts for the sharp mechanical resonance The capacitor C p in parallel describes the capacitance of the crystal for frequency far for the resonance. X X(ω) Inductive Half Plane Capacitive Half Plane AF T ω DR Figure 7.8: Qualitative behavior of the crystal reactance versus frequency. 160 CHAPTER 7. BASICS ON OSCILLATORS ~100MHz. 7.7 Relaxation Oscillators Relaxation oscillators include a wide class of non-linear systems many of them found in different fields such as mechanics, biology, chemistry, electricity, to just mention a few. Relaxation oscillators are characterized by the following properties: • a non linear mechanism that provides a bistable state, • a relaxation process that creates the transition from one stable state to the other, • a period of oscillation characterized by a relaxation phenomena, i.e. by the time constant of the relaxation process, 7.7.1 Square Wave Generator AF T The canonical example of relaxation oscillator is the seesaw with one bucket on one end and a weight on the other with the bucket continuously filled by a constant water flow. When the bucket is filled, it changes the equilibrium of the seesaw, and the system transitions to the new state of equilibrium. In the new state, the bucket is tilted enough to be emptied and therefore the system transition back to the older state. The seesaw + waterflow is clearly the bistable nonlinear system, and the relaxation process is the emptying of the bucket. Balthasar van der Pol3 was one of the first to analyze a relaxation oscillator system. 3 Dutch DR A very simple relaxation oscillator is the RC charge discharge oscillator show in figure 7.9. The ideal Op-Amp is configured as a Schmitt trigger which provides the non-linear bistable states. The negative feedback provides the relaxation mechanism. To qualitatively understand the circuit, let’s suppose that the Schmitt trigger output rails down to the Op-Amp power supply voltage −Vss . The physicist of the beginning of 20th century whose work covered several different fields such as applied mathematics, radio waves, and electrical engineering. 7.7. RELAXATION OSCILLATORS C0 R vC 161 +Vss 2 vC +Vss − t vo G −Vss 2 + −Vss +Vss vo t R+ Rf −Vss Figure 7.9: The Op-Amp version of the RC Charge Discharge Oscillator. capacitor will start to charge down and its voltage VC will swing down to reach −Vss with a characteristic time constant τ = RC. Once VC ≤ −Vss /2 , the Schmitt trigger output will switch to +Vss and the the capacitor voltage VC will start swinging to +Vss with the same characteristic time constant τ. This cycle will keep repeating generating a square wave at the Schmitt trigger output. The Period of the oscillation can be computed considering the time for exponential decay with time constant τ to go from Vss /2 to −Vss /2. After some algebra one obtains T = 2 log (3) τ 7.7.2 Triangular Wave Generator AF T which shows in this case ( same resistors on the positive feedback loop) that the period does not depend on the voltage limits but only on τ. In a more general case when the positive feedback loop resistors R0 are different, T will depend also on the values of those resistors. DR A triangular waveform generator can be easily built by cascading a Schmitt Trigger and an Op-amp integration stage as shown in Figure 7.10. Let’s suppose that the Schmit Trigger output vst has railed up to +VSS . A current Vss /R will start charging the capacitor C and as consequence, the output vo which is connected to the capactor will decrease. Once vo is lower than the Schmitt Trigger lower tripping voltage VLT , vst will transition to −Vss and the capacitor will start discharging and vo will increase. CHAPTER 7. BASICS ON OSCILLATORS 162 When vo will reach the high trip voltage VHT then vst will go back to +Vss and the cycle will repeat again over and over, generating a triangular wave. Let’s now figure out the period of the triangular waveform by finding out the time to charge and discharge the capacitor. If vst is at +Vss , then vo will go from VHT down to VLT with a slope Vss /RC. From Figure 7.10 we can easily se that VLT − VHT Vss , =− T1 RC and T1 = RC VHT − VLT Vss Analogously Vss VHT − VLT = , T2 RC and T2 = RC VHT − VLT Vss Replacing the tripping voltages expression VHT = −VLT = R+ Vss Rf we finally obtain the triangular wave period T R+ − Vss Rf = 4RC R+ . Rf AF T Vss ! DR T = T1 + T2 = 2RC R+ Vss − Rf 7.7. RELAXATION OSCILLATORS 163 vo V HT C +Vss − t v st G R v− V LT G + −Vss R+ vo − + T1 T2 vst +Vss vo t Rf −Vss DR AF T Figure 7.10: Triangular wave form generator made using a Schmitt Trigger and an Op-amp integration stage. AF T CHAPTER 7. BASICS ON OSCILLATORS DR 164 Bibliography [1] http://www.analog.com/UploadedFiles/Tutorials/450968421DDS_Tutorial_rev122-99.pdf 165 DR AF T [2] Microelectronics, Jacob Millman, and Arvin Grabel , Mac-Graw Hill BIBLIOGRAPHY DR AF T 166 Chapter 8 Phase Locked Loop (PLL) A phase locked loop PLL1 is a circuit with a feedback network that synchronizes an oscillator, the reference oscillator (REF), to another oscillator, the controlled oscillator (CO), so that they will oscillate (be locked together) at the same frequency. vi Input vph Phase Detector vlp Filter Voltage Controlled Oscillator vo Output Phase Locked Loop AF T Figure 8.1: Phase-Locked loop block diagram. 1 It DR To implement a PLL we need a circuit that generates a signal proportional to the phase difference between the REF and the CO. This continuously changing signal is then used to correct the frequency of the CO to be the same of the REF. In fact, if the phase difference is constant or zero the two oscillators must have the same frequency. In other words, keeping the phase difference constant makes the oscillator frequencies the same. seems that the first phase locked loop was proposed by the French scientist De Belleseize in 1932. 167 CHAPTER 8. PHASE LOCKED LOOP (PLL) 168 v2 v1 vmix R vlp C Figure 8.2: Mixer Phase-Detector and low-pass filter. The two cascaded circuits produce the error signal to be sent to the VCO. Another way to see this is that the time variation of phase is proportional to the frequency difference between the oscillators, and therefore the phase difference is the signal we need to correct the change of frequency between the two oscillators. Let’s look the at Figure 8.1 containing the block diagram of a basic PLL. The reference signal from REF is sent to the PLL input, goes into the phase detector, which gives a signal proportional to the phase difference between the CO and the reference. This signal has high frequency noise and in general needs to be low pass filtered and compensated. Then, the filtered signal goes to the voltage controlled oscillator (VCO). The VCO, the core of the PLL, has a circuit to control the frequency by changing its voltage input. This input is therefore driven with a voltage with the proper sign to zero the phase difference between the reference frequency and the CO. TBD 8.2 Phase Detector AF T 8.1 Phase Locked Loop Basic Analysis DR Phase detectors convert the phase difference between two signals into a signal proportional to the phase difference. Phase detectors can be classified into two types. Type I phase detectors are designed to be driven by analog signals, whereas Type II are driven by digital signal and in particular by the transitions/edges of such signals. 8.2. PHASE DETECTOR 169 8.2.1 Analog Mixer Phase Detector The analog mixer is a device that ideally multiplies two arbitrary signals. If the two signals are simple sinusoids with the same frequency and different phase, the output can be decomposed into two components. If the two input signals are v1 = V1 sin (ωt) , v2 = V2 sin (ωt + δφ0 ) , then after some algebra, the multiplied signal vmix (the mixer output) will be 1 1 vmix = v1 v2 = V1 V2 sin (δφ0 ) + V1 V2 sin (2ωt + δφ0 ) . 2 2 The output of the mixer is therefore a signal proportional to the phase difference of the two sinusoidal signals plus another component proportional to a sinusoid at twice the frequency of v1 or v2 . Applying an appropriate low pass filter, we can remove the two omega component and finally get our wished phase difference detector. 8.2.2 Logic Gate Phase Detector DR AF T Another basic type I phase detector, a XOR logic gate with a low-pass filter, is shown in Figure 8.3 together with the time plots of the circuit voltages, and the phase detector characteristic. As shown in the time plots, the XOR pulses output v xor have a duration of the time difference ∆T between the two same period T input square waves v1 and v2 . Those pulses are then integrated by the low pass filter whose ouput vl p will be on average proportional to ∆T and therefore to the phase difference ∆φ between the square waves v1 and v2 . Let’s find the phase detector characteristic of the XOR PD. If there is no time difference and the capacitor is not charged then vl p is zero. As soon a time difference appears, the capacitor will charge and vl p will increase. If we keep increasing ∆T, vl p will reach a maximum when v1 and v2 are off by T/2 because v xor is always on. Then, if we keep increasing even further ∆T, the capacitor will start discharging and vl p will decrease and will eventually reach zero. By continuing to increase ∆T, this cicle will repeat producing a triagular plot as shown in the phase detector characteristic of Figure 8.3. CHAPTER 8. PHASE LOCKED LOOP (PLL) 170 v1 v1 vxor R t vlp v2 v2 XOR t C vxor t vlp t vlp Average 0 π 2π 3π ∆φ Figure 8.3: Phase-Detector and low-pass filter. The two cascaded circuits produce the error signal proportional to the phase difference which is then sent to the VCO. AF T 8.3 Voltage Controlled Oscillator (VCO) As we already said before, a voltage controlled oscillator is an oscillator whose frequency can be controlled by changing the circuit voltage input. The circuit shown in Figure 8.4 shows how to implement such a circuit using an analog multiplier and the triangular waveform generator explained in chapter7. DR Looking at the VCO circuit, we see that effect of the analog multiplier placed at the output of the Schmitt Trigger is simply to change the gain of the output vst by a factor vi /VR and therefore the wave slopes by the same factor. As a consequence, the wave period will change. Considering this 8.4. VARACTORS OR VARYCAP 171 C vi +Vss R v st − G v− G + −Vss R+ vo − + Rf Figure 8.4: Voltage Controlled Oscillator (VCO) circuit built using the triangular waveform generator explained in chapter7. scaling factor, the frequency of the triangular waveform is then ν ( vi ) = 1 R f vi . 4RC R+ VR (8.1) 8.4 Varactors or Varycap DR AF T A varactor diode or varycap is a voltage controlled capacitance. It is essentially a reverse biased p-n junction whose capacitance increases if the reverse bias decreases. Intuitively, a reverse biased p-n junction is a capacitor with the depletion region acting as an insulator. Increasing the reverse bias the p-n depletion region increases and therefore the capacitance decreases. The major difference between a varactor and a diode is that the varactor is optimized to be a variable capacitance (as much as the technology allows) controlled with a bias. Typical values are from tens to hundreds of picofarads. Because the small variation of capacitance available they cannot be effectively used at low frequency. Varactors commonly available are the Motorola’s MVAM115, and the Phillips BB112, BB212, BB204. 172 CHAPTER 8. PHASE LOCKED LOOP (PLL) 8.5 CMOS 4046 PLL Circuit The CMOS 4046 PLL is an integrated circuit which implements a VCO and two PDs and some extra circuits to simplify the construction of a PLL circuit. The VCO frequency range is set with the components R1 , R2 , and C1 . Resistor R1 and capacitor C1 values set the maximum frequency f max of the VCO. Resistor R2 and Capacitor C1 set an optional frequency offset f min . The values limitations are: • 5kΩ ≤ R1 ≤ 1MΩ • R2 ≤ 1MΩ • C1 ≥ 100pF, 5V ≤ VDD < 10V • C1 ≥ 50pF, 10V ≤ VDD < 20V VCO input has a very high input impedance which allows us to use a wide range of values for the capacitor C and the resistor R for the low-pass filter circuit. 8.6 Pre-lab Problems • Derive equ. 8.1 using the analysis done in chapter 7. AF T • Considering that VR = 10 V, and a max VCO input voltage vi = 5 V, determine the values of R+ , R f , R and C to set the VCO frequency between 0 Hz and 10 kHz. • Sketch a complete PLL circuit using the VCO circuit reported in section 8.3 and the mixer phase detector reported in section 8.2.1. Use the square wave output of the VCO to close the phase locked loop. DR • Considering that the mixer has differential inputs, modify your previous sketch by adding a circuit to the VCO input that allows the oscillator to oscillate at 5 kHz frequency (free runnning frequency) when the the PLL input is disconnected. Use the VCO components values computed in the previous exercise. 8.6. PRE-LAB PROBLEMS vi 173 VDD 16 14 8 vlp 2 3 vo XOR C 4 R PD 6 C1 7 vVCO 9 VCO R1 11 R2 12 SIMPLIFIED CD4046B DR AF T Figure 8.5: Simplified circuitry of the CMOS 4046 with components to set the VCO frequency range and the low-pass circuit compensating circuit. CHAPTER 8. PHASE LOCKED LOOP (PLL) 174 fVCO fmax fc fmin vmin VDD 2 vmax VDD vVCO Figure 8.6: VCO characteristic of the CMOS 4046 . DR AF T • Determine the value of the mixer low-pass filter components R, C, for a cut-off frequency of 1 kHz. Bibliography [1] William F. Egan, Phase-Lock Basics, Wiley-Interscience, 1998. - Third Edition,Wiley- AF T Techniques 175 DR [2] Floyd Gardner, Phaselock Interscience, 2005. BIBLIOGRAPHY DR AF T 176 Chapter 9 Final Project, Some Useful Circuits This appendix is a collection of practical consideration, suggestions, and useful simple circuits to be used with transducers that can help you building your final project. 9.1 Solderless Breadboard The figure below shows the circuit breadboard contacts topology and suggested power supply connections. W X A B C D E TRENCH 10 15 20 25 30 35 40 45 50 F G H I J Z Y 60 −15V GND +15V DR IC 55 AF T 5 Here some rules and guidance to follow when assembling a circuit using a solderless breadboard 177 178 CHAPTER 9. FINAL PROJECT, SOME USEFUL CIRCUITS • Wires gauge AWG 24 must be used. • Do not force thick leads into the board holes connections. Leads fit must be somehow loose to allow the spring loaded contact to work properly. • Green jacket wires should be used to connect components to ground (GND), red jacket wires for +15 V, and black jacket wires for −15 V. A different color should be used for feedback connections. • Component’s leads should be cut short to place the components as close as possible to the board. • ICs must be placed on and along the trench otherwise opposite on side IC’s pins will be short circuited. • Always double check power supply connections to avoid damaging or more likely destroying ICs components. This type of pragmatism will minimize the number of surprises you will have building your circuit and also will help you debug your circuit. 9.2 Decoupling/Bypassing Capacitor Decoupling or bypassing capacitors are capacitor placed between the ICs power supply inputs and ground to filter out (decouple) noise coming from the power supply lines. We can somehow distinguish two type of noise: AF T • transient noise due to fluctuation of the voltages generated by sudden increase of current demanded by the ICs, • broad band or high frequency noise either random or constant with a given frequency spectrum. DR Large capacitors acting as a current reservoir are needed to compensate for voltage transients, and small capacitor are required for high frequency noise filtering. A typical value for high frequency noise decoupling capacitors is 100 nF. These capacitors should be placed very close to the ICs power supply inputs to avoid the inductive effects of long electric connections. The faster 9.3. VARIABLE RESISTORS 179 the IC circuitry is the more important the decoupling becomes especially for high frequency noise. For transient noise, much larger capacitor with values, between 1 µF to 10 µF, are necessary to provide some kind of "current reservoir". Apart from special cases, they can be placed somewhere in the circuit board. Usually, decent off the shelf power supplies already include those capacitors. A very extensive source of information about decoupling capacitor is found in the bibliography. 9.3 Variable Resistors It is good practice to place potentiometer to set amplifier gains, match resistor pairs, or in circuits to null voltage offset or set the proper voltage divider outputs. Variable resistors come in so many flavors that it is time consuming to choose the right components. For the project purpose, it is convenient to use at least 10 turn trimmers potentiometers with up right wiper screw, which are compact and fit reasonably well onto the solderless breadboard. As shown in the figure below, trimmers should be placed in series with a resistor every time one needs to limit the current to a maximum . The figure also shows where usually the wiper (B) is located. Vi Rx Vo Wiper Wiper DR 9.4 Surface Mount Devices AF T R Due the absence of leads, Surface Mount Devices (SMD) cannot be easily used with solderless prototyping boards. Adapters, which permits to CHAPTER 9. FINAL PROJECT, SOME USEFUL CIRCUITS 180 solder SMDs onto a small printed circuit boards with legs, can be used to properly wire these type components on the solderless board. There is a plethora of SMD standards such as Small Outline Integrated Circuit (SOIC), mini-SOIC, Small Outline Package (SOP), Shrink SOP (SSOP) Thin SSOP (TSSOP), et. cetera. Each standard differs by ICs dimensions (especially the footprint) and distance between leads. Some of them have so small packages that it is practically impossible to solder ICs without expressely made tooling. Soldering SOIC components on PCBs is somehow a quite simple operation once done two or three times. SOIC leads are about 1.3 mm apart and therefore small an narrow solder iron tips allow to solder each lead at a time. Smaller packaging are quite difficult to solder and because of their small size, it is easy to damage the ICs if overheated. Consult the data-sheet before soldering SMDs on adapters to check how long the component can withstand the maximum temperature. SOIC adapters with 8 pin connection are available in the laboratory. 9.5 Switches Switching circuits to drive high power load are shown in the figure below Vcc Load R D0 BJT 1k−3.3kΩ Load R AF T D0 D1 D1 Vcc N−MOSFET 15kΩ DR The diode D0 at the input is necessary in case the switch input can go lower than zero volts. The diode in parallel with the load is necessary if the load is inductive to damp over-currents generated when the load switch status. Typical inductive load are relays whose large inductance values come from the relay’s solenoid. 9.6. VOICE COIL LOUD-SPEAKERS DRIVER 181 9.6 Voice Coil Loud-speakers Driver Voice coil loud-speakers are transducers with a quite low input impedance, usually of 4 Ω or 8 Ω and few to several watts of power consumption. They therefore need quite some current to be properly driven. For our purposes (unless the project is to make a very powerful speaker) a 50 mW to 100 mW speaker for the mid-range acoustic frequencies is more than sufficient. Usually, because Op-Amps can provide no more than few milliamperes, they cannot drive a speaker directly. A current booster such as the pushpull amplifier with BJTs able to dissipate about 0.5 W, which can increase the current by a factor 10 to 100 easily, can drive a small speaker in the mid-range acoustic frequencies. It is fundamental to limit the current to ensure that the transistor power rating are not exceeded. The circuit below includes the resistor necessary to limit the current flowing through the BJTs which needs to be calculated based on the power supply voltage VCC and the rms dissipation Prms the transistors can sustain. Resistors R power dissipation must be also computed . Vcc vi R R0 R1 v+ Q1 − G vo vA + Q1 R RL DR −Vcc AF T v− Heat-sinks should be placed on the BJTs to ensure that the amplifier works reliably. 182 CHAPTER 9. FINAL PROJECT, SOME USEFUL CIRCUITS 9.6.1 Off the shelf Audio Amplifiers ICs power audio amplifier suitable to power small speakers (~1 Wspeakers) are for example the LM380 and the LM386. Heat sink should be used with those off the shelf audio anplifiers. 9.7 Microphones A simple condenser (capacitor) microphone can be used as a transducer to convert audio waves into a current. A condenser microphone exploits the change in capacitance caused by sound waves modulating the distance of the capacitor plates. This change corresponds to a charge variation of the capacitor which generates a current proportional to the sound wave intensity. A voltage bias is required to charge the capacitor otherwise there would not be a capacitance to be modulated by the sound waves. Usually one capacitorŽs plate is a stiff conductor and the other is a light small conducting membrane under tension which can absorb the sound wave energy and vibrate. Electret microphones are condenser microphones with a so called electret material as dielectric which has an intrinsic electric field analogously to permanent magnet and its magnetic field. The electric field generates a capacitance without the need of a bias voltage as in a conventional condenser microphone. A n-channel JFET connected as show in the figure below "hide" the capacitive load of the electret microphone. VDD R + AF T VDD R Vo Vo + Mic. Q0 Mic. − + − C DR V0 − 9.7. MICROPHONES 183 The following basic preamplifier circuit can be used to amplify the weak microphone signal to further conditioning. Cf 15 V VCC 100pF Rf R1 Mic. AOM−4544P−2 + 6.8kΩ C 100kΩ + − − G 10µ F + R2 3.3kΩ H ( jω ) = − R f jωRC 1 , R 1 + jωRC 1 + jωR f C f R= AF T The voltage divider resistors R1 and R2 set the positive bias voltage for the condenser microphone to the required level specified by the transducer characteristics. It also sets the maximum current that the transducer will drain. The capacitor C bypass the DC component which is too large to be amplified. The capacitor value should be such that the high pass cutoff frequency is about 20 Hz. Electrolytic capacitor can be used because of the microphone positive bias and therefore even large values such as 10 µF can be easily used. The capacitor C f adds a pole at high frequency to filter out high frequency oscillations and noise. The low-pass cut-off frequency should be at about 15 kHz. Between the poles, the inverting amplifier gain is set as usual by the ratio R f /R and should probably be quite large, between 50 to 100 depending on the microphone used. The amplifier transfer function is R1 R2 . R1 + R2 • Part #: AOM-4544P-2-R • Directivity: Omnidirectional DR The electret condenser microphone available in the lab has following characteristics 184 CHAPTER 9. FINAL PROJECT, SOME USEFUL CIRCUITS • Sensitivity: -44dB • Frequency Response: from 20 Hz to 20 kHz, • Max supply voltage Max: 10 V • Max drain current : 500 µA • Impedance: R (source impedance of microphone and bias, see schematic) • Pin-out: (+) (−) 9.8 Phototransistors AF T It is worthwhile to notice that a speaker can be used as a microphone as well. In fact, vibrations induced by the sound waves on the speaker membrane will move the solenoid respect to the permanent magnet. The relative velocity between solenoid and magnet will induce a current in the solenoid proportional to the sound wave intensity. Dynamic microphones have essentially the same topology of a speaker and do not require a bias voltage as condenser microphones do. DR A common type of phototransistor is the photo-BJT whose base region is enlarged compared to standard BJT and has the base exposed such that light can be absorbed to generate a photocurrent. Photo-BJTs can either have two leads , Collector and Emitter leads or all the three BJT leads. The circuit below is the simplest configuration that can be used to have a photo-BJT working as switch or an amplifier driven by a light source. The operation mode depends on the value of the load R L that sets the current ICC . For the circuit to work as a switch or as an amplifier, we need 9.9. PHOTODIODES 185 to either keep the transistor working on the saturated or the active mode when light is impinging on the transistor, and therefore VCC = R L IC Switch ⇒ (max ) ⇒ VCC > R L IC Amplifier VCC RC Vo RL Usually, because of their faster response and lower noise, photodiodes work better as transducer to convert light power into voltage. With modulated light, photodiodes should be therefore preferred. 9.9 Photodiodes Rs A Io ID Vo Iph VD D A Io Cj Rp DR Pi K AF T Photodiodes are essentially semiconductor junctions which generate a current (photocurrent) when exposed to light. They are therefore used to measure light intensity. The equivalent photodiode circuit is show below. Vo K 186 CHAPTER 9. FINAL PROJECT, SOME USEFUL CIRCUITS Note the opposite direction of the photocurrent I ph and the forward biased diode current ID . • I ph : photocurrent proportional to the amount of incident light of power P on the photodiode active surface, i.e. I ph = −α (λ) P , where α depends on the light wavelength λ. • ID : diode PN junction current − qVD /K B T ID = Is e −1 . The saturation current is usually called dark current, i.e. current with no incident light. • R p : shunt resistance (in parallel.) • Rs : series resistance. • Cj : capacitance due to the PN junction. The smaller the N doped active region surface, the smaller is the capacitance. The I-V characteristic of the photodiode for different values of incident power is qualitatively shown in the figure below. Note how the input dynamic range where the response is linear increases when the photodiode is reverse biased. 0 AF T ID VD Pi 2P i 3P i Vo DR Vo 9.9. PHOTODIODES 187 Fast and low noise photodiodes are hard to build and it is even harder in case of high power application. Ultra fast photodiodes can have an active area of about less than 100 µm2 and bandwidth of 25 GHz. Typical semiconductor substrate for visible light are Silicon (Si) and for infrared light Indium-Gallium-Arsenide (InGaAs). 9.9.1 Photovoltaic Mode In this mode, the photodiode works thanks to the photovoltaic effect. Some of the electron-hole pairs generated by incident photons do not give up their energy as in a metal or are complectely extracted from the solid in the photoelectric effect. They just stay inside the semiconductor with energy in the conduction band of the semiconductor. These pairs then build up generating a charge distribution and therefore an electric field that finally produces the photocurrent. As shown in the figure below, the photocurrent is measured as a voltage drop across a load or is transformed into a voltage with a transimpedance amplifier. Rf Vo − D + Major advantages of this configuration: • Smaller dark current ⇒ low current noise. • linear output because smaller dark current. • accurate voltage response. Major disadvantage: Vo AF T R >> R p DR • slow response. The Cj in parallel to the current generator low pass filter the signal. 188 CHAPTER 9. FINAL PROJECT, SOME USEFUL CIRCUITS 9.9.2 Photocurrent Mode In this mode, the generated photocurrent is collected by the revers bias voltage applied across the photodiode. As shown in the figure below, apart from having the photodiode reverse biased with −VDD the circuits are the same as the photovoltaic mode circuits. Cf −VDD Rf Vo − R D + −VDD Major advantages of this configuration: • Fast response. The reverse voltage bias −VDD reduces the junction depletion region and therefore the junction capacitance. Major disadvantages: • larger dark current than the unbiased photodiode. Consult [3, 4] for more detailed information. 9.10 Ultrasonic Transceivers TBD DR 9.11 Velocity Sensors AF T • small OpAmp current bias amplified by the transimpedance. TBD 9.12. POSITION SENSORS 189 9.12 Position Sensors DR AF T TBD AF T CHAPTER 9. FINAL PROJECT, SOME USEFUL CIRCUITS DR 190 Bibliography [1] Semiconductor Packaging Information by Type, Texas Instruments, http://www.ti.com/sc/docs/psheets/type/type.html [2] Decoupling Techniques, MT-101 Tutorial, Analog Devices, www.analog.com/static/imported-files/tutorials/MT-101.pdf [3] Photodiode Technical Information - Hamamatsu Photonics, http://sales.hamamatsu.com/assets/applications/SSD/photodiode_technical_information.pd 191 DR AF T [4] Characteristics and use of infrared detectors, Hamamatsu Photonics, http://sales.hamamatsu.com/assets/applications/SSD/infrared_kird9001e04.pdf BIBLIOGRAPHY DR AF T 192 Appendix A Decibels A.1 Definition of Bel and Decibel The bel1 is defined as the logarithm in base ten of a power P normalized to a reference power Pr , i.e. X B = log10 P . Pr (A.1) The decibel is 10 bels X dB = 10 X B = 10 log10 P . Pr (A.2) AF T Bels and decibels are dimensionless. The bel is not a unit, but a formula to conveniently scale homogeneous quantities thanks to the properties of the logarithmic function. Bels are not commonly used because if we consider integer values of bels they do not provide a good resolution. We will just consider decibels for the remainder of this notes. Considering that V2 P= = | Z| I 2 , |Z| 1 The DR and supposing that we use the same reference impedance magnitude | Zr | units scale "bell" was name after Alexandre Graham Bell, scientist and inventor. 193 APPENDIX A. DECIBELS 194 for P, and Pr ,we can rewrite equ. (A.2) as X dB = 20 log10 I V = 20 log10 , Vr Ir where Vr , and Ir are respectively the voltage and the current across the reference impedance | Zr |. In other words, we have to measure the voltage or the currents across equal impedances, to get the decibels. A.2 Generalization of the Use of Decibel For practical purposes, the decibel is also used to report the ratio of any homogeneous quantities such as the voltage output Vo over the voltage input Vi of a two port network, or in general, the ratio of any kind of homogeneous quantities x1 , x2 X dB = 20 log10 x1 . x2 In this case there is no normalization respect to a reference load Rr or power Pr . A.3 Useful Table and Properties The next table is quite useful to easily translate decibels into magnitude 0 1 1 1.1 2 3 4 5 6 1.2 1.4 1.6 1.8 2 7 8 9 10 2.2 2.5 2.8 3.2 AF T [dB] Magnitude For convenience, letŽs rewrite some useful properties of the logarithm function = = = = log x + log y, log x − log y, n log x, logb x/ logb a. DR log( x y) log( x/y) log x n loga x A.4. STANDARD POWER REFERENCES 195 A.4 Standard Power References Decibels comes in many flavors (different reference powers) depending on the application, radio frequency, microwaves, optics, acoustics, et cetera. For example the following definition is quite often used X dBm( Rr ) = 10 log10 V 2 /R 1mW The value of Rr depends on the application field DR AF T Radio Frequency TV Frequencies Audio Frequencies Rr [ Ω ] 50 75 600 AF T APPENDIX A. DECIBELS DR 196 Appendix B Resistor Color Code Nominal values of resistances are coded using colors bands around the resistors (see figure below). The bands identify digits and the exponent in base ten for the resistance value and the tolerance as explained in the following table: Band 1 Number 3 Bands Digit 4 Bands Digit 5 Bands Digit 2 3 Digit Digit Digit 4 (Tolerance band) Exponent Always 20% Exponent Tolerance Exponent Tolerance 5 Tolerance after 1000 hours ABC D R = AB · 10C , AF T 3 Band resistors have no band for the tolerance because it is assumed to be 20% of the nominal values.The fifth band is not an industry standard, but quite often it means the tolerance after 1000 hours of continuous use. ∆R = R · D 197 DR The bands are counted from left to right. The following table reports the coding of the values using colors and a mnemonic sentence to remember the color code table. APPENDIX B. RESISTOR COLOR CODE 198 Mnemonic Sentence Big Bart Rides Over Your Grave Blasting Violent Guns Wildly. Go Shoot (him?) Color Black Brown Red Orange Yellow Green Blue Violet Gray White Gold Silver Exponent Tolerance Tolerance (%) (%) 5th Band 0 20 1 1 1% 2 2 0.1% 3 0.01% 4 0.001% 5 6 7 8 9 -1 5 -2 10 For example, the nominal resistance of a 4 band resistor having the sequence brown, black, orange and gold is Rnom. = 10 kΩ ∆Rnom. = 5%10 kΩ ⇒ Rnom. = (10.0 ± 0.5) kΩ DR AF T Resistor size (volume) is related to the power dissipation capability. Typical used values are 1/8W, 1/4W, 1/2W, 1W. Appendix C The Cathode Ray Tube Oscilloscope Every time we need to analyze or measure an electronic signal in the time domain we will probably use some type of oscilloscope. The oscilloscope is therefore one of the most useful tools used in a laboratory. Practically, it is an indispensable instrument for measuring, designing, manufacturing, or repairing electronic equipment. Quite often, one can still find old Cathode Ray Tube (CRT) oscilloscopes even in modern laboratory, mainly because of the inadequacy of state of the art digital oscilloscope scopes to represent very fast signals. It is therefore worthwhile to study this device and understand how a CRT works and also its limitations. AF T C.1 The Cathode Ray Tube Oscilloscope • the cathode ray tube (CRT), • the trigger, DR The cathode ray tube oscilloscope is essentially an analog1 instrument that is able to measure time varying electric signals. It is made of the following functional parts (see figure C.1): 1 Hybrid instruments combining the characteristics of digital and analog oscilloscopes, with a CRT, are also commercially available. 199 200 APPENDIX C. THE CATHODE RAY TUBE OSCILLOSCOPE • the horizontal input, • the vertical input, • time base generator. Let’s study in more detail each component of the oscilloscope. C.1.1 The Cathode Ray Tube The CRT is a vacuum envelope hosting a device called an electron gun , capable of producing an electron beam, whose transverse position can be modulated by two electric signals (see figures C.1 and C.7). When the electron gun cathode is heated by wire resistance because of the Joule effect it emits electrons . The increasing voltage differences between a set of shaped anodes and the cathode accelerates electrons to a terminal velocity v0 creating the so called electron beam. The beam then goes through two orthogonally mounted pairs of metallic plates. Applying voltage difference to those plates Vx and Vy , the beam is deflected along two orthogonal directions ( x and y ) perpendicular to its direction z. The deflected electrons will hit a plane screen perpendicular to the beam and coated with florescent layer. The electrons interaction with this layer generates photons, making the beam position visible on the screen. C.1.2 The Horizontal and Vertical Inputs DR C.1.3 The Time base Generator AF T The vertical and horizontal plates are independently driven by a variable gain amplifier to adapt the signals v x (t), and vy (t) to the screen range. A DC offset can be added to each input to position the signals on the screen. These two channels used to drive the signals to the plates signals are called horizontal and vertical inputs of the oscilloscope. In this configuration the oscilloscope is an x-y plotter. If we apply a sawtooth signal Vx (t) = αt to the horizontal input, the horizontal screen axis will be proportional to time t. In this case a signal vy (t) C.1. THE CATHODE RAY TUBE OSCILLOSCOPE 201 CATODE RAY TUBE (CRT) Line(60Hz) External Ramp Generator Internal Level s/div TRIGGER Preamplifier TIME BASE GENERATOR Amplifier V/div INPUT CHANNEL AF T Source DR Figure C.1: Sketch of the functional parts of the analog oscilloscope, preamplifier, amplifier, trigger, time base generator, and CRT. APPENDIX C. THE CATHODE RAY TUBE OSCILLOSCOPE 202 applied to the vertical input, will depict on the oscilloscope screen the signal time evolution. The internal ramp signal is generated by the instrument with an amplification stage that allows changes in the gain factor α and the interval of time shown on the screen. This amplification stage and the ramp generator are called the time base generator. In this configuration, the horizontal input is used as a second independent vertical input, allowing the plot of the time evolution of two signals. Visualization of signal time evolution is the most common use of an oscilloscope. vy (t) Signal t Trigger t Sawtooth signal T T t C.1.4 The Trigger AF T Figure C.2: Periodic Signal triggering. The second trigger is ignored because the ramp is still of the sawtooth signal is still increasing to its maximum αT. DR To study a periodic signal v(t) with the oscilloscope, it is necessary to synchronize the horizontal ramp Vx = αt with the signal to obtain a steady plot of the periodic signal. The trigger is the electronic circuit which provides this function. Let’s qualitatively explain its behavior. The trigger circuit compares v(t) with a constant value and produces a pulse every time the two values are equal and the signal has a given C.2. OSCILLOSCOPE INPUT IMPEDANCE 203 C Input DC AC − High Voltage Amplifier GND + Cs Rs Deflection Plates Pre−Amplifier Figure C.3: Oscilloscope input impedance representation using ideal components (gray box). Input channel coupling is also shown. slope. The first pulse triggers the start of the sawtooth signal of period2 T , which will linearly increase until it reaches the value V = αT, and then is reset to zero. During this time, the pulses are ignored and the signal v(t) is plotted for a duration time T. After this time, the next pulse that triggers the sawtooth signal will happen for the same previous value and slope sign of v(t), and the same portion of the signal will be re-plotted on the screen. C.2 Oscilloscope Input Impedance 2 In DR AF T A good approximation of the input impedance of the oscilloscope is shown in the circuit of figure C.3. The different input coupling modes ( DC AC GND ) are also represented in the circuit. The amplifying stage is modeled using an ideal amplifier (infinite input impedance) with a resistor and a capacitor in parallel to the amplifier input. The switch allows to ground the amplifier input and indeed to vertically set the origin of the input signal (GND position), to directly couple the input signal (DC position), or to mainly remove the DC component of the input signal (AC position). general, the sawtooth signal period T and the period of v(t) are not equal. 204 APPENDIX C. THE CATHODE RAY TUBE OSCILLOSCOPE C.3 Oscilloscope Probe An oscilloscope probe is a device specifically designed to minimize the capacitive load and maximize the resistive load added when the instrument is connected to the circuit. The price to pay is an attenuation of the signal that reaches the oscilloscope input3 . Let’s analyze the behavior of a passive probe. Figure C.4 shows the equivalent circuit of a passive probe and of the input stage of an oscilloscope. The capacitance of the probe cable can be considered included in Cs . Vi Cp Coaxial Cable Probe Tip GND Clip Cp Rp Vs Cs Rs Rp Probe A Rs B Vs Cs Oscilloscope Input Stage Figure C.4: Oscilloscope input stage and passive probe schematics.The equivalent circuit made of ideal components for the probe shielded cable is not shown. Considering the voltage divider equation, we have 1 1 = jωCs + , Zs Rs and then Zs = 3 Active Rs , jωτs + 1 1 1 = jωC p + , Zp Rp Zp = Rp . jωτp + 1 DR where Vs Zs , = Vi Z p + Zs (C.1) AF T H ( jω ) = probes can partially avoid this problems by amplifying the signal. C.3. OSCILLOSCOPE PROBE 205 Defining the following parameters τp = C p R p , α= Rs , Rs + R p β= Cp , Cs + C p and after some tedious algebra, equation (C.1) becomes H ( jω ) = α 1 + jωτp , 1 + jω αβ τp which is the transfer function from the probe input to the oscilloscope before the ideal amplification stage. The DC and high frequency gain of the transfer function H ( jω ) are respectively H (0) = α, H (∞) = β. The numerator and denominator of H ( jω ) are respectively equal to zero, (the zeros and poles of H ) when ω = ωz = j 1 , τp ω = ωp = j β 1 . α τp Figure C.5 shows the qualitative behavior of H for α β > 1. C.3.1 Probe Frequency Compensation α < 1 ⇒ over-compensation β α = 1 ⇒ compensation β α > 1 ⇒ under-compensation β AF T By tuning the variable capacitor C p of the probe, we can have three possible cases DR if α < β the transfer function attenuates more at frequencies above ωz , and the input signal Vi is distorted. if α = β the transfer function is constant and the input signal Vi will be undistorted and attenuated by a factor α. 206 APPENDIX C. THE CATHODE RAY TUBE OSCILLOSCOPE Magnitude α Phase β ω1 Frequency ω2 Figure C.5: Qualitative transfer function from the under compensated probe input to the oscilloscope before the ideal amplification stage. As usual, the oscilloscope input is described having an impedance Rs ||Cs . α = 1, β ⇒ Cp Rs = , Rp Cs DR and this condition implies that: AF T if α > β the transfer function attenuates more at frequencies below ω p and the input signal Vi is distorted. The ideal case is indeed the compensated case, because we will have increased the oscilloscope input impedance by a factor α without distorting the signal. The probe compensation can be tuned using a signal able to show a clear distortion when it is filtered. A square wave signal is very useful in this case because it shows a quite different distortion if the probe is under or over compensated. Figure C.6 sketches the expected square wave distortion for the two uncompensated cases. It is important to notice that if • the voltage difference V1 across Rs is equal the voltage difference V2 across Cs , i.e V1 = V2 C.3. OSCILLOSCOPE PROBE 207 • the voltage difference V3 across R p is equal the voltage difference V4 across C p , i.e. V3 = V4 • and therefore V1 + V2 = V3 + V4 . This means that no current is flowing through the branch AB when the probe is compensated, and we can consider just the resistive branch of the circuit to calculate Vs . Applying the voltage divider equation, we finally get Vs = Rs V Rs + R i The capacitance of the oscilloscope does not affect the oscilloscope input anymore, and the oscilloscope+probe input impedance Ri becomes greater, i.e. Ri = R s + R p . V t AF T V t DR Figure C.6: Compensation of a passive probe using a square wave. Left figure shows an over compensated probe, where the low frequency content of the signal is attenuated. Right figure shows the under compensated case, where the high frequency content is attenuated. 208 APPENDIX C. THE CATHODE RAY TUBE OSCILLOSCOPE x V0 Vy θ e v0 Ey h z d D Figure C.7: CRT tube schematics. The electron enters into the electric field and makes a parabolic trajectory. After passing the electric field region it will have a vertical offset and deflection angle θ. C.4 Beam Trajectory Let’s consider the electron motion through one pair of plates. The electron terminal velocity v0 coming out from the gun can be easily calculated considering that its initial potential energy is entirely converted into kinetic energy, i.e s 1 2 eV0 µv0 = eV0 , ⇒ v0 = 2 , 2 µ AF T where µ is the electron mass, e the electron charge, and V0 the voltage applied to the last anode. If we apply a voltage Vy to the plates whose distance is h, the electrons will feel a force Fy = eEy due to an electric field Vy . h The equation of dynamics of the electron inside the plates is | Ey | = ż = v0 , DR µz̈ = 0, ⇒ µÿ = e| Ey |. C.4. BEAM TRAJECTORY 209 Supposing that Vy is constant, the solution of the equation of motion will be s eV0 2 z(t) = t, µ y(t) = 1 eVy 2 t . 2 µh Removing the dependency on the time t, we will obtain the electron beam trajectory , i.e. y= 1 Vy 2 z , 4h V0 which is a parabolic trajectory. Considering that the electron is transversely accelerated until z = d, the total angular deflection θ will be 1 d Vy ∂y = . tan θ = ∂z z=d 2 h V0 and displacement Y on the screen is Y (Vy ) = y(z = d) + tan θD, i.e., 1d 1 d ( + D )Vy . 2 h V0 2 Y is indeed proportional to the voltage applied to the plates through a rather complicated proportional factor. The geometrical and electrical parameters of this proportional factor play a fundamental role in the resolution of the instrument. In fact, the smaller the distance h between the plates, or the smaller the gun voltage drop V0 , the larger is the displacement Y. Moreover, Y increases quadratically with the electron beam distance d. DR C.4.1 CRT Frequency Limit AF T Y (Vy ) = The electron transit time through the plates determine the maximum frequency that a CRT can plot. In fact, if the transit time τ is much smaller 210 APPENDIX C. THE CATHODE RAY TUBE OSCILLOSCOPE than the period T of the wave form V (t), we have V (t) ≃ constant, and the signal is not distorted. The transit time is d τ= =d v0 r τ ≪ T, µ . 2eV0 ⇒ τ ≃ 1ns DR AF T Supposing that V0 = 1kV d = 20mm µc2 ≃ 0.5MeV e = 1eV if Appendix D Electromagnetic Field Noise D.1 Introduction AF T Human and natural activities fill the surrounding space with electromagnetic fields (radiation) creating a very complex and unpredictable frequency spectrum of radiation. For example, domestic appliances, bulbs, fluorescent lights, and power line grids mainly irradiate at 60Hz and harmonics of 60Hz. Radios, televisions, wireless internet connections, and cellular phones networks are other typical sources, which fill the radiation spectrum from the kilohertz to the gigahertz region. Light mainly produced by the sun pervades the spectrum in the optical region. Radioactivity, gamma ray burst (GRB) emitted by astrophysical sources are for eaxmple responsible for filling the high and very high region of the spectrum. Portion of this so complex spectrum can be attenuated by the so called electromagnetic shields but some others portions because of the energy involved cannot be effectively even attenuated. The so called radio frequency noise can be easily attenuated (shielded) using a quite simple device known as the Faraday cage. D.2 The Faraday Cage 211 DR Gauss’s law states that a closed surface will prevent extern electrostatic fields from reaching the space enclosed by the surface. If the electric field is slowly varying i.e., its wavelength λ is large compared to the typical size d of the enclosure), then the field on the surface can be considered static 212 APPENDIX D. ELECTROMAGNETIC FIELD NOISE and Gauss’s law is then applicable. This enclosure is commonly called Faraday cage. Using this crude approximation we can state that all frequencies much smaller than the following c ν∗ ∼ d where c is the speed of light, will be effectively attenuated. For example if d = 1 m then the Faraday cage will attenuate the external electromagnetic fields with frequencies much smaller than ν∗ ∼ 300 MHz. D.3 Practical Considerations DR AF T Normally, when we perform a measurement we cannot easily fit the lab in a small Faraday cage. Anyway, most of the time it is sufficient to enclose the physical system under measurement inside the cage . Then to perform the measurement we will have to connect the instrument sitting outside the cage to the system. The instruments leads acting like an antenna will still pick-up some of the ambient electromagnetic radiation. This effect can be amplified if we touch one of the leads increasing the antenna effect. A way to minimize this effect is to connect Faraday cages together. Reasonably good instruments have a built in Faraday cage connected to ground. Connecting the cages to ground will create a more or less single effective cage which will attenuate the electromagnetic noise pick-up. Appendix E Common Emitter BJT Amplifier The common emitter BJT amplifier is one of the most simple design that allows to set the voltage amplification Av quite independently from the BJT characteristics. VCC RC IC R1 Co Vi Ci C IB Vo Q VCE B E IE RE AF T R2 Figure E.1: BJT Common emitter amplifier with coupling capacitors Ci , and Co . 213 DR To properly set the BJT working point, we have to forward bias the emitter base junction and reverse bias the collector base junction. But this is not enough if we want to build an amplifier. The other requirement is to set the voltage VCE where the VCE characteristic is flat and wide enough APPENDIX E. COMMON EMITTER BJT AMPLIFIER 214 R1 + − VCC IB R2 B VBE C IC RC + + VCC hfe IB − IE − RE E Figure E.2: Common emitter equivalent circuit which simplifies the BJT biasing understanding. to accommodate the output signal excursion. In other words, we donŽt want the output to swing into the BJT saturation region or into the break down region. The design parameters we have to set are are Av , IC ,VCE ,VCC , and essentially, the VCE characteristics contains all the information we need to properly bias the BJT. As last remark, voltage gain and bias point are "intimately" related and cannot be completely independent. E.1 Amplifier Design The analysis of the circuit becomes quite easy if we observe from the VCE characteristic that IC ≫ IB . (E.1) Applying KVL to the output mesh, we will have (E.2) AF T VCC = RC IC + RE IE + VCC ≃ ( RC + RE ) IC + VCE DR If we want to optimize the dynamic range of the amplifier, and neglecting the saturation region, we will have to set according to the IC − VCE characteristic 1 VCE ≃ VCC 2 Using this design condition and and voltage gain of this circuit we will have 1 VCC RE = 2 (1 + Av ) IC E.2. RESUME 215 This equations together with the gain equation (E.8) set the values RC and RE based only on the design parameters VCC ,IC , and Av . Let’s now find the values of the voltage divider which forward bias the base-emitter junction. If IB is negligible, then resistors R1 and R2 act as a simple voltage divider, i.e. VB ≃ and for KVL R2 VCC . R1 + R2 (E.3) VB = VBE + RE IE ≃ VBE + RE IC where VBE must be the voltage drop of a forward polarized diode junction, typically between 6.0 V to 0.7 V. Using the two expressions of VB and after some algebra, we get VCC R1 ≃ R2 −1 . VBE + RE IC E.2 Resume Summarizing the results we have for IC ≫ IB 1 2 (1 + A v ) V = α CC IC = Av RE VCC = − 1 R2 VBE + αVCC (E.4) α = RC R1 E.3 Example R 1 R2 R C RE (E.6) ≃ 452 kΩ ≃ 40 kΩ ≃ 909 Ω ≃ 91 Ω DR Let’s set the following design values Av = 10 VCC = 20 V ⇒ IC = 1 mA R2 = 40 kΩ (E.5) (E.7) AF T RE APPENDIX E. COMMON EMITTER BJT AMPLIFIER 216 R1 Vi IB R2 B C IC RC Vo hie hfe IB IB RE E Figure E.3: Small signal circuit model for the common emitter BJT amplifier E.4 Amplifier Gain and Sign Using the equivalent small signal circuit model for the BJT and considering the impedance of the ideal voltage and current sources we can construct the circuit show in figure E.3. Then from that figure it is finally easy to compute the voltage gain Av and the input and output impedance Ri and Ro of the circuit. In fact, considering that IB ≪ IC , RE ≫ hie , the input and the output voltage are simply Vi = (hie + RE ) IE ≃ RE IC R , ⇒ Av ≃ C (E.8) RE Vo = RC IC The Common Emitter BJT amplifier is an inverting stage. In fact, considering that ⇒ VCC = Vo + ( RE + RC ) IC AF T Vo = VCC − ( RE + RC ) IC if IC increases, then Vo must decrease to keep VCC constant. If, we start with an input current and voltage in phase they will end up being out of phase by 180◦ degrees. DR E.5 Input and Output Impedance The input impedance is the impedance seen from the inputs lead , and can be easily computed considering that the ideal current source is an open E.6. I/O COUPLING CAPACITORS 217 circuit, i.e. Ri = R2 || R1 || (hie + Re ) . The output impedance is then Ro = RC . E.6 I/O Coupling Capacitors The coupling capacitors Ci will provide a way to send the input signal to amplifier without perturbing the DC bias of the BJT. Similarly, placing the capacitor Co to the output will allow to connect a load without perturbing the DC bias of the BJT circuit. Coupling capacitance should be selected to minimize the filtering effect on the amplifier response. For example, Ci will create a RC high pass filter with the R being the input resistance of the amplifier and Co will do the same with the eventual resistance of the amplifier load. VCC RC C Vi C C IB Q VCE B E IE RE DR R2 Vo AF T IC R1 Figure E.4: BJT Common emitter amplifier with emitter bypassing capacitor. 218 APPENDIX E. COMMON EMITTER BJT AMPLIFIER E.7 Emitter Bypass Capacitor DR AF T Adding a so called bypass capacitor CE in parallel with RE will not change the DC bias of the BJT and will provide a the maximum possible voltage gain at high frequency as seen in the simple BJT amplifier circuit. Appendix F Push-Pull BJT Amplifier The BJT push-pull current amplifier is an amplifier topology which provides small standing currents, reasonable low distortion, and good efficiency. It is therefore quite useful to drive small loads such loudspeakers which usually have a few Ohms input impedance. Vcc Q1 vo + Q1 vi RL − −Vcc AF T Figure F.1: Push-pull amplifier using a BJT complementary pair. The gray area highlights the “pushing” part of the circuit with the transistor Q1 , which pushes the current through the load R L . The other transistor Q̄1 is the circuit “pulling” part that pulls the current through the load. 219 DR The etymology of the term “push-pull” dates back to the first vacuum tube amplifiers. It referred to the interpretation that one part of the circuit “pushed” current through a transformer connected to the amplifier output and the other complementary part “pulled” current from the transformer. Different push-pull BJT configurations can be found in literature, but APPENDIX F. PUSH-PULL BJT AMPLIFIER 220 Vo VCC v vo VBE vi VBE −VBE O VBE Vi O −VBE t −VCC Figure F.2: Cross-over distortion. For − I0 < i < I0 the output current i is zero because neither transistors Q1 and Q̄1 are in conduction. the basic topology is the two complementary NPN PNP transistors connected as show in Figure F.1. F.1 Push-Pull BJT Configuration vo ≃ vi − VBE AF T First, let’s consider just half of the BJT push-pull circuit, the one inside the gray area shown in Figure F.1. When the sinusoidal input vi is positive and greater than VBE but smaller than VCC , the NPN transistor Q1 turns on, i.e. the base-emitter junction is forward biased and the collector-base junction is reverse biased. The complementary transistor Q̄1 is in a cut off state because the base-emitter junctions is reverse biased. Apart from an offset VBE , the output vo follows the input VCC > vo > VBE , vo ≃ vi + VBE DR whereVBE ≃ 0.65 V. The previous analysis can be repeated for the negative portion of the sinusoid just considering that transistor Q1 is now in its cut off mode, and Q̄1 is on. We will have then − VCC < vo < −VBE , F.2. DISSIPATION AND EFFICIENCY 221 Vcc v− vi v+ Q1 − G vo vA + Q1 RL −Vcc Figure F.3: Push-pull amplifier using an Op-Amp to minimize crossover distortion. F.2 Dissipation and Efficiency AF T Figure F.2 shows the input and output signal of the circuit, and clearly the distortion produced by of this type of circuit. This signal distortion, called cross-over distortion, can be effectively minimized with some changes to the circuit. Figure F.3 a more complex and a little more costly but quite effective way to minimize the cross-over distortion. In this case, the ideal OpAmp eliminates the cross-over distortion thanks to the feedback from the circuit output to the OpAmp negative input. In fact, because the OpAmp will have to keep its input difference v+ − v− to zero it will have to compensate for all the difference between the push-pull circuit output and vi . The correction will show up at the OpAmp output v A and therefore at vo eliminating the cross-over distortion. As usual, limitations of real OpAmps and in particular bandwidth limitation make the correction more or less effective. DR One of the advantages of a push-pull configuration is the low power consumption. In fact, considering the ideal case where the amplifier characteristics shows zero current when no signal is present, the amplifier does not dissipate energy. In real circuits, there are always bias currents flowing through but usually they are quite small making power consumption very small compared to circuits with biased BJTs. APPENDIX F. PUSH-PULL BJT AMPLIFIER 222 V(out)(2), df: 6.7Hz, Avgs: 12 V(in)(1), df: 6.7Hz, Avgs: 12 0 10 −1 Amplitude [ V/sqrt(Hz) ] 10 −2 10 −3 10 −4 10 1000 2000 3000 4000 5000 Frequency [Hz] 6000 7000 8000 Figure F.4: Simulated square-root of the power spectral density of the basic push-pull circuit input and output. The simulation modeled the 2N2222 NPN and the 2N2907 PNP transistors, with a sinusoidal input amplitude of 10 V and 1 kHz frequency. F.3 Distortion N iC ≃ ∑ Gk ibk . k=0 Then, for a sinusoid DR i B = IB cos(ωt) , AF T We want to evaluate the type of distortion we will have due to the non ideal BJTs base collector current characteristic ( iC versus i B ) . Supposing that the characteristic can be written as a polynomial of the form and considering that the BJTs collector currents are 180◦ out of phase, we will have that the collector currents of the two BJTs are F.3. DISTORTION 223 N i 1 ≃ IB ∑ Gk cosk (kωt) k=0 N = α2k cos(2kωt) + ∑ k=1 N ∑ α2k+1 cos [(2k + 1)ωt] , k=0 N i 2 ≃ IB = ∑ Hk cosk (kωt + π ) k=0 N N k=1 k=0 ∑ β2k cos(2kωt) − ∑ β2k+1 cos [(2k + 1)ωt] . If the two transistors coefficients are the same (complementary BJTs perfectly matched), then the currents difference cancels the even terms out leaving just the odd terms αk = β k , k = 1, 2, ..., N ⇒ i L = i1 − i2 = 2 N ∑ α2k+1 cos((2k + 1)ωt), k=0 DR AF T In this case, the amplifier output shows just the odd harmonics. In case the two transistors are not perfectly matched we will also have the even harmonics as well. Figure F.4 shows the power spectra density output computed from a simulation of the basic push-pull circuit of Figure F.1. The simulation used the models of a 2N2222 NPN transistor, a 2N2907 PNP transistor and a sinusoidal input with 10 V of amplitude and 1 kHz of frequency. Note that the input is not an ideal sinusoid. As expected, the plots clearly show a large difference between the input and the output for the odd harmonics.