RADIOENGINEERING, VOL. 20, NO. 2, JUNE 2011
433
Supplementary First-Order All-Pass Filters with Two
Grounded Passive Elements Using FDCCII
Bilgin METIN1 , Norbert HERENCSAR2 , Kirat PAL3
1 Dept.
of Management Information Systems, Bogazici University, Hisar Campus, 34342 Bebek-Istanbul, Turkey
of Telecommunications, Brno University of Technology, Purkynova 118, 612 00 Brno, Czech Republic
3 Dept. of Earthquake Engineering, Indian Institute of Technology, Roorkee, 247667, Uttaranchal, India
2 Dept.
RADIOENGINEERING, VOL. 18, NO. 1, APRIL 2009
1
bilgin.metin@boun.edu.tr, herencsn@feec.vutbr.cz, kiratfeq@iitr.ernet.in
Supplementary First-Order All-Pass Filters with Two
Grounded Passive Elements Using FDCCII
Abstract. In this study, two novel first-order all-pass filresistors, two capacitors and two current conveyors. The
ters are proposed using only one grounded resistor and one
VM circuits in [15], [16] use two differential difference curgrounded capacitor along with a fully differential current
rent conveyors (DDCC) [21] and three grounded passive el1
conveyor (FDCCII). There is no element-matching
restricements
and they 2are
cascadable.
Bilgin METIN
, Norbert
HERENCSAR
, Kirat
PAL3 The circuit in [17] employs
tion. The presented all-pass
filter circuits can be made elecdifferential voltage conveyor (DVCC) [22] and two resistors.
1
Dept. of Management Information Systems, Bogazici University, Hisar Campus, 34342 Bebek-Istanbul, Turkey
tronically tunable due to
the
electronic
resistors.
FurtherIn [18], applications of the recently introduced analog build2
Dept. of Telecommunications, Brno University of Technology, Purkynova 118, 612 00 Brno, Czech Republic
more, the presented circuits3 Dept.
enjoyofhigh-input
impedance
for
ing block
(ABB)Roorkee,
called voltage
differencing
Earthquake Engineering, Indian Institute
of Technology,
247667, Uttaranchal,
Indiadifferential ineasy cascadability. The theoretical results are verified with
put buffered amplifier (VD-DIBA) is presented. The prodr.bilgin.metin@gmail.com, herencsn@feec.vutbr.cz,
kiratfeq@iitr.ernet.in
SPICE simulations.
posed VM all-pass
filter is composed of single VD-DIBA
and one grounded capacitor. The circuits in [19] have a single fully
current
conveyor
[23] as actheydifferential
are cascadable.
The
circuit (FDCCII)
in [14] employs
Abstract. In this study, two novel first-order all-pass
differential
conveyor
(DVCC) [18] and two
filters are proposed using only one grounded resistor and
tive elements
andvoltage
two passive
components.
resistors. The circuits in [15] have a single fully differential
one grounded capacitor along with a fully differential
this study,
in addition
theasFDCCII
based canonical
current
conveyor
(FDCCII) to
[19]
active elements
and
current conveyor (FDCCII). There is not element-matching In
two passive circuits
components.
restriction. The presented all-pass filter circuits can and
be cascadable
of
[19]
in
the
literature,
two suppleAnalog filter,made
all-pass
filter,
cascadable
filter,
high-Q
electronically tunable due to the electronic resistors.
mentary cascadable
VMin first-order
filters
are preIn this study,
addition to all-pass
the FDCCII
based
band-pass filter,
groundedthecapacitor,
MOSFurthermore,
presented FDCCII,
circuits enjoy
high-input
canonical
and cascadable
circuits of
[15] in employ
the literature,
sented.
The
proposed
cascadable
circuits
only
one
impedance for easy cascadability. The theoretical results
FET based resistors.
two supplementary cascadable VM first-order all-pass
are verified with SPICE simulations.
grounded
resistor
and
one
capacitor
and
they
have
no
elefilters are presented. The proposed cascadable circuits
ment matching
compared
to [14]–[16].
employ onlyrestriction
one grounded
resistor and
one capacitorThe
and introhave consist
no element
matching
restriction
compared in
to comduced they
circuits
of one
fewer
active element
[11]-[13].
introduced circuits
consist of oneexample
fewer the
parison
to [17].TheMoreover,
as an application
Keywords
active element in comparison to [14]. Moreover, as an
proposed
all-pass
filterstheare
used in
the implementation
of
Analog filter,
all-pass
filter, [1]
cascadable
filter, high-Q
application
example
proposed
all-pass
filters are used
In the literature different
active
elements
have been
the
high
quality
factor
(high-Q)
band-pass
(BP)
filter
cirband-pass filter, grounded capacitor, FDCCII,
in the implementation of the high quality factor (high-Q)
used in the design of MOSFET
voltage-mode
(VM) all-pass filters
based resistors.
band-pass that
(BP)is used
filter frequently
circuit [20]-[24]
is used frecuit [24]–[28]
in thethat
intermediate
[2]–[19] for different useful features, such as high input
the intermediate frequency stages of the
quencyfrequently
stages ofinthe
receiver circuits [27]. Different from the
receiver circuits [23]. Different from the circuits in [20]impedance, reduced number of active and passive elements
circuits
in the
[24]–[28],
presented
band-pass
[24],
presented the
high-Q
band-passhigh-Q
filter example
has a filter
Introduction
or having grounded1.capacitors,
etc. Some recent VM filter
fine-tuning
capability for its
pole frequency
andpole
it consists
example
has a fine-tuning
capability
for its
frequency
structures [13]–[19] emphasize
the importance
of the
design[1] have of only grounded capacitors. The simulation results are
In the literature
different active
elements
and it consists of only grounded capacitors. The simulation
used elements
in the design
voltage-mode
with only groundedbeen
passive
for of
easy
integrated(VM)
cir- all-pass used to verify the operation of the circuits.
results are used to verify the operation of the circuits.
filters [2]-[15]
for different
use full features,
such as high
cuit (IC) implementation.
Grounded
IC capacitors
have less
input impedance, reduced number of elements or having
parasitics comparedgrounded
to floating
counterparts.
Furthermore,
capacitors
etc. Some recent
VM filter circuits
the floating capacitors
require
an ICtheprocess
with
twodesign
polywith only 2. FDCCII and Circuit Description
[11]-[15]
emphasize
importance
of the
grounded
passive
elementsresistors
for easy integrated
circuit (IC)
Fully differential current conveyor (FDCCII) is an
layers. On the other
hand, the
grounded
can be reimplementation. Grounded IC capacitors have less
eight-terminal analog building block shown symbolically
placed by MOS based
electronic resistors [20] providing the
conveyorcaused
(FDCCII)
parasitics compared to floating counterparts. Furthermore, Fully
in Fig.differential
1. Consideringcurrent
the non-idealities
by the is an
advantages of less the
chip
area capacitors
and tunability.
electronifloating
require anThe
IC process
with two poly
eight-terminal ABB shown symbolically in Fig. 1. Considecally tunable circuits
have
an important
researchresistors
area can be
layers.
Onbeen
the other
hand, the grounded
replaced
by MOS circuits,
based electronic
resistors
[16] providing
VY1
Y1
in the design of analog
integrated
because
the tolerIZ+
Z+
the advantages of less chip area and tunability. The
VY2
Y2
ances of the electronic
components
in
the
IC
realization
can
FDCCII
electronically tunable circuits have been an important
Y3
VY3
be very high and thus
fine-tuning
is necessary.
IZZresearch
area in the
design of analog integrated circuits,
Y4
X+
XV
Y4
because the tolerances of the electronic components in the
In [13], the ICVM
all-pass
is designed
by
realization
can section
be very high
and thus fine-tuning
is
means of an operational
transconductance amplifier (OTA),
necessary.
Keywords
1. Introduction
2. FDCCII and Circuit Description
unity-gain differential amplifier,
activein voltage
divider,
and
The VM circuits
[11] employ
two resistors,
two
and two
currentinconveyors.
The VM
grounded capacitor.capacitors
The VM
circuits
[14] employ
twocircuits in
[12], [13] use two differential difference current conveyors
(DDCC) [17] and three grounded passive elements and
I X+
I X-
1. symbol
The symbol
of the
FDCCII.
Fig. 1.Fig.
The
of the
FDCCII.
B. METIN, N. HERENCSAR, K. PAL, SUPPLEMENTARY FIRST-ORDER ALL-PASS FILTERS WITH TWO GROUNDED ...
434
FDCCII
Y2
ZFDCCII
Y3
Y2 Y4
FDCCII
Z- Z+
Y3 Y1
XX+
Y2Y4
Z- Z+
Y3
Y1 XX+
Z1
Z2
Y4
Z+
Y1 XX+ Z
Z
Vi
Vi
Vi
1
Vo
Z1 − Z2
=
.
Vi
Z1 + Z2
Vo
Vo
Transfer function in (3) yields to two all-pass filter circuits under the specialization of Z1 and Z2 shown in Fig. 2(b)
and 2(c). Their transfer function can be given as follows:
Vo
2
Z1
Vo
−1 + sCR
=K
Vi
1 + sCR
Z2
Y2
FDCCII
Y3
Z-
Vo
Y2 Y4
FDCCII
Z- Z+
Y3
X+
Y2Y4 Y1 XZ- Z+
Y3
Y1 XX+
Y4
R
C
Z+
Y1 XX+
Vi
Vi
R
Vo
−αN β4 + αP β3 sCR
Vo
=
.
Vi
(αN + αP sCR) β2
Vo
C
R
(b)
FDCCII
Y2
FDCCII
Vi
Vi
Vi
Z-
Vo
FDCCII
Y3
Z- Z+
X+
Y2Y4 Y1 XZ- Z+
Y3
Y1 XX+
Y4
C Z+
Y1 XX+
(c) R
Fig. 2. (a) Presented general structure of VM all-pass filter,
(b) first presented VM all-pass filter circuit,
(c) second presented VM all-pass filter circuit.
ring the non-idealities caused by the physical implementation of the FDCCII [23], it is described with a matrix equation as follows:




VX+
0
 VX−   0

=
 IZ+   αP
IZ−
0
0
0
0
−αN
β1
−β1
0
0
−β2
β2
0
0
αN0
,
1 + sτN
αP (s) =
αP0
,
1 + sτP
Vo
R
C
C
αN (s) =
Vo
R
(5)
The parasitic capacitances in the implementation of the
active elements limit the high frequency operation. To evaluate high frequency performance, the frequency dependency
of the current and voltage transfer ratios should be taken into
account. Therefore, α(s) and β(s) for FDCCII will be modeled with first-order functions for simplicity as:
C
Y3
Y2 Y4
(4)
where K = +1 for Z1 = R and Z2 = 1/sC illustrated in
Fig. 2(b) and where K = −1 for Z1 = 1/sC and Z2 = R illustrated in Fig. 2(c). Considering the active element nonidealities as given in (1), the transfer function for the circuit
in Fig. 2(c) can be given as follows:
(a)
FDCCII
Vi
(3)
β3
0
0
0


0


β4 

0 


0
IX+
IX−
VY1
VY2
VY3
VY4








(1)
where ideally β1 = β2 = β3 = β4 = 1 and αP = αN = 1 that
represent the voltage and current transfer ratios of the FDCCII, respectively.
The transfer function of an all-pass filter can be given
as follows:
Vo (s)
1 − sτ
=K
(2)
Vi (s)
1 + sτ
where K is the gain constant and its sign determines whether
phase shifting is from 0 to π or from π to 0, and τ is the
time constant. The proposed circuits are shown in Fig. 2.
The general VM transfer function of the circuit in Fig. 2(a)
is given for the ideal case (β1 = β2 = β3 = β4 = 1 and
αP = αN = 1):
βk (s) =
βk0
,
1 + sτβk
(6)
for k = 1, 2, 3, 4 and where the αN0 , αP0 , and βk0 are the
value of the current and voltage transfer ratios at low frequencies and ωN = 1/τN , ωP = 1/τP , and ωβ = 1/τβ represent their corresponding poles. Combining (5) and (6), the
frequency dependent transfer function of the presented allpass circuit in Fig. 2(c) can be obtained as follows:
−αN0 β40 (1 + sτP ) 1 + sτβ3 +
1 + sτβ2
+αP0 β30 sCR (1 + sτN ) 1 + sτβ4
Vo
=
.
Vi
αN0 (1 + sτP ) +
β20
1 + sτβ3 1 + sτβ4
+αP0 sCR (1 + sτN )
(7)
Equation (7) shows that extra poles appear due to onepole model additional to pole at 1/CR. If the frequency of
these additional poles are sufficiently higher than the pole of
the presented all-pass filter such as (CR)−1 min{ωβ3 , ωβ4 ,
ωαP , ωαN }, their effect on the frequency can be ignored.
3. Simulation Results
To verify theoretical results the proposed filter circuit
shown in Fig. 2(c) is simulated by the SPICE simulation
program. The FDCCII was realized based on the CMOS implementation in [23] (Fig. 3) and simulated using 0.35 µm,
level 3 MOSFET parameters. The aspect ratios of the MOS
transistors are given in Tab. 1. DC supply voltages of ±1.3 V
and Vbp , Vbn biasing voltages of 0 V are used. Biasing
currents are chosen as 150 µA. The frequency response of
the proposed circuit in Fig. 2(c) is given in Fig. 4(a) for
RADIOENGINEERING, VOL. 20, NO. 2, JUNE 2011
435
VDD
M7
M13
M14
M15
M18
M19
M8
M9
M22
M27
Vbp
M29
M30
Vbp
M33 M37
M41
M34 M38
M42
IB
Z+
M25
M16
X+
M20
M3
Y3 Y1
M1
M2
Y2 Y4
M5
X-
M6
Vbn
M31
Vbn
M10
M24
M26
M4
M11
Z-
M35 M43
M39
M36 M44
M40
M12
M21
M32
M17
M23
M28
ISB
VSS
Fig. 3. CMOS FDCCII implementation based on [23].
Transistors
M1-M6
M7-M9, M13-M15, M18, M19, M22,
M23, M25, M27, M29, M30, M33,
M34, M37, M38, M41, M42
M10-M12, M16, M17, M20, M21,
M24, M26, M28, M31, M32, M35,
M36, M39, M40, M43, M44
C = 100 pF and R = 1.5 kΩ. The effects of the temperature on frequency response are examined for 10◦ C, 27◦ C,
and 50◦ C in Fig. 4(b). The frequency response is slightly
affected by the temperature. Time domain analysis of the
proposed circuit in Fig. 2(c) for a 0.4 V peak-to-peak input
signal at 100 kHz is given in Fig. 5 for passive element values of C = 100 pF and R = 10 kΩ. Total harmonic distortion
at this frequency is found as 1.1 %. There is a 25 mV offset voltage at the output caused by the non-idealities of the
FDCCII.
W(µm)
4.4
L(µm)
0.35
35
0.35
8.8
0.35
Tab. 1. Transistor aspect ratios.
10
-0d
Phase
-0d
Phase
Phase (Degree)
5
-100d
Phase (Degree)
Gain (dB)
Gain (dB)
5
0
0
-5
-100d
Gain
Gain
-200d
-5
-200d
-250d
100Hz
1.0kHz
10kHz
-250d
100Hz
1.0kHz
10kHz
_______
……….. Ideal
Simulated
_______ Simulated
……….. Ideal
-10
-10
100kHz
100kHz
1.0MHz
1.0MHz
10MHz
10MHz
100MHz
100MHz
Frequency
Frequency
(a)
10
(a)
(a)
-0d
10
-0d
Phase
Phase
5
-5
-10
0
-5
-10
Phase (Degree)
Gain (dB)
0
Phase (Degree)
5
Gain (dB)
The presented all-pass filter is used to implement an
electronically tunable high-Q band-pass (BP) filter application [24]–[28] as shown in Fig. 6. The quality factor of the
band-pass filter is determined by RA and RB that is approximately equal to Q ≈ RA /RB [27]. In Fig. 6(a), the capacitor and resistor values are chosen as C1 = C2 = 30 pF,
R1 = R2 = 2 kΩ, RA = 30 kΩ, and RB = 1 kΩ for a pole frequency of 2.65 MHz. Although the theoretical Q value is 30,
in the simulations we have obtained Q = 25. The simulation
results are given in Fig. 7. The center frequency of the BP
filter circuit is found as 2.2 MHz in the simulation. Deviations from the ideal response result are caused by the nonidealities of the FDCCII used in the simulations. Fortunately,
this deviation in the pole frequency can be corrected by fine
tuning that can be achieved replacing grounded resistors with
MOSFET based resistors [20] as shown in Fig. 6(b). The
simulation results for the fine tuning of this circuit are illustrated in Fig. 8. The transistor aspect ratios for the MOSFET based electronic resistor in Fig. 6(b) are chosen as
(W/L)M1 = (W/L)M2 = 10.5 µm/1.4 µm and capacitor values
are chosen as C1 = C2 = 30 pF. The pole frequency of the circuit is tuned between 3.14 MHz and 4.7 MHz by changing
the control voltage VC is changed between 0.8 V and 1.0 V.
The parasitics and the non-idealities of the active elements
cause change in the magnitude of the gains at the center frequency of the filter at high frequencies.
10
-100d
-100d
Gain
Gain
-200d
-200d
-250d
-250d
100Hz
1.0kHz
10kHz
100kHz
1.0MHz
100Hz
1.0kHz
10kHz
100kHz
1.0MHz
______
Ideal
_ _ _Simulated
_ Simulated ……….
……….
Ideal Frequency
10MHz
10MHz
100MHz
100MHz
Frequency
(b)
(b)(b)
Fig. 4. (a) Frequency response of the presented circuit, (b) the
Figure
4. (a)
Frequency
thethe
presented
circuit.(b)
The
effect
Figure
4. (a)
Frequency
of
presented
circuit.(b)
The
effectofofthe
thetemperature
temperature
effectresponse
ofresponse
the of
temperature
change
on the
frequency
rechange
on the
frequency
response
change
on the
frequency
response
sponse.
B. METIN, N. HERENCSAR, K. PAL, SUPPLEMENTARY FIRST-ORDER ALL-PASS FILTERS WITH TWO GROUNDED ...
436
300mV
0
-10
0
Gain (dB)
Amplitude
200mV
-20
-200mV
-30
-300mV
9us 10us
______
12us
14us
16us
18us
______ Ideal Output
Input
20us
22us
24us
…….. Simulated Output
Time
-40
500kHz
_ _ _ _ Simulated
Figure 5. Time domain analysis of the presented circuit
1.0MHz
______ Ideal
3.0MHz
10MHz
Frequency
Fig. 5. Time domain analysis of the presented circuit.
Figure 7. Frequency response of the high-Q band-pass filter example
Fig. 7. Frequency response of the high-Q band-pass filter example.
0
FDCCII2
Y2
Y2
Z-
Y3
Y4
Vi
Y1
X-
RB
Z-
Y3
Z+
Y4
X+
Y1
C1
R1
1
X-
R2
C2
Gain (dB)
(a)
(a)
RA
Vi
Vi
RA
Z-
Y2Y3
Z+
Y3Y4
Y2Y3
Y3Y4
Z-
Y4Y1 X-
Z+X+
Y1 X-
X+
C1
M1
C1
−VC
+VC
−VC
-30.0
1.0MHz
-39.6
300kHz
_ _ _ _ Vc = 0.8V
Vo
Vo
C2
M2
Rmos2 M1
C
RB
X+
M2 R
mos1
M2 R
+V mos1
1
1
Z+
Z+ X+
Y1 X-
M1
−VC
Z-
Rmos2 M1
-20.0
_ _ _ _ Vc=1.0V
RB
Z-
Y4Y1 X-
-10.0
-20.0
-30.0
-39.6
300KHz
FDCCII2
Y2
FDCCII2
FDCCII1
Y2
FDCCII1
0
-10.0
Vo
Z+
X+
Gain [dB]
RA
FDCCII1
C2
Figure 8.
example
3.0MHz
______ Vc=0.9V
1.0MHz
______ Vc = 0.9V
10MHz
30MHz
. . . . . . . . Vc=0.8V
Frequency
3.0MHz
. . . . . . . . Vc = 1.0V
10MHz
30MHz
Illustrating fine-tuning of the pole-frequency for the high-Q band-pass filter
Frequency
Figure 8. Illustrating fine-tuning of the pole-frequency for the high-Q band-pass filter
example Fig. 8. Illustrating fine-tuning of the pole-frequency for the
high-Q band-pass filter example.
M2
+VC
−V(b)
+VC
C
Figure 6. (a) A high-Q band-pass (b)
filter example using presented all-pass filter
(b) Electronically tunable form of the example band-pass filter
Fig. 6. (a) A high-Q band-pass filter example using presented
all-pass filter, (b) electronically tunable form of the example band-pass filter.
4. Conclusion
In this study, two minimal first order all-pass filter realizations are given using only grounded passive elements.
The proposed circuits have the advantage of having high input impedance for easy cascadability. The presented all-pass
filter circuits are used in a tunable high-Q band-pass filter
example. Simulations are performed to verify the theory.
Acknowledgements
This work was supported by Bogazici University
Research Fund with the project code 08N304, Czech
Ministry of Education under research program MSM
0021630513, and GACR projects under No. P102/11/P489
and P102/09/1681. Authors also wish to thank the reviewers
for their useful and constructive comments.
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About Authors. . .
Bilgin METIN received the B.Sc. degree in Electronics
and Communication Engineering from Istanbul Technical
University, Istanbul, Turkey in 1996 and the M.Sc. and
Ph.D. degrees in Electrical and Electronics Engineering from
Bogazici University, Istanbul, Turkey in 2001 and 2007, respectively. He is currently an Assistant Professor in the Management Information Systems Department, Bogazici University. His research interests include continuous time filters,
analog signal processing applications, current-mode circuits,
computer networks, and network security. He was given
the best student paper award of ELECO’2002 conference in
Turkey. Dr. Metin has over 30 publications in scientific journals or conference proceedings.
Norbert HERENCSAR received the M.Sc. and Ph.D. degrees in Electronics & Communication and Teleinformatics
from Brno University of Technology, Czech Republic, in
2006 and 2010, respectively. Currently, he is an Assistant
Professor at the Dept. of Telecommunications, Brno University of Technology, Brno, Czech Republic. From September
2009 through February 2010 he was an Erasmus Exchange
Student with the Dept. of Electrical and Electronic Engineering, Bogazici University, Istanbul, Turkey. His research interests include analog filters, current-mode circuits, tunable
frequency filter design methods, and oscillators. He is an
author or co-author of about 67 research articles published
in international journals or conference proceedings. Since
2008, Dr. Herencsar serves in the organizing and technical
committee of the Int. Conf. on Telecommunications and
Signal Processing (TSP). In 2011 and 2012, he is guest coeditor of TSP 2010 and TSP 2011 Special Issues on Signal
Processing, published in the Radioengineering journal. Dr.
Herencsar is Senior Member of the IACSIT and Member of
the IAENG and ACEEE.
Kirat PAL was born in Aligarh, India on 20th August 1950.
He received the B.Sc & M.Sc degree from the Aligarh Muslim University in 1972 and 1977 respectively and the Ph.D.
degree from the University of Roorkee (Presently Indian Institute of Technology, Roorkee) in 1982. He joined University of Roorkee as a scientific officer in 1979 and worked
in various capacities as lecturer, reader and at present holds
the post of Associate Professor in Earthquake Engineering
Dept. of Indian Institute of Technology Roorkee. His main
research interests are analog circuits and signal processing,
transducers, seismological instrumentation and digital image
processing. Dr. Pal has authored more than 100 research papers in the above areas in national, international journals and
conferences.