Comp 150
Booleans and Digital Logic
Recall the bool date type in Python has the two literals True and False and the three
operations: not, and, or.
The operations are defined by truth tables (see page 247)
P | not P
---------F
T
T
F
P | Q | P and Q
---------------F
F
F
F
T
F
T
F
F
T
T
T
P | Q | P or Q
--------------F
F
F
F
T
T
T
F
T
T
T
T
Digital Logic is a hardware realization of the Boolean data type. The and, or and not
operations are implemented as discreet logic gates which exhibit the same behavior. However,
instead of using T’s and F’s, we use 1’s and 0’s which might be thought of as representations for
physical attributes like on/off or high-voltage/low-voltage.
P | not P
---------0
1
1
0
P | Q | P and Q
---------------0
0
0
0
1
0
1
0
0
1
1
1
P | Q | P or Q
--------------0
0
0
0
1
1
1
0
1
1
1
1
The Basic Logic Gates
The basic logic gates can be wired together to form physical circuits that behave the same way
Boolean expressions do. For example, here is a simple AND gate circuit
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The input (0 or 1) from the switches on the left flow through the AND gate to the light on the
right. The light comes on (state = 1) if and only if the two switch are “on” (in the 1 state) since
the P and Q is 1 if and only if both P and Q are 1
Compound Expressions and Digital Circuits: Consider the compound Boolean expression
(P and Q) or R. This is implemented by the following circuit
Note that the arrangement of logic gates. In the Boolean expression P is “and-ed” with Q and the
result “or-ed” with R. In the digital logic circuit the output of the AND gate whose inputs are P
and Q is one of the inputs of OR gate whose other input is R. Thus the order of evaluation of a
Boolean expression dictates in a natural way the gate arrangements of the corresponding digital
logic circuit.
Consider (P or Q) and (not (P and Q))
This circuit implements the above Boolean expression. Numbers identify gates with a Boolean
operation. Again note how the order of evaluation dictates the gate arrangement.
(P or Q) and (not (P and Q)).
1
4
3
2
2
The behavior of this circuit can be seen in the following truth table
1
3
2
P | Q
P or Q
not (P and Q)
------- -------- --------------0 | 0
0
1
0
0 | 1
1
1
0
1 | 0
1
1
0
1 | 1
1
0
1
4
(P or Q) and not (P and Q)
-------------------------0
1
1
0
There are four possible arrangements of inputs for P and Q as listed on the left. Phrases with the
compound expression like P or Q , (P and Q) and not (P and Q) are evaluated
separately (understand the column under the not negates (P and Q)) . The final column on
the right which lists all possible values of the expression for any input is obtained by the
conjunction (a fancy word for “and”) of P or Q and not (P and Q). The numbers indicate
the order of evaluation which correspond to the numbered gates in the circuit diagram
Using Digital Logic to Show Equivalence Expressions: Recall De Morgan’s Laws
not (P and Q) = (not P) or (not Q)
not (P or Q) = (not P) and (not Q)
The first De Morgan’s Law is displayed as a logic circuit below.
Both circuits have the same switches for input. If the two circuits are equivalent then both light
will be on or both will be off for any configuration of inputs. Thus digit logic circuits can used to
demonstrate the equivalence of Boolean expressions
The XOR Gate: There is another standard logic gate called eXclusive OR, denoted as xor, which
is P or Q but not both. Its truth table is
P Q
P XOR Q
------ --------0 0
0
0 1
1
1 0
1
1 1
0
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The regular Boolean or is sometimes referred to as an inclusive OR.
There is also an XOR logic gate
Python does not have an XOR Boolean operator although you could define a function for one
since it’s not difficult to show that
P xor Q = (P and not Q) or (not P and Q)
In Python
def xor(p,q):
return (p and not q) or (not p and q)
Using Digit Logic to Implement Boolean Functions: Given the truth table for a Boolean
function, there are techniques to construct a digital logic circuit that implements the function.
For example – Boolean Addition: a + b. Here we have both a sum and a carry result
0
+0
--0
0
+1
--1
1
+0
--1
Truth Table
a
b
sum carry
--- ----- ----0
0
0
0
0
1
1
0
1
0
1
0
1
1
0
1
1
+1
--10
Note that the sum result looks like xor and the carry looks like and. Thus using an XOR and an
AND gate we construct a Half-Adder Circuit.
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Cascading two half adder circuits the right way yields a full adder circuit – one with three inputs,
carry in, a, and b and two outputs sum and carry out. This implements binary addition which
allows for a carry in from an addition on the right.
If you carefully trace this circuit, you will see that it does binary addition with a carry in from the
right.
If we line up 32 copies of a full adder and link the carry outs to the adjacent carry ins, we have a
32 bit ripple carry adder – the kind of addition circuit you would find realized in a computer.
Tracing Digital Logic Circuits: Given a digital logic circuit, you should be able to create a truth
table that describes the circuit. This is simply a matter of carefully tracing all possible input
values for the circuit. Consider the following circuit. How do we fill in the results for the truth
table?
P | Q | result
--------------0
0
?
0
1
?
1
0
?
1
1
?
Start by listing out all possible input values for P and Q. We then attach bit strings to the outputs
of the switches in the circuit and methodically trace the strings through each logic gate until we
arrive at the end. So if the inputs to an OR gate are 1100 and 0101, the output would be 1101
since the only 0 in the third position occurs when both inputs (in the 3rd position) are both 0.
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Thus the result for the truth table is obtained
P | Q | result
--------------0
0
1
0
1
1
1
0
0
1
1
1
Designing Digital Logic Circuits from Truth Tables: Up to now, given a truth table we’ve
been using ad-hoc techniques to create digital logic circuits. However there are a number of
techniques to create a circuit from a truth table. We present one below called Sum of Products.
1.
Begin with a truth table for the function you’re trying to create the circuit for.
P Q R | RESULT
---------------0 0 0
1
0 0 1
0
0 1 0
0
0 1 1
1
1 0 0
0
1 0 1
1
1 1 0
1 1 1
1
0
min-term
-----P ⋅Q ⋅ R
P ⋅Q ⋅ R
P ⋅Q ⋅ R
P ⋅Q ⋅ R
2.
For each row entry that results as 1 generate a min-term expression (a product). A minterm is constructed by “and-ing” each Boolean variable or its complement. A min-term has the
property that there is exactly one configuration of values for its variables which makes it equal to
1. For example the min-term P ⋅ Q ⋅ R equals 1 if and only if P = 0, Q = 0 and R = 0.
Notice the pattern: if the value of the variable is 0, then use the complement of the variable;
otherwise use the variable itself in the expression.
Min-terms are mutually exclusive in the sense that two different min-terms can never be 1 for the
same set of values.
3.
Or the min-term expressions together (sum of products)
P ⋅Q ⋅ R + P ⋅Q ⋅ R + P ⋅Q ⋅ R + P ⋅Q ⋅ R
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By the mutually exclusive property of min-terms, the only time the above sum of min-terms
above is equal to 1 is when exactly one its min-terms is 1 which corresponds, in this case, to the
four rows of the truth table used to generate the min-terms
4.
The behavior of the above sum of product expression can be expressed as a digital logic
circuit consisting of 3 NOT gates, 4 three-input AND gates and 1 four-input OR gate.
A three-input AND gate behaves like a pair of cascaded two-input AND gates and a four-input
OR gate behaves like 3 cascaded two-input OR gates
Thus the final circuit looks like the following
It should be noted that the above sum of product circuit is not efficient in its use of gates. There
are ways to implement an equivalent circuit using fewer gates.
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