NODAL ANALYSIS
A branch of an electric circuit is a connection between two points in the circuit. In general a simple wire
connection, i.e., a 'short-circuit', is not considered a branch since it is known directly that there is no
voltage drop across a short-circuit and the current in the short-circuit is whatever is required to satisfy
KCL. Although it is neither required, nor always desirable, ordinarily for simplicity each branch
contains a single circuit element.
A node is a point of connection of two or more branches. In general 'dangling' branches, i.e., branches
each of which is connected only to a single node are assumed to have been removed from the circuit
insofar as analysis of the circuit is concerned. Dangling branches are known directly to have at most a
constant voltage drop (e.g., a voltage source) and carry no current. Finally it is assumed that the circuit
does not have 'separate parts', i.e., consist of two or more electrically disconnected parts. It must be
possible to trace a path along circuit branches between any two nodes. For circuits with separate parts
each part can be analyzed separately. In practice these conditions are rarely violated.
A circuit is analyzed by application of KVL, KCL, and the volt-ampere relations for the circuit branch
elements. Nothing else is needed nor used. The three requirements are applied until a sufficient
number of independent equations are obtained to solve for all branch voltages and all branch currents.
This is far more subtle a procedure in practice than it sounds. An electric circuit usually involves many
branches and many nodes, and a haphazard search for a sufficient number of independent equations can
be quite enervating. Therefore we consider various ways of undertaking a circuit analysis with the
general aim of assuring that a solution will be found with a minimum effort to do so.
One way to solve a circuit problem is simply to guess at the answer. This is not a facetious suggestion.
There are circumstances when guessing is inappropriate, most circumstances in fact, but there are other
occasions when it is quite appropriate and even preferable. The reason for mentioning this option is to
assert (without proof) a mathematical 'existence' theorem, which states that
a) There is always‡‡ a solution for a linear circuit analysis problem (assuming a consistent circuit
description as described above).
‡ ‡ (Well, almost always. Circuit analysis deals with idealized elements, and
these can be assembled in redundant, in contradictory, and in indeterminate
combinations. For example it is possible for a circuit to include a loop formed
from only voltage sources. The sum of the source voltages around the loop
must satisfy KVL. Now imagine a current circulating around this loop. KVL is
not involved in this circulation. KCL is satisfied; at each node the loop current
leaving one source enters the neighboring source. And the source constitutive
relations impose no constraints on the current. All these remarks apply
whatever the current magnitude; any current can be specified. In reality this
condition does not occur; all real voltage sources include some series resistance.
As it happens even for idealized circuit elements a loop of voltage sources
almost never is encountered. Two exceptions occur. First there is the
pedagogical mention of the possibility, as in this case. Occasionally a loop of
voltage sources is encountered in a computer analysis; circuit analysis programs
preview a circuit specification to detect and point out such anomalies. And
require correction before proceeding. The usual reason for this sort of
encounter is an error in specifying circuit connections. If a voltage source loop
is vital a small but finite resistance (1 picoohm?) can be inserted in series with a
source.
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M H Miller
Another circumstance where idealized elements introduce indeterminacy is
where, for example, the circuit can be divided into two groups of branches with
only current sources connecting the two groups. The sum of the currents in the
connecting sources must satisfy KCL, i.e. there is no net current leaving one
group of branches or the other. The upper diagram in the figure following
illustrates such a case.
The lower circuit simply separates the two sets without contravening KCL.
KVL is not compromised; the constitutive relations for the idealized current
sources permit any necessary voltage across a source. This also is a situation
that does not occur for real sources. A computer analysis program will detect
this anomaly as well; if it is a pedagogical requirement add a large but finite
resistance (1 gigaohm?) in parallel with the current sources.
We handle such circumstances simply by ignoring them. They are invariably
rare, when they do occur it is usually because of an error, and in any case are
more or less readily resolved.
b) That solution is unique; it may assume different descriptive forms but all of these forms will be
mathematically equivalent and can be converted one to any another if desired;
c) A necessary and sufficient test for a validity of a solution is that it satisfies KCL, KVL, all the
branch volt-ampere relations, and any initial conditions placed on the circuit. (Initial
conditions are something we deal with later in connection with circuit elements yet to be
discussed; for the circuits dealt with for the present they will be automatically satisfied.
Basically the initial conditions take account of the net energy if any supplied to the circuit prior
to the time at which the analysis undertaken is assumed to begin.)
There is naturally a certain reassurance in knowing beforehand that finding a solution is possible, that
there is only one solution to look for, and that there is a well-defined test to verify that a proposed
solution is indeed the solution. In fact in most cases proposing a solution and testing it for validity are
essentially done concurrently as part of the analysis procedure. If KCL, KVL, and the branch voltampere relations are used (correctly!) to solve for the circuit voltages and currents then the solution is
automatically validated.
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M H Miller
As is noted before recognition of items a), b), and c) above is the principal reason for suggesting, not
entirely facetiously, educated guessing as a method of circuit analysis. Every so often, as we will see
later, guessing is the easiest way to go. Ordinarily however there is an overriding advantage to using an
organized procedure, which is known a priori to obtain the solution with a minimum of effort. One of
these methods is called a 'nodal' or 'node-to-datum' analysis. Because it involves a possible
complication that requires a modest special consideration it is convenient to place one temporary
constraint on the circuits to which the analytical procedure is applied, and that is that a voltage source
branch is required to have a finite series resistance as well. As a practical matter this will always be so,
and as a computational subterfuge a resistor whose resistance is so small as to have negligible
quantitative effect on circuit voltages and currents can be introduced to satisfy the letter of the
requirement. However even in the theoretical limit in which the series resistance is zero the constraint
can, and in due time will be, be lifted. Nevertheless, for the moment, no voltage source is allowed
without an accompanying series resistor.
Suppose a circuit involves B branches and N nodes. Here is an algorithm to calculate all the branch
voltages and currents.
Step # 1: Select one node as the reference (datum or 'ground') node. The choice is theoretically
arbitrary, but usually a particular node will stand out as a particularly convenient candidate for
nomination as the reference. Most of the time, for reasons to be seen, the convenient choice for
the reference node will be a node with the greatest number of branch connections.
Step #2: Define Iij as the current directed from node I to node j. Apply KCL to each node in turn
of the circuit except the reference node; KCL automatically is satisfied at the datum if it is
satisfied at all the other nodes. This provides N-1 independent equations involving the B branch
currents of the form (for node i)
There are N-1 such equations, that is the index i ranges over all the nodes except the datum. For
the sake of making a point imagine the node equations written one by one. As each new
equation is written it must involve a branch current not involved in any of the previous
equations; there will be previously unused branches connecting to the 'new' node. Hence each
successive equation will be independent of its predecessors. Of course 'independence' is a
property of the equations and not of the order in which they are written; the equations will be
independent no matter what order they are written in.
Step #3: Choose the minimum number of voltage variables needed to express all the branch
voltage drops. The easy way to do this is to choose as the variables the voltage drop from each
node to the datum node. It is conventional to omit an explicit reference to the datum node,
leaving this to be understood. Actually the voltage variables each may be chosen independently
as a voltage rise or a voltage drop. Theoretically this doesn't matter. As a practical matter
however there is strong reason to choose the variables either all as rises or all as drops. One
immediate convenience of this choice is that there is no need to keep individual track of whether
a particular variable is a rise or a drop. But there is further advantage to uniformity, as will be
seen later.
The voltage drop across any branch can be expressed in terms of no more than two node
voltages. For a branch one of whose nodes is connected to the datum the voltage drop across
that branch is the node voltage at the other node. Otherwise the drop from node a to node b is
equal to the voltage at node a (i.e., node a to datum) - the voltage drop at node b (datum to node
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M H Miller
b). There are N-1 node voltage variables, exactly the number of independent node equations in
item 2.
Step #4: Express each branch current in terms of the branch voltage using the branch volt-ampere
relations, and substitute in the N-1 KCL node equations. The result is a set of N-1 independent
equations in N-1 node voltage variables, and these can be solved by any of several methods;
Cramer's Rule, Gauss Elimination, etc.
Example
Consider the application of a nodal analysis to the circuit drawn below. The reference node (the datum)
is indicated by the ground symbol. There are four
nodes (right-angle corners and short-circuit
connections do not of course affect the
topological connection information conveyed),
and so there are three nodal (KCL) equations to
write. The node variables to be used are the three
voltage drops e1, e2 and e3. These voltage drops
are understood to be from a node to the datum,
and with this understanding there is no need to
clutter the diagram with explicit ± signs. (One
could use voltage rise from the node to the datum
as the variable. This would result in values for
branch voltages and currents that are the negative
of those calculated for a voltage-drop choice. But
since the polarity markers are reversed the two
sets of solutions are different descriptions of
precisely the same things.)
We can skip writing the KCL equations formally. The analysis is so straightforward that we can
substitute for the currents from the branch volt-ampere relations directly. Thus consider the KCL
equation for node (subscript) 1. There are four branches attached to node 1, and so four terms in the
KCL equation. Suppose we write the KCL equation in the form
Sum of the source currents in = Sum of the branch currents out
There is a certain conceptual advantage to this form of KCL; it separates the sources which 'excite' the
circuit from the branch currents which result from the excitation. Obtaining the left side of the equation
is straightforward; there is one source which inserts 1 ampere into the node (more generally a volume of
space enclosing the node), and another which inserts 2 amperes.
The other side of the equation is only slightly more involved to obtain. Consider for example the current
flowing out of node 1 through the 4 Ω branch. The voltage drop from node 1 to node 3 is e1 - e3. This
is obtained by a straightforward application of KVL; the voltage drop from node 1 to node 2 is equal to
the voltage drop from node 1 to the datum plus the voltage drop from the datum to node 3. The latter
voltage drop is minus the drop from node 3 to the datum. Hence the current flowing out of node 1 in the
4 Ω branch is (e1 - e3)/4. Similarly, by direct inspection, the current flowing out of node 1 through the
1 Ω branch is (e1 - e2)/1. Hence
1 + 2 = (e1 - e3)/4 + (e1 - e2)/1
Similarly for node 2
0 = (e2 - e1)/1 +e2/2 + (e2 - e3/8
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M H Miller
and for node 3
-2 = (e3 - e1)/4 + (e3 - e2)/8 + e3/5
After algebraic simplification the three independent equations in three unknowns are
3 = 1.25 e1 - e2 - 0.25e3
0 = - e1 + 1.625e2 - 0.125e3
-2 = - 0.25e1 - 0.125e2 + 0.575e3
Solving (Gauss elimination or Cramer's Rule or computer-aided analysis):
e1 = 4.1374 v
I20 = 1.229 a
e2 = 2.458 v
I30 = -0.22901 a
e3 = -1.145 v
I12 = 1.6794 a
I 23 = 0.45038 a
I13 = 1.3206 a
It is not a bad idea to verify KCL at the three nodes, and to calculate a branch current or two from the
node voltages and compare with the listed values.
The illustrative circuit has no voltage source branches, an arbitrary constraint that was imposed earlier.
As was noted at the time the constraint really is not necessary, and was stated mostly for purposes of
sensitizing you to the observations to be made now. The singular aspect of a voltage source branch in a
nodal analysis is that it introduces a node 'variable' which need not be used in the algorithmic procedure.
If the voltage source is between a node and the datum then the node voltage is equal to the source
voltage, and it is not necessary to treat that node
voltage as an unknown. If the voltage source is
connected between two nodes neither of which is the
datum then one node voltage is readily calculated if
the other is known by a simple addition (or
subtraction). There are several ways of treating a
voltage source branch, some more convenient for
machine computation than for 'hand' calculation.
A direct 'fix' for the presence of a voltage source
branch is to consider the branch current as an
independent variable in addition to the node
voltages. Of course that requires an additional
independent equation for a solution to be possible.
But the source branch voltage provides such an
equation. In the illustrative circuit for example the voltage source branches offset the introduction of
two current variables with the two equations e1 = 1 and e1 - e3 = 2 (or e3 = -1). A disadvantage of this
method for hand calculations, not so bad really for 'small' problems, is that the number of equations to
be solved is increased.
The node equations for the example circuit expressed in matrix form are:
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M H Miller
Note the inclusion of the voltage source currents as independent variables, and the addition of the two
source strength equations.
An alternative procedure more convenient for hand calculations directly incorporates the fact that the
voltage source strengths effectively reduce the number of unknown node voltages. The idea is
illustrated below. First select a set of voltage sources (if any) which form a voltage source tree, i.e.,
any voltage source branch in the tree can be reached from any other voltage source branch using only
voltage source branches; such a tree is enclosed by a loop in the diagram. The sources so enclosed form
a 'supernode', a closed volume containing only voltage source branches. If one of the enclosed voltage
sources is connected to the datum node then the associated (non-datum) node voltage is known; for
example one can write for the illustration e1 = 1. Depending on your preference you may remove e1
from the set of node voltage variables, substituting where necessary its known value, or keep it as a
variable and include e1 = 1 as an independent equation.
We can write a KCL equation for the supernode that does not involve the current through either voltage
source as shown. Thus the current out of the supernode into node 3 is -ia + ic + id, and these currents
can be expressed in terms of the node voltages. Moreover the current out of the supernode at node 1 is
ia + ib, which can be expressed in terms of node voltages, and KCL applied to the supernode is
(–ia + ic + id) + (ia + ib) = 0. The explanation is a bit extended, but in practice this equation would be
written in terms of the node voltages directly by inspection.
The voltage expression for e1, the above supernode KCL equation, and a third KCL equation for node 2
provide three independent equations to determine the three node voltages. If a circuit contains more
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M H Miller
than one voltage source tree a supernode is formed for each tree. In general circuit whose analysis is
amenable to hand calculation will not have very many voltage sources, and circuits analyzed by
computer do not require any special handling of this sort.
It is a useful exercise to solve for the node voltages ( e1 = 1v, e2 = 0.54v, and e3 = -1v) and verify in a
few instances that KVL and KCL are satisfied. You might also write KCL equations for each node
introducing temporary source branch currents, and then verify that the supernode KCL equation amounts
simply to adding the equations for each 'internal' node of the supernode
For machine computations a simpler tactic is not uncommon. Many machine programs simply prohibit
a simple voltage source as a branch element. They require a circuit element such as a resistor to be
placed in series with a voltage source, and these then force a simple relationship between the branch
current, the source strength, and the branch node voltages. For 'real' circuits this is not a problem since
in practice voltage sources inevitably have an internal series resistance. For idealized circuits or for
some computational purposes a series resistor is not desired. One way out of this conflict is to insert a
series resistor but to make the resistance have negligible effect on the computations, e.g., use the
smallest non-zero resistance value in the circuit multiplied by, say,10-6. With some care this satisfies
the computation program requirements without affecting any significant digits in computed values.
(Indeed in some instances an analysis program will do this sort of thing automatically if you omit the
resistor.) As it happens computer programs often impose a similar requirement on current sources; a
resistor in parallel with the source is required. This is less of a problem because it is acceptable to
specify a resistor with infinite resistance, in effect an open-circuit, to satisfy this requirement.
Supplementary Example Involving a Controlled Source
The voltage-controlled current source in the circuit below introduces only a modest adjustment in the
nodal analysis. The dependent current source is treated as is any node current, except that the source
strength depends on a voltage in another part of the circuit. Simply observe that the control voltage Vx
is a branch voltage and it can be expressed in terms of node voltages as e2 – e3. This replacement can
be done in the course of writing the equation.
Node 1:
1 = (e1 - e3)/4 + (e1 - e2)/1 - 2(e2 - e3)
Node 2:
0 = (e2 - e1)/1 + e2/2 + (e2 - e3)/8
Node 3:
0 = (e3 - e1)/4 + (e3 - e2)/8 +e3/5 +2(e2 - e3)
After algebraic simplification the three
independent equations in three unknowns are
1 = 1.25 e1 - 3.0e2 +1.75e3
0 = - e1 + 1.625e2 - 0.125e3
0 = - 0.25e1 - 1.825e2 -1.425e3
Solving (Gauss elimination or Cramer's Rule
or computer-aided analysis):
e1 = 2.1009 v
Circuits Nodal Analysis
I20 = 0.70347 a
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M H Miller
e2 = 1.4069 v
e3 = 1.4826 v
Circuits Nodal Analysis
I30 = 0.29653 a
I12 = 0.69401 a
I 23 = -0.94637 a
I13 = 0.15457 a
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