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Jameco Part Number
245294
SN54ALS00A, SN54AS00, SN74ALS00A, SN74AS00
QUADRUPLE 2-INPUT POSITIVE-NAND GATES
SDAS187A – APRIL 1982 – REVISED DECEMBER 1994
Package Options Include Plastic
Small-Outline (D) Packages, Ceramic Chip
Carriers (FK), and Standard Plastic (N) and
Ceramic (J) 300-mil DIPs
SN54ALS00A, SN54AS00 . . . J PACKAGE
SN74ALS00A, SN74AS00 . . . D OR N PACKAGE
(TOP VIEW)
1A
1B
1Y
2A
2B
2Y
GND
description
These devices contain four independent 2-input
positive-NAND gates. They perform the Boolean
functions Y = A • B or Y = A + B in positive logic.
FUNCTION TABLE
(each gate)
INPUTS
B
H
H
L
L
X
H
X
L
H
1B
2A
2B
3A
3B
4A
4B
1
3
12
4
11
5
10
6
9
7
8
VCC
4B
4A
4Y
3B
3A
3Y
SN54ALS00A, SN54AS00 . . . FK PACKAGE
(TOP VIEW)
1Y
NC
2A
NC
2B
logic symbol†
1A
13
4
3 2 1 20 19
18
5
17
6
16
7
15
8
14
9 10 11 12 13
4A
NC
4Y
NC
3B
2Y
GND
NC
3Y
3A
A
OUTPUT
Y
14
2
1B
1A
NC
VCC
The SN54ALS00A and SN54AS00 are
characterized for operation over the full military
temperature range of – 55°C to 125°C. The
SN74ALS00A and SN74AS00 are characterized
for operation from 0°C to 70°C.
1
4B
•
&
3
2
4
6
5
NC – No internal connection
1Y
2Y
9
10
8
3Y
12
13
11
4Y
† This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
Pin numbers shown are for the D, J, and N packages.
Copyright  1994, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
SN54ALS00A, SN54AS00, SN74ALS00A, SN74AS00
QUADRUPLE 2-INPUT POSITIVE-NAND GATES
SDAS187A – APRIL 1982 – REVISED DECEMBER 1994
logic diagram (positive logic)
1A
1B
2A
2B
3A
3B
4A
4B
1
3
2
1Y
4
6
5
2Y
9
8
10
3Y
12
11
13
4Y
Pin numbers shown are for the D, J, and N packages.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Operating free-air temperature range, TA: SN54ALS00A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 55°C to 125°C
SN74ALS00A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
recommended operating conditions
SN54ALS00A
VCC
VIH
Supply voltage
High-level input voltage
SN74ALS00A
MIN
NOM
MAX
MIN
NOM
MAX
4.5
5
5.5
4.5
5
5.5
2
2
UNIT
V
V
VIL
Low level input voltage
Low-level
0.8‡
0.7§
IOH
IOL
High-level output current
– 0.4
– 0.4
mA
Low-level output current
4
8
mA
70
°C
TA
Operating free-air temperature
‡ Applies over temperature range – 55°C to 70°C
§ Applies over temperature range 70°C to 125°C
2
– 55
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
125
0
0.8
V
SN54ALS00A, SN54AS00, SN74ALS00A, SN74AS00
QUADRUPLE 2-INPUT POSITIVE-NAND GATES
SDAS187A – APRIL 1982 – REVISED DECEMBER 1994
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
VIK
VOH
SN54ALS00A
TYP†
MAX
TEST CONDITIONS
VCC = 4.5 V,
VCC = 4.5 V to 5.5 V,
II = –18 mA
IOH = – 0.4 mA
VOL
5V
VCC = 4
4.5
IOL = 4 mA
IOL = 8 mA
II
IIH
VCC = 5.5 V,
VCC = 5.5 V,
VI = 7 V
VI = 2.7 V
IIL
IO‡
VCC = 5.5 V,
VCC = 5.5 V,
VI = 0.4 V
VO = 2.25 V
ICCH
ICCL
VCC = 5.5 V,
VCC = 5.5 V,
VI = 0
VI = 4.5 V
MIN
SN74ALS00A
TYP†
MAX
MIN
–1.2
VCC – 2
–1.5
VCC – 2
0.25
V
V
0.4
0.25
0.4
0.35
0.5
V
0.1
0.1
mA
20
20
µA
– 0.1
– 20
UNIT
– 112
– 30
– 0.1
mA
– 112
mA
mA
0.5
0.85
0.5
0.85
1.5
3
1.5
3
mA
† All typical values are at VCC = 5 V, TA = 25°C.
‡ The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.
switching characteristics (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
RL = 500 Ω,
TA = MIN to MAX§
SN54ALS00A
tPLH
tPHL
A or B
Y
UNIT
SN74ALS00A
MIN
MAX
MIN
MAX
3
15
3
11
2
9
2
8
ns
§ For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
3
SN54ALS00A, SN54AS00, SN74ALS00A, SN74AS00
QUADRUPLE 2-INPUT POSITIVE-NAND GATES
SDAS187A – APRIL 1982 – REVISED DECEMBER 1994
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Operating free-air temperature range, TA: SN54AS00 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 55°C to 125°C
SN74AS00 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
recommended operating conditions
SN54AS00
SN74AS00
MIN
NOM
MAX
MIN
NOM
MAX
4.5
5
5.5
4.5
5
5.5
UNIT
VCC
VIH
Supply voltage
VIL
IOH
Low-level input voltage
0.8
0.8
V
High-level output current
–2
–2
mA
IOL
TA
Low-level output current
20
20
mA
70
°C
High-level input voltage
2
Operating free-air temperature
2
– 55
125
V
V
0
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
VIK
VOH
VCC = 4.5 V,
VCC = 4.5 V to 5.5 V,
II = –18 mA
IOH = – 2 mA
VOL
II
VCC = 4.5 V,
VCC = 5.5 V,
IOL = 20 mA
VI = 7 V
IIH
IIL
IO§
VCC = 5.5 V,
VCC = 5.5 V,
VI = 2.7 V
VI = 0.4 V
VCC = 5.5 V,
VCC = 5.5 V,
VO = 2.25 V
VI = 0
ICCH
ICCL
SN54AS00
TYP‡
MAX
TEST CONDITIONS
MIN
SN74AS00
TYP‡
MAX
MIN
–1.2
VCC – 2
–1.2
VCC – 2
0.35
– 30
0.5
V
V
0.5
V
0.1
0.1
mA
20
20
µA
– 0.5
– 0.5
mA
– 112
mA
3.2
mA
– 112
2
UNIT
0.35
– 30
3.2
2
VCC = 5.5 V,
VI = 4.5 V
10.8
17.4
10.8
17.4
mA
‡ All typical values are at VCC = 5 V, TA = 25°C.
§ The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.
switching characteristics (see Figure 1)
PARAMETER
tPLH
tPHL
FROM
(INPUT)
A or B
TO
(OUTPUT)
Y
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
RL = 500 Ω,
TA = MIN to MAX¶
SN54AS00
SN74AS00
MIN
MAX
MIN
MAX
1
5
1
4.5
1
5
1
4
¶ For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
4
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
UNIT
ns
SN54ALS00A, SN54AS00, SN74ALS00A, SN74AS00
QUADRUPLE 2-INPUT POSITIVE-NAND GATES
SDAS187A – APRIL 1982 – REVISED DECEMBER 1994
PARAMETER MEASUREMENT INFORMATION
SERIES 54ALS/74ALS AND 54AS/74AS DEVICES
7V
RL = R1 = R2
VCC
S1
RL
R1
Test
Point
From Output
Under Test
CL
(see Note A)
From Output
Under Test
RL
Test
Point
From Output
Under Test
CL
(see Note A)
CL
(see Note A)
LOAD CIRCUIT FOR
BI-STATE
TOTEM-POLE OUTPUTS
LOAD CIRCUIT
FOR OPEN-COLLECTOR OUTPUTS
3.5 V
Timing
Input
Test
Point
LOAD CIRCUIT
FOR 3-STATE OUTPUTS
3.5 V
High-Level
Pulse
1.3 V
R2
1.3 V
1.3 V
0.3 V
0.3 V
Data
Input
tw
th
tsu
3.5 V
1.3 V
3.5 V
Low-Level
Pulse
1.3 V
0.3 V
1.3 V
0.3 V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PULSE DURATIONS
3.5 V
Output
Control
(low-level
enabling)
1.3 V
1.3 V
0.3 V
tPZL
Waveform 1
S1 Closed
(see Note B)
tPLZ
[3.5 V
1.3 V
tPHZ
tPZH
Waveform 2
S1 Open
(see Note B)
1.3 V
VOL
0.3 V
VOH
1.3 V
0.3 V
[0 V
3.5 V
1.3 V
Input
1.3 V
0.3 V
tPHL
tPLH
VOH
In-Phase
Output
1.3 V
1.3 V
VOL
tPLH
tPHL
VOH
Out-of-Phase
Output
(see Note C)
1.3 V
1.3 V
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. When measuring propagation delay items of 3-state outputs, switch S1 is open.
D. All input pulses have the following characteristics: PRR ≤ 1 MHz, tr = tf = 2 ns, duty cycle = 50%.
E. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuits and Voltage Waveforms
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
5
IMPORTANT NOTICE
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
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subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO
BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright  1998, Texas Instruments Incorporated
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