PD - 94807
IRFZ34NPbF
HEXFET® Power MOSFET
Advanced Process Technology
Ultra Low On-Resistance
Dynamic dv/dt Rating
175°C Operating Temperature
Fast Switching
Ease of Paralleling
Lead-Free
D
VDSS = 55V
RDS(on) = 0.040Ω
G
ID = 29A
S
Description
Fifth Generation HEXFETs from International Rectifier utilize advanced
processing techniques to achieve the lowest possible on-resistance per
silicon area. This benefit, combined with the fast switching speed and
ruggedized device design that HEXFET Power MOSFETs are well known for,
provides the designer with an extremely efficient device for use in a wide variety
of applications.
The TO-220 package is universally preferred for all commercial-industrial
applications at power dissipation levels to approximately 50 watts. The low
thermal resistance and low package cost of the TO-220 contribute to its wide
acceptance throughout the industry.
TO-220AB
Absolute Maximum Ratings
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
VGS
EAS
IAR
EAR
dv/dt
TJ
TSTG
Parameter
Max.
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting torque, 6-32 or M3 srew
29
20
100
68
0.45
± 20
65
16
6.8
5.0
-55 to + 175
Units
A
W
W/°C
V
mJ
A
mJ
V/ns
°C
300 (1.6mm from case )
10 lbf•in (1.1N•m)
Thermal Resistance
Parameter
RθJC
RθCS
RθJA
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Junction-to-Case
Case-to-Sink, Flat, Greased Surface
Junction-to-Ambient
Min.
Typ.
Max.
Units
––––
––––
––––
––––
0.50
––––
2.2
––––
62
°C/W
1
11/3/03
IRFZ34NPbF
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
RDS(ON)
VGS(th)
gfs
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Forward Transconductance
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Min.
55
–––
–––
2.0
6.5
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
IDSS
Drain-to-Source Leakage Current
LD
Internal Drain Inductance
–––
LS
Internal Source Inductance
–––
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
–––
–––
–––
V(BR)DSS
∆V(BR)DSS/∆TJ
IGSS
Typ.
–––
0.052
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
7.0
49
31
40
Max. Units
Conditions
–––
V
VGS = 0V, ID = 250µA
––– V/°C Reference to 25°C, ID = 1mA
0.040
Ω
VGS = 10V, ID = 16A
4.0
V
VDS = VGS, ID = 250µA
–––
S
VDS = 25V, ID = 16A
25
VDS = 55V, VGS = 0V
µA
250
VDS = 44V, VGS = 0V, TJ = 150°C
100
VGS = 20V
nA
-100
VGS = -20V
34
ID = 16A
6.8
nC
VDS = 44V
14
VGS = 10V, See Fig. 6 and 13 –––
VDD = 28V
–––
ID = 16A
ns
–––
RG = 18Ω
–––
RD = 1.8Ω, See Fig. 10 D
Between lead,
4.5 –––
6mm (0.25in.)
nH
G
from package
7.5 –––
and center of die contact
S
700 –––
VGS = 0V
240 –––
pF
VDS = 25V
100 –––
ƒ = 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
IS
ISM
VSD
trr
Qrr
ton
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode) Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
––– ––– 29
showing the
A
G
integral reverse
––– ––– 100
p-n junction diode.
S
––– ––– 1.6
V
TJ = 25°C, IS = 16A, VGS = 0V ––– 57
86
ns
TJ = 25°C, IF = 16A
––– 130 200
nC
di/dt = 100A/µs Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
VDD = 25V, starting TJ = 25°C, L = 410µH
RG = 25Ω, IAS = 16A. (See Figure 12)
2
ISD ≤ 16 A, di/dt ≤ 420A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C
Pulse width ≤ 300µs; duty cycle ≤ 2%.
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IRFZ34NPbF
1000
1000
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
100
10
4.5V
1
20µs PULSE WIDTH
TC = 25°C
0.1
0.1
1
10
A
100
10
100
R DS(on) , Drain-to-Source On Resistance
(Normalized)
I D , Drain-to-Source Current (A)
TJ = 25°C
TJ = 175°C
10
V DS = 25V
20µs PULSE WIDTH
7
8
9
VGS , Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
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10
A
100
Fig 2. Typical Output Characteristics
2.4
6
1
VDS , Drain-to-Source Voltage (V)
100
5
20µs PULSE WIDTH
TC = 175°C
0.1
0.1
Fig 1. Typical Output Characteristics
1
4.5V
1
VDS , Drain-to-Source Voltage (V)
4
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
TOP
I , Drain-to-Source Current (A)
D
I , Drain-to-Source Current (A)
D
TOP
10
A
I D = 26A
2.0
1.6
1.2
0.8
0.4
VGS = 10V
0.0
-60 -40 -20
0
20
40
60
A
80 100 120 140 160 180
TJ , Junction Temperature (°C)
Fig 4. Normalized On-Resistance
Vs. Temperature
3
IRFZ34NPbF
1200
V GS , Gate-to-Source Voltage (V)
1000
C, Capacitance (pF)
20
V GS = 0V,
f = 1MHz
C iss = Cgs + C gd , Cds SHORTED
C rss = C gd
Ciss C oss = Cds + C gd
V DS = 44V
V DS = 28V
16
800
Coss
12
600
400
Crss
200
0
1
I D = 16A
10
100
8
4
FOR TEST CIRCUIT
SEE FIGURE 13
0
A
0
VDS , Drain-to-Source Voltage (V)
20
30
A
40
Q G , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
1000
1000
OPERATION IN THIS AREA LIMITED
BY R DS(on)
I D , Drain Current (A)
ISD , Reverse Drain Current (A)
10
100
TJ = 175°C
TJ = 25°C
10
10µs
100µs
10
1ms
VGS = 0V
1
0.4
4
100
0.8
1.2
1.6
A
2.0
TC = 25°C
TJ = 175°C
Single Pulse
1
1
A
10
100
VSD , Source-to-Drain Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
Fig 8. Maximum Safe Operating Area
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IRFZ34NPbF
30
VGS
25
I D , Drain Current (A)
RD
VDS
D.U.T.
RG
+
- VDD
20
10 V
15
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
10
Fig 10a. Switching Time Test Circuit
VDS
5
90%
0
25
50
75
100
125
150
TC , Case Temperature ( °C)
175
10%
VGS
Fig 9. Maximum Drain Current Vs.
Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
Thermal Response (Z thJC )
10
1
D = 0.50
0.20
0.10
0.05
0.1
0.02
0.01
0.01
0.00001
PDM
SINGLE PULSE
(THERMAL RESPONSE)
t1
t2
Notes:
1. Duty factor D = t 1 / t 2
2. Peak T J = P DM x Z thJC + TC
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
L
VDS
D.U.T.
RG
+
V
- DD
IAS
10 V
tp
0.01Ω
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS
E AS , Single Pulse Avalanche Energy (mJ)
IRFZ34NPbF
140
TOP
120
BOTTOM
ID
6.5A
11A
16A
100
80
60
40
20
0
VDD = 25V
25
50
75
100
125
150
Starting TJ , Junction Temperature (°C)
tp
VDD
VDS
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
IAS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
50KΩ
QG
12V
.2µF
.3µF
10 V
QGS
D.U.T.
QGD
+
V
- DS
VGS
VG
3mA
Charge
Fig 13a. Basic Gate Charge Waveform
6
IG
A
175
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
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IRFZ34NPbF
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
-
-
+
RG
•
•
•
•
Driver Gate Drive
P.W.
+
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
Period
D=
-
VDD
P.W.
Period
VGS=10V
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFETS
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7
IRFZ34NPbF
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
10.54 (.415)
10.29 (.405)
2.87 (.113)
2.62 (.103)
-B-
3.78 (.149)
3.54 (.139)
4.69 (.185)
4.20 (.165)
-A-
1.32 (.052)
1.22 (.048)
6.47 (.255)
6.10 (.240)
4
15.24 (.600)
14.84 (.584)
LEAD ASSIGNMENTS
1.15 (.045)
MIN
1
2
LEAD ASSIGNMENTS
IGBTs, CoPACK
1 - GATE
2 - DRAIN
1- GATE
1- GATE
3 - SOURCE 2- COLLECTOR
2- DRAIN
3- SOURCE
3- EMITTER
4 - DRAIN
HEXFET
3
4- DRAIN
14.09 (.555)
13.47 (.530)
4- COLLECTOR
4.06 (.160)
3.55 (.140)
3X
1.40 (.055)
3X
1.15 (.045)
0.93 (.037)
0.69 (.027)
0.36 (.014)
3X
M
B A M
0.55 (.022)
0.46 (.018)
2.92 (.115)
2.64 (.104)
2.54 (.100)
2X
NOTES:
1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982.
2 CONTROLLING DIMENSION : INCH
3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB.
4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.
TO-220AB Part Marking Information
EXAMPLE: THIS IS AN IRF1010
LOT CODE 1789
ASSEMBLED O N WW 19, 1997
IN THE ASSEMBLY LINE "C"
Note: "P" in assembly line
position indicates "Lead-Free"
INTERNATIO NAL
RECTIFIER
LOGO
ASSEMBLY
LOT CODE
PART NUMBER
DATE CODE
YEAR 7 = 1997
WEEK 19
LINE C
Data and specifications subject to change without notice.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.10/03
8
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Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/