Metal-Semiconductor Contacts
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Metal-Semiconductor Contacts Saurabh Lodha ! Dept. of Electrical Engineering, IIT Bombay ! Feb 25, 2016 School on Nanoscale Electronic Transport and Magnetism: Fundamentals to Applications HRI, Allahabad Outline • Metal-semiconductor contacts – Energy band alignment – Fermi-level pinning – Current transport and barrier height extraction – Measurement of Rc and ρc ! • Contact resistance in emerging materials – Germanium – MoS2 25/02/2016 2 Outline • Metal-semiconductor contacts – Energy band alignment – Fermi-level pinning – Current transport and barrier height extraction – Measurement of Rc and ρc ! • Contact resistance in emerging materials – Germanium – MoS2 25/02/2016 3 Metal-semiconductor Band Alignment • In equilibrium Fermi-levels align • Depletion-mode contact 25/02/2016 4 Try this yourself ? • What kind of a contact is this? 25/02/2016 5 Schottky-Mott Rule d=0, metal and s.c. in contact • φB reflects the mismatch in energy position of majority carrier band edge of the semiconductor and the metal 25/02/2016Fermi level at the interface 6 Deviation from Ideal (SchottkyMott) ! • Experimental vs measured SBH on Si • A.M. Cowley et al., "Surface States and Barrier Height of Metal-Semiconductor Systems," J. Appl. Phys 36, 3212 (1965) 25/02/2016 7 Interface States: Fermi-level Pinning Charge at the interface due to electronic states in the bandgap QM + QSC + QSS = 0 Pinning factor Density of surface states, Cowley and Sze • • • 25/02/2016 Interface states!dipole!interfacial layer of atomic dimensions φCNL energy level below which all states must be filled to ensure charge neutrality, measured from VBM S depends on Ds and δi 8 Origin of Interface States: Model 1Unified Defect Model by Spicer • • • Surface states created by dangling bonds of covalent semiconductor Fermi level pins at defect levels for sub/few monolayer metal coverage W.E. Spicer et al., "Unified Defect Model and Beyond," J. Vac. Sci. Tech. 17, 1019 (1980). 25/02/2016 9 Origin of Interface States: Model 2Metal Induced Gap States by Heine Heine (V. Heine, "Theory of Surface States," Phys. Rev. 138, A1689 (1965)) • Interface states ! tails of the metal wave functions • Length of the tail ~ a few lattice constants, depends on complex energy band structure of semiconductor • Deviation from local charge neutrality results in "metallic" screening by MIGS ! Fermi-level pinning ! J. Tersoff (J. Tersoff, "Schottky Barrier Heights and the Continuum of Gap States," Phys. Rev. Lett. 52, 465, (1984)) • Gap states come from valence band and conduction band states • Charge neutrality requires filling of valence band like states and empty conduction band states • Cross-over point ! Branch point ! MIGS DOS is minimum and EF is pinned here 25/02/2016 10 Current transport in Contacts 25/02/2016 11 Contact Resistance and Resistivity Bulk resistivity Specific Contact Resistivity • Specific contact resistivity is a key parameter to describe contact performance 25/02/2016 12 Thermionic Emission: Schottky Contact • Specific contact resistivity independent of doping 25/02/2016 13 Field Emission (Tunneling): Ohmic contact 25/02/2016 14 Contact resistivity on Si 25/02/2016 15 How do you measure φB? J0 • I-V measurement in a low doped Schottky diode 25/02/2016 16 How do you measure φB? • Reverse bias C-V curves give φB and doping Nd 25/02/2016 17 How do we measure Rc and ρc? • If current density was uniform then ρc is contact resistance/A • In practice ! J is non uniform due to current crowding • Need a more accurate model 25/02/2016 18 Model for Contact Resistance • • • • vm(x,y,z) ! Metal potential v(x,y,z) ! Semiconductor potential Poisson and carrier continuity eqns Effect of minority carriers is neglected – Neglecting the semiconductor depletion width – Only need to solve the majority carrier continuity eqn in the semiconductor region under the contact • Assume majority carrier density is the same as the active doping density • Metal conductivity >> semiconductor conductivity ! vm is constant along entire interface ! Only need to solve for v(x,y,z) 25/02/2016 19 3D Model- Equations Difference in Fermi potentials of majority carriers Finite resistance seen by infinitesimal current crossing the interface for infinitesimal applied V 25/02/2016 20 2D Model y metal x x=0 I x=l semiconductor z Assumptions Sheet Resistance of the semiconductor Conductivity weighted average potential Transverse gradient and Laplacian operators 25/02/2016 21 2D Model Integrating along z Assuming vm to be constant and 0 Close to 1 for shallow junctions Helmholtz equation, Under the contact Laplace equation, Not under the contact 25/02/2016 22 2D Simplified to a 1D Model y metal x z I x=0 x=l semiconductor • Neglecting y-axis variation ! ! • V=Vi at x=0 and dV/dx=0 at x=l I tot = 25/02/2016 WVi Rs lt 1 ⎛l coth⎜⎜ ⎝ lt ⎞ ⎟⎟ ⎠ 23 0D Model y metal x • • • • x=0 I x=l < lt semiconductor Rc approaches ρcA as l becomes less than lt Potential across the semiconductor is uniform Current entering the contact is uniform Macroscopic definition 25/02/2016 24 1D Transmission line model • Rc is dependent on contact size, structure layout besides semiconductor doping and ρc • ρc is a fundamental quantity governed by the interface 1D Transmission Line Model (Distributed ρc and Rs) 25/02/2016 25 1D Transmission line model • Current density drops exponentially from leading edge to trailing edge of the contact • lt is the characteristic length over which current drops by 63% 25/02/2016 26 1D Transmission line model Recall, For l2=0 WVi I1 = Rs lt Rc = For d<<lt, or large lt 1 ⎛l coth⎜⎜ ⎝ lt ⎞ ⎟⎟ ⎠ As if you have uniform current density through the entire contact Similarly for d>>lt Rf ≈ 25/02/2016 ρc wlt As if you have uniform current density through an effective area of wlt 27 1D Transmission Line Model ρ Rf ≈ c ZL Rf ≈ ρc Zlt • Rc plateau determined by Lt value for given ρc 25/02/2016 28 Measurement of Rc and ρc • Transmission line tap resistor 25/02/2016 29 Measurement of Rc and ρc • Value of Rf (Rc) is small compared to Rs • Measurement of Rt needs to be accurate 25/02/2016 30 TLM Method • For L>>LT x-intercept gives LT value 25/02/2016 31 Cross-bridge Kelvin Resistor • Assumes uniform current density through the entire contact area 25/02/2016 32 Limitations of 1D Model • 2D current flow is not accounted for • Overestimation of ρc -> does not scale with area • Need accurate 2D/3D current flow simulations 25/02/2016 33 Outline • Metal-semiconductor contacts – Energy band alignment – Fermi-level pinning – Current transport and barrier height extraction – Measurement of Rc and ρc ! • Contact resistance in emerging materials – Germanium – MoS2 25/02/2016 34 CMOS Evolution 1974-2000 Classical Dennard Scaling 90 nm 45 nm 2000-2007 2007-2012 Strain Engineering 22/14 nm 2016-? Hi-K / MG Gate stack Trigate / FinFET • Engineering innovation has sustained Moore’s law – Strain – Hi-K/Metal Gate – FinFET/Trigate 25/02/2016 35 What’s next for Moore’s law? High Mobility/Injection Velocity Id=µCox/Leff (Vg-Vt)α ! • Mobility enhancement using alternate channel materials, strain, wafer orientation ❑ Ge is a single material CMOS solution ❑25/02/2016 Integral part of Si foundries Lubow et al., APL 96 122105 (2010) Intel Developer Forum, Sept. 2011 36 What’s next for Moore’s law? LG Improved Electrostatics/Sub-Vt Slope Id=µCox/Leff (Vg-Vt)α Drain Gate Source Lower Leff at same Vt, or lower Vt at same Leff Hsi – Scaled FinFETs Wsi ! – GAA FETs ! – Tunnel FETs P-I-N TFET ! – Ultra thin (2D) materials: MoS2, WSe2 0.7 nm 25/02/2016 MoS2 Drain Source SiO2 Back Gate 37 Series Resistance in Future Transistors • Contribution of contact resistance to overall parasitic series resistance is increasing with scaling 25/02/2016 38 Rcontact Scaling 30 Lcontact (nm) 25 20 15 10 25 20 15 ITRS 2011 2011 2012 2013 2014 2015 8.0x10-8 7.0x10-8 ρc Ohm.cm2 Contact length Physical gate length (nm) 9.0x10-8 Lgate (nm) 30 10 6.0x10-8 ITRS 2011 5.0x10-8 4.0x10-8 3.0x10-8 2.0x10-8 1.0x10-8 5 2011 2012 2013 2014 2015 5 0.0 2011 2012 2013 year • Lcontact scales faster than Lgate ! • Aggressive reduction of Contact-to-S/D specific contact resistance (ρc) needed 25/02/2016 year 2014 2015 Lgate Spacer Lcontact 39 39 Metal-semiconductor contacts Metal φB Semiconductor ECNL Ec 4πΦ B ρ c ∝ exp( qh m*ε ) N surf Φ B = S (φM − χ s ) + (1 − S )( EC − ECNL ) Ev • Fermi level pinning is the “lack of barrier height modulation with metal work function” due to – Either large density of “intrinsic” states: e.g. point defects on semiconductor surface – Or “extrinsic” Metal-Induced-Gap-States (MIGS) 25/02/2016 40 • N+ Silicon S/D Maximum possible doping (cm-3) Ge Transistor Contacts – N-type barrier height is high (NiSi, NiPtSi) ! • N+ Si:C S/D (higher mobility) – N-type barrier height is high (NiSi, NiPtSi) – Effective doping is less vs Si 1E21 1E20 1E19 Si Si:C Ge ! ! • N+ Ge S/D (higher mobility) – N-type barrier height is high • Fermi level pinning near VB – Low dopant activation (~5e19 cm-3) 25/02/2016 Toriumi et al., APL, 2007 41 Solution: MIS Contacts Jenny Hu et al. MRS Bulletin 2011 (Metal-Interfacial Layer-Semiconductor) ρc: Specific contact • S=1 Ideal surface, No resistivity pinning • S=0 complete ρc • pinning depends on φB,eff thickness ε ↑ E ↑ thickness t of IL ↑• ρΔE c ↓ t of IL ↓ depends S: pinning factor ΔEc ρc ↓ IL gIL c 25/02/2016 42 etal in M Dra Gate tal Me e c ur d So h w MIS S/D in M Dra Gat tal Me ce r u So etal e d h Horizontal Cut w Contact Area AMIS = wd+2hd Asilicide = wh Fully Silicided S/D w w MIS gives area advantage over fully silicided S/D d MIS d Silicide Total Contact Resistance (ohms) MIS vs Silicide 400 Fin Extension Resistance Silicide Contact Resistance MIS Contact Resistance 300 ρc=1e-9 Ω.cm2 200 100 0 5 6 8 10 12 Fin Width (nm) 15 • P. Parahamans et al., p. 83-84, VLSI Symposium 2012 • MIS contacts scale better than Silicide • Contact area and current crowding penalty for silicide 25/02/2016 43 ZnO as an IL 25/02/2016 44 Interlayer (IL) Comparison FERMI LEVEL PINNING ELECTROSTATICS • S. Gupta et al., Journal of Applied Physics (2013) • ZnO gives lowest ρc for thick films 25/02/2016 45 Effect of Doping ZnO • S. Gupta et al., Journal of Applied Physics (2013) • ρc decreases with increasing doping 25/02/2016 • At high doping, ρc independent of thickness 46 Device Fabrication Ti N-Ge Substrate Pre-Clean PVD ZnO, Ti/Au Diode formation Lithography on n+ epi-Ge ZnO n-Ge TEM of n-Ge/ZnO/Ti interface PVD ZnO 6 Tauc Plot of the deposited ZnO film Back Al metallization Ti/Au F(R)hv a.u 5 4 3 2 Band Gap =3.1eV 1 0 PDA in N2 forming high doped ZnO 25/02/2016 Diodes Liftoff PDA in N2 Forming high doped ZnO C-TLM 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 hv(ev) Tauc plot of the deposited ZnO film. Measured Eg 47 ~3.1eV J-V Characteristics • As expected significant increase in on and off currents for n-Ge ! • NiGe/n-Ge and Ti/n-Ge control devices are pinned near VB ! • ALD ZnO also shows a similar response as PVD ZnO ! 25/02/2016 48 Contact Resistance (C-TLM) ~2.5X Top Metal Contacts t ~1.3X Epi, insitu doped Si/Ge/Si:C P-Si Ge Control 3.3E-7 Si With ZnO 1.4E-7 Control 3.7E-8 Si:C With ZnO 3.7E-8 Control 5.4E-8 With ZnO 4.3E-8 Epi Layer Doping (cm N+ ~3e20 t (nm) Silicon N+ Si:C ~1e20 40 N+ Ge ~2E19 120 40 • ZnO shows reduction in ρc for Ge (2.5x) and Si:C (1.3x) • Benefit reduces with increasing substrate doping – ∆ρ < ∆ρSi:C < ∆ρGe, NSi >NSi:C > NGe 25/02/2016Si 49 Summary: Contact resistance vs Ge doping • ZnO helps lower doping requirement for contacts to n-Ge – 1e20 cm-3 S/D doping with ZnO IL should reach ITRS spec (2014) • P. Paramahans et al., Appl. Phys. Lett. 101, 182105 (2012) • P. Parahamans et al., p. 83-84, VLSI Symposium 2012 25/02/2016 50 MoS2: Key Features ➢ Monolayer ! 6.5 Å Van der waals Forces ❑ Graphene ➢ Unique properties of Graphene have led to interest in 2D materials ➢ Linear dispersion relationship ! µ= 106 cm2/V.s at 2K ➢ Semi-metallic (zero bandgap) nature makes it unsuitable for logic applications [1] K. Novoselov et al., Review of mod. Phy. (2009). [2] A. Kis et al., Nat. Nanotech. (2011) 25/02/2016 ❑ MoS2 ➢ Layered with strong in-plane bonding and weak out-of-plane interactions ➢ Enables exfoliation of monolayer ➢ Large intrinsic band gap e.g. 1.8 eV in monolayer and 1.29 eV in multilayer ➢ Monolayer! Direct band gap Good for optoelectronic application ➢ Thermal stability up to 1100 51 C Transition Metal Dichalcogenides (TMDs) ➢ Group 4–7 TMDs are layered, whereas group 8–10 TMDs are non-layered structures. ➢ About 40 different layered TMD compounds exist 25/02/2016 M. Chhowalla et al., Nature chemistry 10, 1038 (2013) 52 How good can a monolayer MoS2 transistor be? ➢ ION/IOFF ! >1010 ➢DIBL∼10 mV/V, SS ! 60 mV/ decade ➢ Lg = 15 nm ➢ HfO2 Tox 2.5 nm 25/02/2016 Y. Yoon et al., Nanoletters, 11.3773, 2011. 53 Device Fabrication ➢ SEM image of monolayer MoS2 device L~ 5 µm 3 ~ W Au/Pd Source PMMA SiO2 Au/Pd Drain Back Gate 2 P+ Si as Back gate MoS µm MoS2 SiO2 1L, ➢ Transistor process flow Au Au 280 nm SiO2 Pd Pd 3 µm PMMA SiO2 Back Gate 25/02/2016 MoS2 exfoliation PMMA Resist coating s Source/Drain EBL Patterning tr od e MoS2 El ec El ec El tro ec de tr s El ode ec s tro de s El ec tro de s ➢TLM structure process flow to estimate contact resistance (Rc) Reactive ion etching Surface treatment MoS2 Metallization 1 µm Source Lift off 54 Characterization of MoS2 layers oS 2 rM ye La lti A1G 564 558 360 25/02/2016 380 400 420 Raman shift (cm-1) 3000 2500 2000 1500 235 230 B.E (eV) 2000 S2p ΔΚ=21.6 cm-1 Mo3d5 20 µm Mo3d3 E12G Bi Layer MoS2 Intensity (C/s) Intensity(a.u) 570 1.40 nm 1800 1600 225 168 164 160 B.E (eV) ➢ XPS spectra of MoS2 flake 1400 Intensity (C/s) ➢ Raman spectrum of Bilayer MoS2 flake SiO2 Mu ➢ Optical micrograph showing Bilayer MoS2 ➢ AFM data for Bilayer MoS2 flake 55 High Contact Resistance ❑ Large contact resistance at metal-MoS2 interface ! 150 ! 100 ! 50 ! 0 ! Pd 45 Au Rc (Ω.mm) Rc (KΩ.mm) 200 ➢ Contact resistance 40 35 10 20 30 limited by sheet charge density 40 30 VBG (V) Ref. D. Jena et al., Nat. mat., (2014). ❑ Different approaches to reduce the contact resistance N-type doping of MoS2 ↓RC Ref. no. [1] [2] Doping ФB thinner 25/02/2016 Interfacial layer This work Charge transfer Potassium PEI TiO metal) Φ Δ NA NA NA NA 40 meV, 13X ↓ constant Φ µ (cm 25 NA Stabilit y No No Up to 11X↑ Yes ФB lower Fermi-level unpinning [1] H. Fang et al., Nano lett. 13, 1991 (2013), [2] N. Pour et al., DRC., 101 (2013) 56 TiO2 as an interfacial layer Energy (eV) 0 -2 Vaccuum level -4 MoS2 -6 -8 TiO2 CNL A. Agrawal et al., Sym. on VLSI Tech., (2013). ❑ Why is TiO2 a good interfacial layer candidate? ➢ Small or no conduction band offset ! low tunneling R ➢ Large bandgap ! Fermi-level unpinning ➢ Ultra-thin IL ! low tunneling R ❑ Energy band alignment of MoS2 and TiO2 suggests possibility of charge transfer from TiO2 to MoS2 57 25/02/2016 Device fabrication: Process flow ❑ Transistor process flow Metal MoS2 Source TiO2 P+ Si as Back gate 280 nm SiO2 Metal Drain TiO2 Reactive ion etching Surface treatment SiO2 Back Gate ➢ Optical micrograph of back gated transistor MoS2 exfoliation Source/Drain EBL Patterning ALD TiO2 Metallization and Lift Off ➢ Scanning electron microscope image 25/02/2016 showing devices with different channel length 58 Contact resistance using TLM ❑ Reduction in contact (Rc) and transfer length (LT) ❑ Resistor network model for metal-semiconductor contacts 25/02/2016 Reduction in LT for contact- 59 Barrier height extraction ❑ Reduction in effective SBH with TiO2 IL for Au, Pd, Ni and Ti ΦBTiO -Au 0.028 eV 2 0.06 0.00 -40 -20 0 20 40 0.04 0.02 2 ΦAu (eV) 0.12 ΦBAu 0.12 eV ΦTiO -Au (eV) Au TiO2-Au 0.18 0.00 VGS (V) Undoped Doped Thermionic Thermionic ❑ Constant effective SBH with TiO2 IL indicates increase in doping instead of φB reduction 25/02/2016 Tunneling Tunneling WB WB 60 Electrical characteristics ❑ SEM images of TLM devices with and without TiO2 ➢ Metal-MoS2 ! High resistance, large SBH ➢ Metal-TiO2-MoS2 ! Low resistance, small S SBH no-TiO2 ➢ Metal-TiO2-MoS2 -Metal ! Asymmetric I-V WB confirms significant difference in barrier 25/02/2016 heights D Contact-TiO2 WB 61 Transistor Characteristics ❑ Improvement in on-current and field effect mobility with TiO IL for different metals ❑ Larger change with Pd 25/02/2016 2 62 Physical proof of charge transfer 8M Counts (a.u.) MoS2 TiO2-MoS2 11.9 12.0 11.6 11.6 11.2 10.8 ➢ XPS spectra shows Mo-3d, and S-2p core level shifts to higher binding energy from MoS2 to TiO2–MoS2 MoS2 TiO2-MoS2 6M 4M 2M 0 10 5 0 Binding Energy(eV) -5 ➢ UPS measurements of TiO2–MoS2 and MoS2 ➢ Reduction in work-function (0.3 eV) with TiO2 25/02/2016 63 Contact vs. Channel TiO2 ❑ Larger benefit from reduction in contact resistance vs 25/02/2016 mobility enhancement from dielectric screening 64 Conclusion N. Kaushik et al., Device Research Conference (2015), ACS Applied Materials and Interfaces (2015). ❑ N-type doping by charge transfer mechanism ! 0 Vaccuum -2 level MoS2 TiO2-MoS2 -4 11.9 MoS2 -6 -8 8M TiO2 Counts (a.u.) Energy (eV) ! ! ! ! 12.0 11.6 11.6 11.2 10.8 MoS2 TiO2-MoS2 6M 4M 2M 0 10 5 0 Binding Energy(eV) CNL -5 ❑Improvement in ION/IOFF with TiO2 and constant ΦB MoS irrespective of metal 40µ work-function 0.4 TiO2-Pd 100µ MoS -TiO Pd ! 30µ Linear fit of Φ 1µ 0.3 Pd 10µ 0 25/02/2016 10n 20µ ~7X 100p 1p (a)10f -40 -20 0 20 40 VGS (V) ΦB (eV) Metal TiO2 MoS2 2 IDS (A/µm) Metal IDS (A/µm) 2 2 Linear fit of Φ 0.2 0.1 Ni Au Ti 4.2 4.5 4.8 5.1 5.4 Work function (eV) 65 Summary • Metal-semiconductor contacts are a part of every semiconductor device – Low contact resistance is critical for high performance ! • Diodes (φB) and TLM (ρc) structures are used for extracting contact parameters ! • Fermi-level pinning, low doping activation are leading causes of high resistance 25/02/2016 • Emerging materials need novel solutions to reduce contact resistance 66 Thank you! 25/02/2016 67 Backup 25/02/2016 68 Measurement of Rc and ρc 25/02/2016 69
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