CAPACITIVE SENSING TEQUENIQUES FOR
MEMS BASED FORCE FEEDBACK
ACCELEROMETER
Contents
Abstract ………………………………………………………………………………….4
Acknowledgements ……………………………………………………………….5
1. Introduction to chopper stabilization ……………………………. 6
2. system level simulations ………………………………………………….8
2.1
Introduction
8
2.2
Simulink analysis
9
2.3
Introduction of PI
14
3. Circuit design …………………………………………………………………...17
3.1
Introduction
17
1.1.
Double ended Op amp
18
1.2.
Single ended op amp
20
1.3.
Filter
22
1.4.
capacitor array
23
4. simulation results ……………………………………………………………..26
5. conclusion …………………………………………………………………………33
5.1
Summary
33
5.2
Scope for future work
33
Appendix ……………………………………………………………………………….34
A Layout
34
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Microelectronics Lab, Indian Institute of Science.
a.1 layout methodolghy
34
a.2 Layout of chip & different parts
35
B Pin configuration
39
C Test plan
42
D Wire Bonding of MEMS Device
44
References …………………………………………………………………………….45
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Microelectronics Lab, Indian Institute of Science.
ABSTRACT
For inertial navigation and vibration analysis, MEMS based micro g
resolution accelerometers are the best suited choice. In a hybrid solution
optimization has to be done at system level. Both mechanical and electronics
part of chip has to be designed. This report contains design optimization at
system level and then design of electronics part. In mechanical design
Displacement amplifying Compliant Mechanism (DaCM) was used to give more
capacitance change for given applied force. In electronics design chopper
stabilization with boosted gain and correlated double sampling with cross coupled
switches to remove common mode noise was used.
A new design for achieving high sensitivity by incorporating a
Displacement amplifying Compliant Mechanism (DaCM) [15].
In electronics
sensing chopper stabilization technique is used to reduce 1/f & offset. One extra
opamp stage was introduced which will boost the gain and as it is in nested
chopper loop it will not add substantial noise. This enables to get resolution upto
1 part per million of the capacitance. PID controller was also designed and
integrated. System level simulations were done in Matlab simulink module and
circuit simulation were done in Tanner and Mentor graphics tool kits. The MEMS
chip is being fabricated using DRIE process at LEOS.
Electronics chip was
fabricated using AMIS-0.7µm cmos process
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Microelectronics Lab, Indian Institute of Science.
Acknowledgements
I consider myself fortunate to have got opportunity to work under guidance of Dr.
Navakanta Bhat. I extend my heartfelt gratitude to him for his guidance, support
and encouragement.
I would like to thank Prof Ananthasuresh for his helpful discussions and
suggestions. I thank my project partners Girish and Manjunath whose research
was Springboard for my work. My sincere thanks to Ganesh and Sriram for their
kind help during starting stages of this project work.
I thank Sandeep, Avanish and Shobi whose help was vital during chip design
phase of the project. Finally I thank all members of the Microelectronics lab and
friends at IISc for their support and friendship which made my stay at IISc
memorable.
This project was supported in part by a grant from the Space Technology Cell of
IISc-ISRO. This support is gratefully acknowledged.
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Microelectronics Lab, Indian Institute of Science.
1. Introduction to Chopper stabilization
There are many sensing technique used in accelerometer. Switched
capacitor[2], correlated double sampling [4][6][7], Unity gain buffer[1] and
chopper stabilizations are some of them. Basically these are techniques for
reducing the non idealities of the Operational Amplifier (Op Amp). Operational
amplifier contains many non idealities such as input offset, 1/f noise, thermal
noise [5]. Typically offset ranges to few mV apart from that 1/f noise becomes
dominating at low frequency range. Switched capacitance is used to reduce the
offset of the op amp. It stores offset on a capacitor and subtracts it from input.
This is also known as auto zeroing.
Chopper stabilization modulates signal to higher frequency range where there is
low 1/f noise then demodulates it to baseband signal after amplification. The
reduction in noise is depicted in figure below
p
p
Input
Output
u
y
n
Modulation
Demodulation
Signal
Noise
Noise
f
0
f
0
fm
f
0
Fig 1 . Chopper Stabilization concept.
Here , Chopping frequency is chosen such that Brownian noise instead of
1/f noise will decide the noise floor. At higher frequency the value of 1/f noise
keeps on decreasing and at some frequency known as corner frequency it
reduces below the Brownian frequency mark. This frequency is generally in
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Microelectronics Lab, Indian Institute of Science.
range of 1 – 2 Mhz. so chopping is done at that frequency.This way
baseband noise of the chopper amplifiers is almost equal to Brownian white
noise.
Offset appears at modulated frequency and its odd harmonics these
frequency components need to be removed by subsequent low pass filtering .
As shown in figure modulating signal p can take values +1 or -1 , If n is noise
signal at low frequency then p 2 = 1 and Output y = (up + n)Ap = uA + A( np).
Thus the signal is same but n is multiplied by p. If p has period Tp with duty cycle
50 % , Its Fourier coefficient denoted by Pk is given by .
Pk =
=
Tp
1
Tp
∫ p(t)e
- jk(2π / T p ) t
dt
0
2
jkπ
if k = ± 1, ± 3, ± 5, .....
if k = 0, ± 2, ± 4, .....
= 0
If Sn (ω ) denotes the power spectral density of n , then PSD of pn
becomes
S pn (ω ) =
4
π
2
∞
1
∑ (2k + 1)
k = -∞
2
Sn (ω - (2k + 1)
2π
)
Tp
Thus the effect of Sn is strongly reduced in baseband.
The circuit realization of chopper stabilization is done by arranging
switches at input of amplifier. It can be seen that input is multiplied by +1 & -1
Alternately which is a type of modulation. The output of this circuit is
demodulated and filtered to remove offset noise which is at high frequency.
Demodulation is done either by using same kind of switching arrangement or by
using multiplier circuit.
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Microelectronics Lab, Indian Institute of Science.
2. System level simulations
2.1 Introduction
In a CMOS MEMS device, there is dependence of MEMS device over
CMOS circuit & vice a versa. Typically MEMS devices are simulated and
optimized in tools which are specific to MEMS analysis like CoventorWare &
intelisuite. Which are based on Finite element methods analysis , meshing and
Boundary element methods. Where as CMOS part of sensor is simulated in
SPICE which mainly solves KCL , KVL based on given node connectivity and
device models.
There’s no accurate way to simulate both in same platform to see the
effect of change in parameters in mechanical domain over electronics circuit &
reverse. One of the way is to use electrical equivalent of mechanical structure
and then simulate that in SPICE. But in that we have to use a proper scaling
factor in order to keep electrical impedance values small [1] for avoiding
convergence problem in SPICE. Apart from that full netlist of the circuit has to be
ready before hand in order to gain accuracy. Another possibility is to use verilog
code to represent all elements in behavioral form and simulate.
Matlab can also be used to represent both mechanical & electronics part
and simulating full system. Use of simulink models for accelerometers has been
done previously [3, 11] . As it gives flexibility to add Matlab code, it has built in
tools for signal processing (like decimation filters) and represent of system
symbolically making it easy to understand and convey the simulations simulink
makes a good choice for system level simulation in CMOS – MEMS.
A new design for achieving high sensitivity by incorporating a
Displacement amplifying Compliant Mechanism (DaCM) [15]. It was seen the
sensitivity of a micro-g high sensitivity accelerometer reported in literature can be
improved by around 8 times by adding a DaCM with a slight increase in its
natural frequency and negligible change in the fabrication process. This ca easily
be reflected in simulink simulations by adding a gain factor. Also equivalent of
chopper stabilization can be built showing modulation & demodulation process
[16].
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Microelectronics Lab, Indian Institute of Science.
This chapter describes details of system level simulations carried out. It
contain details of both mechanical part (Proof mass , Damper & spring constant
system) and electronics part using chopper stabilization. Closed loop analysis
with analog feedback , use of PID in feedback and approximate estimation of Kp
and Ki values is also explained
2.2 Simulink Analysis
Both analog & Digital feedback was investigated using matlab Simulink module
for same input parameters and are compared. In simulations input was of 1 mg.
Analog Feedback system :
The full Block diagram of Analog system is as shown below :
Fig 2 Analog Accelerometer model
Following is description of each subsystem , Waveforms at different
places are also shown. The simulation is carried out assuming input of 1mg
Pulse of with 0.2 sec.
The Mechanical system is represented as follows
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Microelectronics Lab, Indian Institute of Science.
Fig 3 Mechanical system
The Summing point is adding all the forces. As Acceleration is given as input,
it is multiplied by the mass of proof mass so as to act as a force quantity. Other
forces are The Damping (Proportional to Velocity) and Spring force (Proportional
to displacement). Result of this system is Displacement which is measured by
the Sensor.
Fig 4 Shows Displacement for input of 1mg. for 0.2 sec. applied at time =
0.1 sec.
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Microelectronics Lab, Indian Institute of Science.
Fig 4 Displacement of proof mass
The Sensor :
Sensor is modeled as follows
Fig 5 Sensor Model
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Microelectronics Lab, Indian Institute of Science.
Input for sensor is displacement , Due to displacement there is differential
capacitance change between the electrodes. To measure this Capacitance
change both electrodes are driven by voltage pulses opposite in polarity but of
the same frequency (of around 1 Mhz.). These pulses gets added at the sensor
input and output of sensor is modulated wave following the capacitance change.
This signal has to be demodulated & that is done by a multiplier. Similar Pulse is
multiplied to modulated wave to get a demodulated sense voltage which is direct
measure to the capacitance change & hence the acceleration.
Figure 6 shows pulse modulated wave proportional to capacitance change
Fig 6 Modulated wave
Figure 7 shows Sensor output.
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Microelectronics Lab, Indian Institute of Science.
Fig 7 Sensor Output
Feedback force :
In Analog feedback unlike the digital The feedback is proportional to the
sensor output , So a constant factor is multiplied to the sensor output. The
constant factor is such that it counters the force applied and tries to bring the
proof mass to nominal position. This act as electrical stiffness. All the forces
that’s Damping , Stiffness & Electrical feedback Co – exist and act
simultaneously on the proof mass. In simulink we can see individual force
changing with time and accordingly decide the feedback force.
The feedback force acting on proof mass for given input pulse is show
below.
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Microelectronics Lab, Indian Institute of Science.
Fig 8 Feedback force
2.3 Introduction of PI
Feedback helps in reduction in displacement of proof mass for the same
amount of force compared to open loop. But in order to get negligible
displacement even when constant force is applied feedback force has to be
integrated before being applied to proof mass. This can be done by introducing
Proportional – Integral controller in feedback.
Finding exact values of Kp & Ki is an iterative method. For tuning PID
many method are available to start with better approximated values. One of them
is Ziegler-Nichols Step Response Method. Here we get approximate values of Kp
& Ki based on open loop step response of the system. Based on this
approximate value PID can be fine tuned to meet specific parameters like final
displacement of proof mass or the response time. Following is the part of
Simulink block diagram added in order to get values of Kp & Ki.
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Microelectronics Lab, Indian Institute of Science.
Fig 9. Simulink block diagram used in finding Kp Ki by Ziegler-Nichols Step
Response Method
Here,
parameters
are
calculated
by
taking
step
response
into
consideration. This method [8] is based on the approximate model Ga1 (s) .
Where
⎛ y ⎞ e − sτ 0
Ga1 ( s ) = ⎜⎜ 0 ⎟⎟
⎝ τ0 ⎠ s
Once this model has been determined by the step response test, we may design
controllers according to the following table. Note that only y0 and t0 are used.
•
y0 = ( y max )(tmax ) − y (tmax )
τ0 =
y0
•
y max
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Microelectronics Lab, Indian Institute of Science.
Table 1 : Constants for Ziegler-Nichols Step Response Method
Controller
PI
PID
Kp
9
10 y0
6
5 y0
Ki
3
10 y0τ 0
3
5 y0τ 0
Kd
0
3τ 0
5 y0
:
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Microelectronics Lab, Indian Institute of Science.
3. Circuit Design
3.1 Introduction
AMIS foundry 0.7µ technology [10] was chosen for fabrication. Circuit
simulations were carried out in tanner EDA tools and were verified in mentor
graphics. Layout was done in Tanner and Mentor graphics was used in parasitic
Capacitance extraction. Layout can be imported in mentor graphics in GDS II
format.
The
block
level
diagram
of
the
circuit
is
as
shown
below
Fig 10 : Block diagram of circuit
Typically, modulator contained of Transmission gate arrangement which
alternately switch ON and OFF. That converts a DC signal to high frequency
squire wave. But as here we have a MEMS sensor interface , if we give out of
phase pulses to MEMS structure having differential capacitance arrangement we
get a modulated output. As shown in fugure below.
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Microelectronics Lab, Indian Institute of Science.
Fig 11 : Modulation using differential capacitors in MEMS device
3.2 Double ended op amp
The opamp shown in fig 10 has been realized using Class AB design
shown in Fig 12. [9]. This enables large output swing and high slew rate. The
designed opamp gives a modest gain of 57 dB. Table2 gives the performance
summary of the opamp. Class AB operation was chosen because of its large
output current capability. To suppress harmonic distortion single stage amplifier
is used. By dynamically biasing the cascade output transistors the amplifier
provides large output current and large output voltage range while maintaining
gain comparable to alternate single stage design.
Table 2 : Op Amp summery
Opamp specification
Simulated results
Supply voltage
+5V
Open loop gain
57dB
Open loop Bandwidth 70kHz
Phase margin
52°
Slew rate
282.5V/µsec
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Microelectronics Lab, Indian Institute of Science.
Fig 12 : Circuit diagram of differential output Op Amp.
The simulation results for gain and phase verses frequency is as follows
Fig 13 : Gain Vs Frequency for differential output Opamp
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Microelectronics Lab, Indian Institute of Science.
Fig 14 : Phase Vs Frequency for differential output Opamp
3.3 Single ended op amp
A single ended 2 stage op amp with differential input stage and class AB output
stage is designed. As its 2 stage op amp proper compensation was used. Opamp
was used both in amplification stage and filtering stage. Following is circuit
diagram of the amplifier
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Microelectronics Lab, Indian Institute of Science.
Fig 15 : Circuit diagram of single ended op amp.
The output characteristic of op amp is as shown below
Fig 16 : Gain Vs Frequency for Single ended output Opamp
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Microelectronics Lab, Indian Institute of Science.
Fig 17 : Phase Vs Frequency for Single ended output Opamp
3.4 Filter
Fifth order Butterworth filter was used for filtering out high frequency offset from
the opamp output so that only low frequency signal is available at the output of
filter. The cut off frequency of the filter is used as 2 KHz. It ensures that signal in
frequency range of our interest is preserved where as offset which is at high
frequency of around 1 Mhz is heavily attenuated. Attenuation at 1 Mhz is around
180 DB.
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Microelectronics Lab, Indian Institute of Science.
Fig 18 : 5th order Butterworth filter
All the capacitors are external as their value is very high and they will take
lot of on chip area if integrated.
Fig 19 : Frequency response of 5th order Butterworth filter
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Microelectronics Lab, Indian Institute of Science.
3.5 Capacitor Array
Accuracy of capacitive sensing suffers due to variations in bond pad
capacitance which reduces sensitivity to the sensing capacitance. So a
capacitance array is provided to compensate for these variations. This also
serves as a on chip test circuit to validate capacitor sensing circuit.
Fig 20 : Capacitor bridge
Capacitance array can be tuned from 0.5fF to 2pF, which is generally the range
of sensing in MEMS sensors [3]. Capacitance values are binary weighted.
Latches are provided to hold value of input capacitance and turn on appropriate
switch to select that capacitance.
There are two such arrays to form a bridge. Each of the arrays can be selected
separately and values corresponding to capacitance can be stored in the latches.
Capacitance array implementation is shown in Fig 21. Higher values of
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Microelectronics Lab, Indian Institute of Science.
capacitances were implemented using Poly and Metal1 layers. Lower values
were implemented using Metal1 - Metal2 layers [10]. In order to reduce parasitic
at input of sensing circuit Metal plate of capacitance is chosen as input terminal
of sensing circuit and poly as common terminal.
Fig 21 Capacitor Array implementation
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Microelectronics Lab, Indian Institute of Science.
4. Simulation results
As shown in block diagram earlier, The input of circuit is modulated wave
whose frequency is decided by the input given to the mechanical structure (to the
differential capacitance pair). As its in high frequency the 1/f noise is reduced
when we use out of phase pulses to sense differential capacitance.
The offset of opamp is DC offset and as signal is in high frequency range
it is not much affected by the offset. Only the DC value around which pulses are
formed will vary not the pulse height which is the indication of signal. The
waveform of modulated signal with amplification is as shown below.
Fig 22 : Modulated waveform
This modulated signal is demodulated using switch arrangement. The
switches are transmission gate switches and controlling clock has to be at the
same frequency as the of the out of phase pulses applied in the MEMS structure.
Demodulated signal contain both low frequency signal and offset which is now in
high frequency range. After passing trough one more amplification stage the
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Microelectronics Lab, Indian Institute of Science.
signal is passed trough low pass filter which will remove the offset which is at
high frequency and will preserve signal which is in low frequency region.
Finally after low pass filtering the output can be fed to PID controller to
give proper feedback. The Capacitance verses output voltage plot is
shown below.
Fig 23 : Ideal C Vs V Output curve
As parasitic capacitance is one of the factor which affect the sensitivity of
a CMOS – MEMS sensor, Analysis is done with different type of parasitic
capacitances. Symmetric parasitic is when both the input terminals see same
parasitic capacitances. It was seen that sensitivity of circuit has degraded when
the symmetric parasitic are considered at the input.
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Microelectronics Lab, Indian Institute of Science.
Fig 24 : C Vs V Output curve with 100 ppm symmetric parasitic
Sensitivity of the sensor is also dependent on its ability to overcome offset
in the amplification stage. Offset is generally caused by process variations of the
transistor at the input differential pair of op amp. Due to process variation width,
length and Vt of the transistor can change, which in tern causes some voltage at
output even of both inputs are at same potential. Offset can be introduced
purposefully into circuit by changing model files. The value of Vt was changed by
5 % of its value for the transistors pair at the input of amplifier. It was seen after
simulations that there is not much effect of offset over the sensitivity of the
sensor.
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Microelectronics Lab, Indian Institute of Science.
Fig 25 : C Vs V Output curve with 5 % mismatch in Vt
Apart from symmetric parasitic capacitors there’s also possibility that
parasitic may be asymmetric. That means one of the pad see more capacitance
then other. Asymmetry of 10 ppm and 100 ppm is considered. That means if
sense capacitance is 1 pf then 10 af and 100 af asymmetry in parasitic is
considered. It was seen that as asymmetry is increased the DC level of the
output shifts. That can be explained by considering parasitic capacitance in the
capacitor bridge. If parasitic is symmetric bridge can be considered as balanced
but it there’s asymmetry there will be some DC offset due to that which will lead
to shift in DC level of the signal. It should be noted that if there is considerable
asymmetry in parasitics then output may saturate at no load condition.
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Microelectronics Lab, Indian Institute of Science.
Fig 26: C Vs V Output curve with 10 ppm Asymmetry in parasitic
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Microelectronics Lab, Indian Institute of Science.
Fig 27: C Vs V Output curve with 100 ppm Asymmetry in parasitic
Lastly, more realistic analysis with both asymmetry as well as offset is
done. It is seen that while Asymmetry causes both DC shift and change in
sensitivity, Offset have little impact on the output.
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Microelectronics Lab, Indian Institute of Science.
Fig 28: C Vs V Output curve with 100 ppm Asymmetry in parasitic and 5 %
mismatch
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Microelectronics Lab, Indian Institute of Science.
5. Conclusion
5.1 Summary
System level simulation of MEMS based accelerometer is done. Analog
Closed loop operation of accelerometer with PID controller is studied. Chopper
stabilization based Capacitive measurement circuit is designed and fabricated. A
resolution of 1ppm of the base capacitance (1pF) is achieved using extra gain
stage. The effect of parasitic and dc offset on the sensing circuit to was studied.
PID controller with variable Kp & Ki for tuning is designed. Also a amplifier stage
providing gain independent of value of Kp is provided. It was observed that in this
circuit Parasitic specially asymmetric one affects most to sensitivity compared to
symmetric parasitic & offset. The effect of Asymmetric / symmetric parasitic and
any bridge asymmetry due to mismatch can be corrected on chip by using the
capacitance array. It provides a correction of the range from 0.5fF up to 2pF. This
correction can also be used to overcome built in Asymmetry in MEMS devices.
5.2 Scope for Future work
Work can be extended further in many ways. Issues like stability in digital
feedback can be studied by more accurate modeling in Matlab. Non linear
feedback element (Comparator) in digital feedback can be analyzed and proper
compensation can be devised. Sensing circuit can be used as front end for
closed loop sigma delta feedback. Introduction of comparator in forward and
backward loop will make it digital feedback. But care has to be taken that full
system is stable.
Improvements like using nested chopper stabilization can be done.
Optimization of lower frequency Vs ratio of upper to lower frequency can be
done. This will help in implementing nested chopper in better way. Also if digital
feedback is used options like adding dithering for reduction of noise can be
explored.
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Microelectronics Lab, Indian Institute of Science.
Appendix A
Layout
A.1 Layout Methodology
Matching
•
Common Centroid layout for optimal matching especially in
opamp was employed to minimize offset.
•
Multiple finger layout methodology was employed for wide
transistors.
Routing
•
Power and Ground metal lines were made wider to reduce there
resistance.
•
Power rails were distributed evenly across the chip area to
reduce power dissipations
•
Metal 1 and Metal 2 were made wider while routing long paths.
•
Parallel routing techniques was employed.
Pin sharing, placement and general issues.
•
Input and Output pins were connected proximity to the
respective different Blocks.
•
•
Power and ground pins were located diagonally opposite
The number of substrate contacts used was high to avoid
latch up
•
Large number of via’s and contacts was used to ensure safe
connection
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Microelectronics Lab, Indian Institute of Science.
The layout of the whole chip is shown in fig 29 and the Pin
configuration details in Table 3
A.2 Layout of chip & different parts
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Microelectronics Lab, Indian Institute of Science.
Fig 30 : Layout of Chopper stabilisation and PID controller
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Microelectronics Lab, Indian Institute of Science.
Fig 31: Layout of Capacitance array
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Microelectronics Lab, Indian Institute of Science.
Fig 32 : Layout of Latches
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Microelectronics Lab, Indian Institute of Science.
Appendix B
Pin Configuration
Table 3 Pin configuration
(Pins corresponding to Chopper stabilization , Capacitor array , PID controller are
shown in bold )
PIN NUMBER I/O PIN DETAILS
1
I
VDD
2
I
10nF-pin4
3
I
10nF-Gnd
4
I
10nF-pin2
5
I
10nF-pin6
6
I
10nF-pin5
7
I
10nF-Gnd
8
I
10nF-Gnd
9
O
Output 2
10
O
Output 1
11
O
Output Enable
12
O
Out St2
13
I
C+
14
I
C0
15
I
C-
16
I
PID CAPACITOR 1uF-pin17
17
I
PID CAPACITOR 1uF-pin16
18
I
PID RESISTOR 20K
19
O
OUTPUT PID
20
I
INPUT PID
21
I
D1 (CA)
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Microelectronics Lab, Indian Institute of Science.
22
I
D0 (CA)
23
I
D2 (CA)
24
I
D3 (CA)
25
I
S0 (CA)
26
I
S1 (CA)
27
I
S2 (CA)
28
I
GC
29
I
GC+VCO RESISTOR 880K
30
I
LOOP FILTER
31
I
VCO CAPACITOR 25pF
32
O
VCO OUTPUT
33
I
GND
34
I
FREQUENCY CONTROL
35
O
CCO OUTPUT
36
I
MEMS SENSOR
37
I
CCO RESISTOR 880K
38
O
COUNT 0
39
O
COUNT 1
40
O
COUNT 2
41
O
COUNT 3
42
O
COUNT 4
43
O
COUNT 5
44
O
COUNT 6
45
O
COUNT 7
46
O
OUT +
47
O
OUT -
48
O
OUTPUT
49
I
C+
50
I
C0
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Microelectronics Lab, Indian Institute of Science.
51
I
C-
52
I
CLOCK
54
O
CLOCK2
55
O
CLOCK3
56
O
CLOCK4
57
O
SCHMITT TRIGGER OUTPUT
58
I
CAPACITOR
59
I
GAS SENSOR RESISTOR
60
I
INPUT VOLTAGE
61
O
SCHMITT TRIGGER OUTPUT
62
I
SCHMITT TRIGGER INPUT
63
I
INPUT (-)
64
I
INPUT (+)
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Microelectronics Lab, Indian Institute of Science.
Appendix C
Test Plan
Power supply voltage: 5V
Clock signal: 5V or 6V peak at 1 MHz square wave (50% duty cycle).
Components required: Five 10nF capacitance and MEMS based
differential Capacitance.
Apply 5V between Vdd (Pin 1) to ground (Pin 33) to power up the chip.
Clock signal of 5V or 6V peak and 1 MHz frequency needs to be applied
at pin 52.
Then connect five 10nF base capacitors across pins 2 to 8 these are
the filter capacitors. The value of sense capacitance of the MEMS
device (or just values of capacitors ) has to be known before hand.
Based on that value internal Capacitor bank has to be tuned. This can
be done using pin 21 to 27. Four bit value can be fed to latch at a time
using pin 21 to 24. The proper nibble can be selected by selecting
proper latch using pins 25 & 26. Finally Upper or lower back can be
selected by pin 27.
Apply 5 V for output enable pin 11 if output of first amplification
stage is to be observed. The out of phase modulated and amplified
output can be seen on pin 9 & 10. The final low pass filtered output
can be seen on pin 12. This output can externally be given to the PID
controller input. Asymmetry in the bridge capacitance can be corrected
by using the capacitance array. The capacitance array bridge can be
tuned to reduce the asymmetry and dc offset in the chip. Finally if
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Microelectronics Lab, Indian Institute of Science.
accelerometer is connected to circuit using wire bonding, the feedback
gain can be controlled using proper resistor between pin number 28 &
29.
Wire bond a MEMS based differential varactor device that produces
differential capacitance change to the capacitive sensing circuit. Tune
the bridge capacitance using the capacitance array to ensure the
output is not saturated. Measuring the output voltage at pin 46, 47
and 48 can test differential capacitance change produced by the MEMS
chip.
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Microelectronics Lab, Indian Institute of Science.
Appendix D
Wire Bonding of MEMS Device
There are different approaches of realizing electronics in MEMS. One of
them is having electronics & MEMS on same die which is fully integrated
solution[12]. Other is having two different dies one of which contains MEMS
structure and other containing sense electronics[14]. These two dies can be wire
bound and packaged as single chip. As very low capacitance measurement is
required having two different packages chips is not advisable in this case. Two
different packaged chips add on parasitic capacitances significantly and hence
should be avoided. Monolithic solution adds processing constrains as same die
has to be processed second time without affecting the already processed part of
die. Therefore System on Package (SOP) is emerging as the best alternative for
MEMS CMOS interface.
In SOP solution Once both MEMS & CMOS dies are processed they are
to be placed on common hybrid microcircuit (HMC) substrate and they are wire
bound. There are multiple ways to wire bond. There can be components on HMC
itself. HMC can be designed using CAD or dies can just be pasted on HMC
substrate or package & wire bonded to each other & to the pins of packages.
In this particular chip if MEMS based accelerometer any other differential
capacitance MEMS device is available, It can be interfaced with chip using wire
bonding. In that case, Pin 13 & 15 has to be connected to two fixed terminals of
the MEMS device. Out of phase pulses has to be applied to the variable terminal
(moving mass) of MEMS device and pin 14. Other arrangement remains as
mentioned in test plan.
Then this assembly is ready for testing. Testing can be done by using a
shaker table[4] or a tilt table or by vibrator exciter[13]. Accelerometers are
shielded by metal box to avoid RF interference. Sinusoidal excitation is given to
the accelerometer of specific frequency and the output of accelerometer is
observed on a spectrometer. A spike is observed at given input frequency and at
other frequency also some signal is present which is Brownian noise floor white
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Microelectronics Lab, Indian Institute of Science.
in nature. Static testing can be done using a tilt table where accelerometer is
tilted by a very small angle which is fraction of degrees which will lead to change
in acceleration in range of mG or µg. Output voltage can be measured and
checked with simulated value.
References
[1] Garry K Fedder “Simulation of Micromechanical systems” PhD Dissertation
University of California Berkley 1994.
[2] Hal& Kulah, Navid Y =dit and Khalil Najafi “ A CMOS Switched-Capacitor
Interface Circuit for an Integrated Accelerometer” Pmc. 43rd IEEE Midwest
Symp. on Circuits and Systems, Lansing MI, Aug 8-11,2000
[3] Michael Kraft “Closed loop digital accelerometer employing oversampling
conversion ” PhD thesis Coventry University 1997.
[4] Mark Lemkin, Bernhard E. Boser “A Three-Axis Micromachined
Accelerometer with a CMOS Position-Sense Interface and Digital Offset-Trim
Electronics” IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 34, NO. 4,
APRIL 1999, pp 456- 468.
[5] C. Enz et Al “ Circuit techniques for reducing effect of op amp imperfections :
Auto zeroing , Correlated double sampling , and Chopper stabilization”
Proceedings of IEEE Vol 84 No 11 Nov 1996
[6] Bernhard E Boser and Roger T Howe “Surface Micromachined
Accelerometer” IEEE Journal of Solid state Circuits , Vol. 31 No. 3 pp 366 – 75.
[7] Naiyavudhi Wongkomet and Bernhard E. Boser “Correlated Double Sampling
in Capacitive Position Sensiing Circuits for Micromachined Applications“
[8] Robert A. Paz “ The Design of the PID Controller“
[9] Delta sigma data converters, Theory design and simulations. Steven R.
Norsworthy, Richard Schreier, Gaber C. Temes, IEEE Press.
[10] Technology engineering CMOS “Electrical parameters CMOS 0.7u C07MA
and C07MD” Europractice IMEC, Belgium
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Microelectronics Lab, Indian Institute of Science.
[11] Analog Devices Product introduction
http://www.analog.com/accelerometer.html
[12] E. Colinet, J. Juillard, S. Guessab, R. Kielbasa “Resolution Enhancement of
a Sigma-Delta Micro-Accelerometer using Signal Prediction” International
Conference on MEMS, NANO and Smart Systems (ICMENS’04) 2004.
[13] Luo, H.; Fedder, G.K.; Carley, L.R. “A 1 mG LATERAL CMOS-MEMS
ACCELEROMETER“.The Thirteenth Annual International Conference on
Micro Electro Mechanical Systems, 2000. MEMS 2000
[14] KAJITA et al.: “A Two-Chip Interface for a MEMS Accelerometer” IEEE
TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, VOL. 51,
NO. 4, AUGUST 2002 pp 853- 58.
[15] Krishnan, G. and Ananthasuresh, G. K., “Objective Evaluation of
Displacement-amplifying Compliant Mechanisms for Sensor Applications,”
submitted to ASME Design Engineering Technical Conferences, Sep. 2006,
Philadelphia, PA.
[16] G. Krishnan, C. U. Kshirsagar, B. Manjunatha , N. Bhat and G. K.,
Ananthasuresh J. John, I. Saha and K. Kanakaraju " Design and System-level
Simulation of a High-Resolution Bulk-micromachined Accelerometer with a
Displacement-amplifying Compliant Mechanism " Indo-Chinese workshop on
MEMS and Related Technologies, New Delhi, INDIA, pp P4-1 – P4-4, Apr. 2006
(Poster paper)
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Microelectronics Lab, Indian Institute of Science.