ECE 448 – FPGA and ASIC Design with VHDL

•   P. Chu, FPGA Prototyping by VHDL Examples
Chapter 14, PicoBlaze Overview
•   K. Chapman , PicoBlaze for Spartan-6, Virtex-6, and
7-Series (KCPSM6)
ECE 44 8 – FPGA and ASIC Design with VHDL 2

Block diagram of a Single-Purpose Processor
(FSMD – Finite State Machine with Datapath) ctrl
ECE 44 8 – FPGA and ASIC Design with VHDL 3

Block diagram of a General-Purpose Processor
(Microcontroller)
ECE 44 8 – FPGA and ASIC Design with VHDL 4

PicoBlaze-3
ECE 44 8 – FPGA and ASIC Design with VHDL 5

PicoBlaze-6 Overview

Size of PicoBlaze-6 in Spartan 6
Make an educated guess
1.
Resource Utilization in CLB Slices
?
2.
Number of PicoBlaze-6 cores fitting inside of the Spartan-6
FPGA (XC6SLX16) used in the Nexys3 FPGA board
?

Size of PicoBlaze-6 in Spartan 6
1.
Resource Utilization in CLB Slices
•   26 CLB Slices
•   1.1% of Spartan-6 used in Nexys3
2.
Number of PicoBlaze-6 cores fitting inside of the Spartan-6
FPGA (XC6SLX16) used in the Nexys3 FPGA board
•   87 PicoBlaze cores

Speed of PicoBlaze-6 in Spartan 6
Make an educated guess
1.
Maximum Clock Frequency
?
2.
Maximum number of instructions per second
?

Speed of PicoBlaze-6 in Spartan 6
1.
Maximum Clock Frequency
•   105 MHz
2.
Maximum number of instructions per second
•   52.5 millions of instructions per second (MIPS)

8-bit
Address
6
7
4
5
2
3
0
1
7
7
7
7
7
7
7
7 s4 s5 s6 s7 s0 s1 s2 s3
0
0
0
0
0
0
0
0
16 Registers
F 7 sF 0

•   Instructions
REGBANK A
REGBANK B
used to switch between banks
•   Only one set of flags
Z, C, I
•   Very useful for
interrupt service routines

Zero flag - Z
Flags are set or reset after ALU operations zero condition
Z = 1 if result = 0
0 otherwise
Carry flag - C overflow, underflow, or various conditions
Example*
C = 1 if result > 2 8 -1 (for addition) or
result < 0 (for subtraction)
0 otherwise
*Applies only to addition or subtraction related instructions, refer to the following slides otherwise

KCPSM = constant (K) coded programmable state machine
ECE 44 8 – FPGA and ASIC Design with VHDL 15

Name clk reset address instruction port_id in_port read_strobe out_port write_strobe interrupt
Direction input input output input output input output output output input
Size Function
1 System clock signal.
1 Reset signal.
12 Address of the instruction memory.
Specifies address of the instruction to be retrieved.
18 Fetched instruction.
8 Address of the input or output port.
8 Input data from I/O peripherals.
1 Strobe associated with the input operation.
8 Output data to I/O peripherals.
1 Strobe associated with the output operation.
1 Interrupt request from I/O peripherals. interrupt_ack output 1 Interrupt acknowledgment to I/O peripherals
ECE 44 8 – FPGA and ASIC Design with VHDL 16

ECE 44 8 – FPGA and ASIC Design with VHDL 17

Name bram_enable
Direction output
Size Function
1 Read enable for the program memory. This signal should be connected to the enable input of the program memory and is used to reduce the power consumption associated with the BRAM(s). k_write_strobe sleep output 1 This output will pulse High for one clock cycle when KCPSM6 executes an ‘OUTPUTK’ instruction and the peripheral logic should capture the data provided on ‘out_port’ into the intended destination defined by the value of ‘port_id[3:0]’. Note that only the lower 4-bits of ‘port_id’ are used during ‘OUTPUTK’. input 1 Active High sleep control. When driven High
KCPSM6 will complete the current instruction and then enter a sleep mode in which all activity stops. Whilst in the sleep mode all strobes are inactive and the ‘bram_enable’ is
Low to disable the program memory resulting in minimum power consumption. All inputs except ‘reset’ are ignored. When ‘sleep’ is returned Low, KCPSM6 resumes execution
ECE 44 8 – from the point that it stopped. 18

Name hwbuild
Default
X”00” interrupt vector “X3FF” scratch_pad_ memory_size
64
Range Function
X”00”..X”FF” can be used to define any 8-bit value in the range ‘00’ to ‘FF’. It is then possible to load any KCPSM6 register with this value using the ‘HWBUILD sX’ instruction
X”00”..X”FFF” When an interrupt occurs (and interrupts are enabled) then KCPSM6 inserts and executes a special form of CALL instruction to a fixed address known as the interrupt vector. By default this address is ‘3FF’ (the last location of a
1K program memory).
64, 128, 256 Size of the scratch pad memory.
Increasing the default size to 128 (256) bytes, increases the resource utilization by 2 slices (6 slices).
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Development
Flow of a
System with PicoBlaze
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