2011 Faible Tension
Faible Consommation
(FTFC 2011)
Marrakech, Morocco
30 May – 1 June 2011
IEEE Catalog Number:
ISBN:
CFP1159N-PRT
978-1-61284-646-0
Pr ogr am
Monday, May 30
TUTORI A L
Time-B as ed I maging and P roc es s ing
A. Bermak
COFFE E B RE A K
I NV I TE D TA LK
P ower Reduc t ion by us ing Trans is t or Net work s
R. Reis
Tuesday, May 31
K E Y NOTE , Denis Flandre, UCL, B elgium
Dis rupt iv e ult ra-low-leak age des ign t ec hniques f or ult ra-low-power mix ed-s ignal
mic ros y s t ems
D. Flandre, O. Bulteel, G. Gosset, B. Rue and D. Bol
pp. 1-4
I T1: I NV I TE D TA LK S 1
0. 5-V High-S peed Circ uit Des igns f or Memory -Ric h Nanos c ale CMOS LS I s
K. Itoh
S iz ing low-v olt age, low-power CMOS analog c irc uit s
P. Jespers
pp. 5-8
COFFE E B RE A K
S 1: A nalog Circ uit s 1
Nanoampere S upply I ndependent Low-V olt age Current Ref erenc e
A. de la Plaza
pp. 9-11
A V t I ndependent V olt age Ref erenc e B as ed on Compos it e Trans is t ors Operat ing in Weak
I nv ers ion
P. Crepaldi, L. Ferreira, R. Moreno, L. Zoccal and T. Pimenta
pp. 12-14
Low power CMOS pot ent ios t at f or t hree elec t rodes amperomet ric c hemic al s ens or
P. A. Boutet and S. Manen
pp. 15-18
A 0. 7-V Rail-t o-Rail B uf f er A mplif ier wit h Double-Gat e MOS FE Ts
A 0. 7-V Rail-t o-Rail B uf f er A mplif ier wit h Double-Gat e MOS FE Ts
C. Parikh, D. Nagchoudhuri and A. Amara
pp. 19-22
LUNCH
I T2: I NV I TE D TA LK S 2
I mplant able B rain-Mac hine I nt erf ac es f or B ios ens ing and S ubs equent Treat ment of
Cent ral Neural S y s t em Dy s f unc t ions
M. Sawan
Low power analog f or port able and aut onomous s y s t ems
F. Maloberti
S 2: Digit al Circ uit s
Low power and Fas t A dder I mplement at ion wit h Double Gat e MOS FE Ts
K. Shaik, A. Amara, C. Parikh and A. Singhal
pp. 23-26
Ring Os c illat ors : The A s y nc hronous A lt ernat iv e
O. Elissati, S. Rieubon and L. Fesquet
pp. 27-30
P as s iv e s ens ors Net work f or t emperat ure det ec t ion
A. Bakkali, Y. Laghmich, M. R. Britel and A. Lyhyaoui
pp. 31-34
A pplic at ion-bas ed work load model f or wireles s s ens or node c omput ing plat f orms
T. Delavallée, P. Manet, I. Loiselle, H. Vandierendonck and J. D. Legat
pp. 35-38
New A pproac h f or A pplic at ion A rc hit ec t ure A dequac y in Hardware/ S of t ware E mbedded
S y s t em Des ign
Y. Manai, J. Haggège and M. Benrejeb
pp. 39-42
COFFE E B RE A K
S 3: Low V olt age Low P ower t ools
S imulat ion t ool f or mic ros ens or des ign driv en by aut onomy c ons t raint s
V. Dupé, G. Terrasson and R. Briand
pp. 43-46
Fas t E lec t ric al B at t ery Model B uilder f or E mbedded S y s t ems
N. Ferry, S. Ducloyer and N. Julien
pp. 47-50
Dat a Coding Met hods f or Low-P ower A ided Des ign of S ubmic ron I nt erc onnec t s
A. Mahdoum, L. Hamimed, M. Louzri and M. Saadaoui
pp. 51-54
E mbedding f unc t ional s imulat ors in c ompilers f or debugging and prof iling
T. Delavallée, P. Manet, H. Vandierendonck and J. D. Legat
pp. 55-58
B A NQUE T
Wednesday, June 1
I T3: I NV I TE D TA LK S 3
B ey ond 3G Wideband and High linearit y A DCs
P. Desgreys
pp. 59-62
COFFE E B RE A K
S 4: P ower Management and Opt imiz at ion
Low P ower and Fas t DCT A rc hit ec t ure Us ing Mult iplier-Les s Met hod
M. El Aakif, S. Belkouch, N. Chabini and M. M. Hassani
pp. 63-66
Mult iple t hres hold v olt age f or glit c h power reduc t ion
M. Slimani and P. Matherat
pp. 67-70
173nA -7. 5ppm/ ◦ C-771mV -0. 03mm2 CMOS Res is t orles s V olt age Ref erenc e
A. Samir, A. Samir, L. Girardeau, Y. Bert, E. Kussener, W. Rahajandraibe and H. Barthelemy
pp. 71-74
E v olut ion of wireles s s ens or net work s and nec es s it y of power management t ec hnique
R. Cheour, K. Lahmar and M. Abid
pp. 75-78
S 5: A nalog Circ uit s 2
A n Ult ra Low P ower A nalogue Radial B as is Func t ion Net work
H. Ramezani
pp. 79-82
A B and P as s A ut o-Zeroing Float ing-Gat e A mplif ier
M. Azadmehr and Y. Berg
pp. 83-86
A n E nhanc ed Folded Cas c ode Op-A mp in 0. 18 µm CMOS P roc es s wit h 67dB Dc -Gain
B. Alizadeh and A. Dadashi
pp. 87-90
Dc -Gain E nhanc ed CMOS Teles c opic Op-A mp
B. Alizadeh, S. Mohammadzadeh Bazarchi and A. Dadashi
pp. 91-94
LUNCH
S 6: E merging Tec hnologies
P roc es s V ariabilit y Robus t E nergy -E f f ic ient Cont rol f or Nano-S c aled Complex S oCs
H. Zakaria and L. Fesquet
pp. 95-98
I nt erc onnec t Topology f or Cell Mat ric es B as ed on Low-P ower Nanos c ale Dev ic es
N. Yakymets, K. Jabeur, I. O'Connor and S. Le Beux
N. Yakymets, K. Jabeur, I. O'Connor and S. Le Beux
pp. 99-102
Modeling of t he pH-ChemFE T res pons e and us ing Genet ic A lgorit hm as ex t rac t ion
paramet ers met hod
S. E. Naimi, B. Hajji, Y. Habbani, J. Launay and P. Temple-Boyer
pp. 103-106
I nv es t igat ion on t he c onv ergenc e of t he ev anes c ent model and t he poly nomial model
inc luding E f f ec t iv e Conduc t ing P at h E f f ec t (E CP E ) f or t he s ubmic ronic S DG FD S OI
MOS FE T
A. Bouziane
pp. 107-110
MOS B ULK and MOS S OI Comparat iv e s t udy us ing B S I M 3V 3. 1-P S P I CE
M. Djerioui, D. Chalabi, A. Saidane and Z. Chalabi
pp. 111-114
A Low P ower and High S peed Carbon Nanot ube 5-t o-3 Compres s or
M. Bagherizadeh and M. Eshghi
pp. 115-118
COFFE E B RE A K
S 7: RF and A nt ennas
E f f ec t s of Changing Dimens ions on t he P lanar I nv ert ed-F A nt enna P erf ormanc es
S. Ibynaich, R. J. El bakouchi, A. Ghammaz and M. M. Hassani
pp. 119-122
Finit e Dif f erenc e Numeric al S olut ion of P ois s on E quat ion in a S c hot t k y B arrier diode
Us ing Maple
E. M. Assaid and S. Aazou
pp. 123-126