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IEEE TRANSACTIONS ON SUSTAINABLE ENERGY, VOL. 4, NO. 3, JULY 2013
Hybrid 2D-3D Space Vector Modulation Voltage
Control Algorithm for Three Phase Inverters
Saher Albatran, Student Member, IEEE, Yong Fu, Member, IEEE, Ahmad Albanna, Member, IEEE,
Robin Schrader, and Michael Mazzola, Member, IEEE
Abstract—This paper presents a hybrid 2D-3D space vector
modulation control algorithm for three-phase inverters where the
fundamental output voltage is controlled to a balanced magnitude
and phase angle regardless of the load condition—balanced or unbalanced. Different topologies including three-wire and four-wire
topologies are considered in the paper. The voltage magnitude and
phase angle of the inverters’ fundamental output are precisely
controlled, and hence, the control algorithm offers synchronization
controllability over generation control in distributed generation
systems. The total harmonic distortion (THD) of the inverter
output is smaller when compared to other control algorithms
that operate solely in 2D or 3D modes. The numerical efficiency
and simplicity of the proposed algorithm are validated through
conducting MATLAB/Simulink simulations and experiments for
both balanced and unbalanced load conditions.
Index Terms—Distributed generation, four-wire three-phase inverters, space vector modulation (SVM), three-wire three-phase inverters, voltage control.
I. INTRODUCTION
T
HE increasing number of distributed generation (DG)
units, including renewable and nonrenewable sources,
in the distribution network improves the efficiency, stability,
flexibility, and the performance of the network [1]. Power electronic converters constitute the controllable interface between
various DG sources and the utility grid or the demand. The
controllability of voltage source inverters (VSIs) increases
the stability and reliability of the system especially during an
islanded operation.
Three-phase inverters are employed in power systems and
industrial applications, such as ac drives, uninterruptible power
supplies (UPS), switching compensators, and unified power
flow controllers (UPFC), where the controllable frequency and
ac voltage magnitude is achieved through various pulsewidth
modulation (PWM) control strategies. Additionally, the generation control in distributed generation systems is primarily
Manuscript received July 13, 2012; revised December 24, 2012; accepted
January 26, 2013. Date of publication March 07, 2013; date of current version
June 17, 2013. This work was supported by the U.S. Department of Energy
under Grant DE-FC26-08NT01923.
S. Albatran, Y. Fu, R. Schrader, and M. Mazzola are with the Department of Electrical Engineering, Mississippi State University, Starkville,
MS 39759 USA (e-mail: sa668@msstate.edu; fu@ece.msstate.edu;
robin.schrader@hotmail.com; mazzola@ece.msstate.edu).
A. Albanna is with Panasonic Automotive Systems of America, Farmington
Hills, MI 48331 USA (e-mail: albanna@siu.edu).
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/TSTE.2013.2245689
achieved through the power electronic interface between the
DG source and the demand or grid.
The conventional topology of three-phase inverters consists
of three legs, where the midpoint of each leg forms a single
phase that is connected to the point of common coupling (PCC)
through a transformer or a filter. The neutral current in this
topology, in a -connected load, is forced to zero due to the
absence of a physical path for the current to flow. Alternatively,
when the physical path of the neutral current is available, the
compensation of the neutral current is mainly achieved through
two methods: The first method compensates the neutral current through controlling an additional (fourth) leg to the inverter topology (eight power switches). The midpoint of the additional fourth leg is tied to the neutral of the load (assuming a
-connected load). The second compensation method is to use
a split-capacitor topology, where the dc midpoint, or alternatively referred to by dc neutral, is physically tied to the load’s
neutral (assuming a -connected load). From the technical perspective, the performance and controllability of the first method
is enhanced by the additional fourth leg. Economically, the split
capacitor topology is preferred due to fewer switching devices
[2].
Generally, grid-connected applications employ current control where the inverter output voltage is indirectly kept constant by the grid’s voltage. The inverter output current (interchangeably the inverter output power) instantaneously tracks a
predefined reference. Alternatively, the voltage control of the
inverter output is employed in islanded power systems where
the inverter fundamental output voltage is controlled to follow
a predefined reference. In this paper, the proposed voltage control algorithm is employed so that the VSI can supply islanded
balanced and unbalanced loads without the need of a feedback
current control loop.
Different continuous PWM [3], [4] and discontinuous PWM
strategies such as DPWM1 [5] are used to control the VSI due
to their efficiency in terms of voltage linearity, output current
ripple, dc current ripple, and average switching frequency requirements [6]. Sinusoidal pulsewidth modulation (SPWM) [7]
is a carrier-based technique achieved by comparing a reference
sinusoidal signal with a triangle carrier signal to generate a
sine weighted modulating signal. The drawbacks of SPWM are
mainly that the harmonics generated with SPWM may not be
totally suppressed, the range of linearity is narrow, and the dc
bus utilization is only up to 78.5% [8]. Space vector modulation
(SVM) is another direct digital PWM technique proposed in
1982 [9] and improved by [10], which becomes a basic power
processing technique in three phase converters [11], [12].
1949-3029/$31.00 © 2013 IEEE
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735
Fig. 1. PMSG-wind turbine connected to ac load through three-phase VSI.
Recent research has proven that SVM is the most favorable
PWM scheme due to the following advantages: it enhances
the dc link utilization, reduces the harmonic and switching
losses, as well as widens the linear modulation range for the
output line-to-line voltages. Additionally, SVM algorithms
can be easily implemented using digital controllers [13], [14].
SVM can be employed in either a 2D or 3D frame of reference.
Two-dimensional SVM is used for balanced applications, i.e.,
the absence of neutral current, while 3D-SVM is considered in
unbalanced loading conditions.
For both voltage and current controlled VSI, extensive research has been performed on the 2D-SVM control of three-leg
inverters [15], [16]. Reference [17] presented an overview of
PWM and 2D-SVM techniques for voltage controlled inverters.
Concurrently, 3D-SVM was employed in the control of four-leg
inverters as presented in [18] and [19]. Since split capacitor
topology did not attract 2D-SVM, [20] presented the split-capacitor three-phase converter controlled as the current regulator
employing a 3D-SVM control algorithm. Moreover, [21] presented the VSI with split-capacitors as a power quality compensator. Other applications of 3D SVM based on the logical functions and sequence decomposition are found in [22] and [23].
Unbalanced operation typically occurs in islanded microgrids, so controlling the voltage has higher priority over the
current. This novel voltage control algorithm combines both
features of 2D and 3D SVM. For instance, the proposed algorithm offers simplicity of implementation and a lower total
harmonic distortion (THD) of voltage and current at PCC
similar to the 2D SVM algorithm. As the 2D SVM is only
limited for the three-wire topology and the 3D SVM is usually
employed in the four-wire topology, the proposed algorithm
guarantees a balanced and lower THD voltage irrespective of
load conditions (balanced or unbalanced three-phase load).
The topology and load independent features of the proposed
algorithm makes it favorable over existing 2D and 3D SVM
algorithms.
Besides obtaining a balanced three-phase voltage at the load
side for balanced and unbalanced loading conditions, The proposed hybrid 2D-3D SVM provides numerical simplification of
existing SVM algorithms and shows the following advantages:
1) The proposed algorithm has a general form which can work
with the existence of the neutral path (split-capacitor) or not
(three-wire system). 2) The simulation results show the ability
of this algorithm in handling the uncertainties at both load and
generation sides. 3) Controlling the reactive power in microgrids can be achieved by controlling the voltage magnitude offered directly by this algorithm. Also, the direct control of the
voltage angle can offer a controllability of the active power
grid-connected applications. 4) Since there is no existence to the
PI-controllers in this algorithm, the stability of the inverter can
be enhanced during abnormal operation which may force the
PI-controllers to instable regions. 5) From power quality perspective, the proposed controller enhances the voltage and the
current THD at the PCC.
In this paper, the system description is presented in Section II.
The hybrid 2D-3D SVM is presented in Section III. In
Section IV, various case studies are conducted to validate this
new algorithm in balanced and unbalanced conditions. Finally,
the paper is concluded in Section V.
II. SYSTEM DESCRIPTION
Fig. 1 depicts an ac load fed by a wind generation system
through a three-phase split-capacitor VSI which converts the
dc-voltage obtained from the generation side to an ac-voltage at
the load side. The dc neutral point in Fig. 1 is connected to the
ac neutral of the load through a switch . The system at the
ac side will be four-wire if the switch
is ON and this physical
connection constitutes a four-wire three-phase topology as well
as provides a return path for the zero-sequence component of
the load current during unbalanced loading conditions. When
the switch
is OFF, the ac system will be three-wire which
means that there is no neutral path and the split-capacitor can
be considered as one capacitor.
The power switches
and are assumed
ideal, i.e., their switching and conduction losses are ignored.
The inductance
represents the series equivalent of the
coupling transformer, line inductance, and low-pass filter inductance of the three phases. The three-phase shunt capacitor bank
represents the low-pass filer at the point of common coupling (PCC) for power quality improvement purposes. The inductive load represents a three-phase load which can be in either
conditions of balanced or unbalanced.
A. Wind Generation System Description
The wind generation system shown in Fig. 1 consists of wind
turbine connected to a permanent magnet synchronous generator (PMSG). Since the ac voltage signal produced from the
PMSG is variable in magnitude and frequency, a three-phase
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Fig. 2. Phase
IEEE TRANSACTIONS ON SUSTAINABLE ENERGY, VOL. 4, NO. 3, JULY 2013
equivalent circuit. (a) Upper switch
is ON, and (b) lower switch
uncontrolled rectifier is used to solve the frequency variation at
the ac side and another controlled boost dc/dc converter is used
to keep the voltage at the dc side fixed around a reference value
.
The power produced from the wind turbine can be expressed
in the well-known equation
(1)
where is air mass density, is the swept area, is the wind
velocity, and
is the performance coefficient [24] which is
defined in (2), where the tip speed ratio is the ratio between
the turbine shaft speed and the wind speed (3):
(2)
(3)
is the turbine shaft angular speed in rad/s, and is
where
the radius of the blades.
, where
It is essential for the wind turbine to work at
is the optimal tip speed ratio at which the maximum power
depends mainly
is extracted from the wind. The value of
on the wind turbine characteristics. Since the maximum power
point tracking (MPPT) algorithm is beyond of the scope of this
paper,
is assumed to be known and the turbine shaft speed
is directly found by
(4)
The mechanical power extracted from the wind is applied
to the PMSG to produce a three-phase ac voltage
which is variable in frequency and magnitude. The rotor electrical speed of PMSG is linearly dependent on the shaft speed
, where is the number of pole pairs in the PMSG.
Then the generated ac voltage can be converted into a variable
primary dc voltage
as an input voltage to the controlled
dc/dc boost converter. The function of the dc voltage control
loop is to keep the output dc voltage
regulated to a predefined reference dc voltage
. The error between
and
the filtered
, using a low-pass filter (LPF), is regulated using
a PI-controller and converted to logic value which is the duty
cycle of the switch
. The relation between the input dc
voltage
and the output dc voltage
is defined as
(5)
is ON.
is an almost constant dc value with a small
The dc voltage
ripple. This ripple increases during disturbances such as wind
speed variation.
B. Voltage Source Inverter Description
With assuming
as input dc voltage to the VSI, the voltage
of each capacitor will be
as shown in Fig. 1. The
three-phase VSI is controlled by the hybrid 2D-3D SVM algorithm to supply balanced and positive-sequence three-phase
voltage at PCC. Regardless of the demand state, being balanced
or unbalanced, the proposed controller ensures balanced positive-sequence phase voltages at the load terminals
and
.
The two ideal and complementary switches,
and
in
Fig. 1, constitute one phase (leg) of the VSI. The equivalent
single-phase circuit of the system for phase is shown in Fig. 2.
The output voltage of phase is generated through controlling
the gate pulse signals of the upper switch
and the lower
switch . Whenever the upper switch
is ON
[see
Fig. 2(a)], then the corresponding normalized magnitude of the
output voltage of phase , denoted by
, will be
. On the other hand, if the lower switch
is ON
[see Fig. 2(b)], then the corresponding normalized magnitude
(line to neutral ) of phase voltage
will equal
. The
same principle applies for phases and which are controlled by
the pairs
and
, respectively. The normalized magnitudes of three phase voltages
are, therefore, given by the switching function notion as
follows:
(6)
Considering all three legs together, there will be eight possible combinations of the phase voltage magnitudes as depicted
in Table I. The application of Clarke’s Transformation results in
the normalized vectors
in the
-space
(7)
where
is a topology scaling factor to choose between threeand four-wire topologies. Here
for the four-wire
system.
The resulting eight switching vectors,
in
the
-space are listed in Table I as well.
and
are the
zero vectors, where the line voltages at the ac side are zero and
the active vectors are
and .
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TABLE I
COMPONENTS
NORMALIZED OUTPUT VOLTAGE AND
FOR ALL POSSIBLE SWITCHING VECTORS
Fig. 4. (a) Vectors through dividing the 3D space into six prisms,
(b) Formulation of two tetrahedrons TH and TH in .
Fig. 3. Block diagram of the proposed hybrid SVM.
In a three-wire system, there is no neutral path between the
ac load and the dc source. In other words, only one capacitor is
used. The normalized phase voltages
and
will
be
instead of
and the related
vectors will follow
(7), but with
; this will be explained in Section III-E. In
three-wire systems, balanced loading conditions are expected.
The control algorithm is used to enhance the system performance and to restore the system to its normal state when some
disturbances occur.
III. HYBRID SPACE VECTOR MODULATION
Fig. 3 depicts the block diagram of the proposed hybrid
2D-3D SVM. In Fig. 3, the 2D-SVM generates
reference
voltage signals and its position from the input parameters.
Then, the 3D-SVM is used to generate the pulse signals to
the six switches by calculating the duty cycles needed for
symmetrical modulation. The proposed algorithm can work for
both four-wire and three-wire systems. Difference modules are
discussed in the following subsections.
A. Reference Voltage Computation
The proposed modulation algorithm is internally designed
to force the negative- and zero-sequence components of the
output voltage to zero, hence driving the inverter fundamental
output voltage to follow the positive sequence component
–
.
, where
is the fundamental power frequency in rad/s. The reference voltage
waveform
is directly generated from the user-defined input
parameters, the amplitude of the reference
, and the power
frequency angle
. These parameters can be fine-tuned to
control other important parameters, for instance, the control of
power flow in grid-connected applications of the VSI. From a
power quality perspective, the THD at the PCC is investigated
through performing a fast Fourier transform (FFT) on the
inverter output voltage and current.
Using inverse Park’s Transformation, the reference voltage
is hence represented in the
-plane using the decomposition in (8):
(8)
where
is the normalized -component of
and
is the normalized -component of
. The decomposition of
the reference voltage in (8) consists of two orthogonal and normalized vectors with 90 phase shift between them.
B. Determination of Reference Voltage Position
The resulting eight switching vectors
listed in Table I divide the
-space into six prisms as
shown in Fig. 4(a). Each prism contains three of the eight
vectors resulting from (7). For example, the shaded prism
in Fig. 4(a) is composed with three vectors, specifically,
the origin vector
, vector
,
and vector
. Similarly, Prism
1,
in Fig. 4(a), is formed with the origin vector
,
vector
, as well as the vector
, and so on. With reference to
Fig. 4(a), four switching vectors in the
-space typically
divide each Prism into two tetrahedrons (TH). For example,
considering
in Fig. 4(a), the switching vectors
and
along the origin vector
form the two tetrahedrons TH and TH , as shown in Fig. 4(b). As the position of
the reference voltage vector
in the
-plane will reside in
one unique prism, it is critically important to specify the exact
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IEEE TRANSACTIONS ON SUSTAINABLE ENERGY, VOL. 4, NO. 3, JULY 2013
TABLE II
BOUNDARY PLANES OF THE TWELVE TETRAHEDRONS
TABLE III
SWITCHING MATRICES FOR THE TWELVE TETRAHEDRONS
prism and, therefore, the corresponding tetrahedron that holds
the reference voltage
.
Each tetrahedron is bounded by three planes in the
-space. Definitely, the plane
is formulated by moving
the switching vector towards the switching vector . Hence,
an individual plane equation can be determined using the points
and the origin (0, 0, 0) according to
(9)
where
and
are given as
where
and
are the two nonzero switching vectors which form the target
tetrahedron for
and
is the
vector sum of the zero-voltage vectors
and
which means
that the inverter output line-to-line voltage is zero,
and
are the duty cycles of the switching vectors
and
, respectively.
Rearranging (11) yields
(12)
The number of the 2D planes needed to draw the 12 tetrahedrons can be reduced to six boundary planes, which are
and
, as in (10), with the notice
that
is the negative of
due to similar vector trajectories
(10)
For each reference voltage vector
in the switching period
, the left-hand sides (LHS) of the
plane equations given in (10) determine the position of the reference vector. If the LHS of the plane equation is positive, then
the point
lies above the corresponding
plane; if the LHS is negative, then the reference is below the
plane. Finally, if the LHS equals zero, then the reference point
lies on plane’s boundary. Table II summarizes the plane coordinates for the 12 tetrahedrons. Odd numbered tetrahedrons will
be called the UPPER tetrahedrons, while even-numbered tetrahedrons will be called the LOWER tetrahedrons.
C. Duty Cycle Computations
After determining the target tetrahedron of the reference
from Table II, three of the eight switching vectors in the
-space in Table I, will be used to express the average value
of the reference voltage
. For an arbitrary switching cycle
let the average value of the reference vector equal
(11)
is the switching matrix of the corresponding target
where
tetrahedron. The switching matrices of the 12 tetrahedrons are
listed in Table III. Each switching matrix depends on the reference voltage position which in turn determines the target tetrahedron in Table II.
The duty cycles are computed from (12). Since the zerovoltage vector
utilizes both switching vectors
and ,
which are in opposite directions based on Table I and Fig. 4,
the duty cycle
is the algebraic sum of
and , which
are the duty cycles of the switching vectors
and , respectively. If the reference voltage
lies in the upper tetrahedron,
. Whenever the reference
lies in the
lower tetrahedron,
. During any cycle, the algebraic sum of the duty cycles (13) applies:
(13)
D. Symmetrical Modulation
Symmetric modulation is used to generate the gate pulse sequence pattern by comparing the time of each vector which
is
, which is
, which is
, and
which is
, with symmetrical carrier signal as shown in
Fig. 5. The switching gate pulses for the VSI are generated to
ensure minimal current ripple distortion as well as to maintain
the same voltage polarity at the inverter output. The switching
sequence is thus formulated according to Table IV.
E. Three-Wire System
With using the split-capacitor, the scaling factor of Clarke’s
Transformation is set to be
to keep the magnitude in the value-invariant form of the transformation. The
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SYSTEM
Fig. 5. Symmetrical modulation of prism
TABLE V
LINE PARAMETERS
AND
.
TABLE IV
SWITCHING VECTORS SEQUENCE FOR EACH PRISM
factor
is the normalized magnitude as in (8), and in
Section III-C, the SVM algorithm aims to keep the average of
reference vector in the period
follow sinusoidal wave with
the amplitude of
. This is guaranteed by the symmetrical
modulation and the duty cycle calculation. Since duty cycle
calculations depend on
and
, as shown in (12),
and these vectors are tabulated in Table I, it is important to keep
these three vectors constant for both three-wire and four-wire
(split-capacitor) systems. In other words, the scaling factor
can be 2/3 for four-wire system and 1/3 for the three-wire
system. So,
and
will be the same for these two
systems and the switching matrices
in Table III can work
for both of them. This factor will keep the magnitude of the
reference voltage
similar to the magnitude of the phase
voltage at the load side.
Therefore, this proposed algorithm works for both split-capacitor and one-capacitor at the same time by keeping the normalized vectors in
-space as shown in Table I regardless if
the output voltage at each phase is
or
.
IV. SIMULATION AND DISCUSSION
In order to show how this new proposed hybrid SVM is
efficient during normal and abnormal conditions, several case
studies are simulated using the MATLAB/Simulink tool. As
this algorithm can work for three-wire and four-wire systems,
Sections IV-A and IV-B will study the performance of split-capacitor three-phase VSI supplied by an ideal dc source (in
Sections IV-A), and PMSG-wind generator shown in Fig. 1 (in
IV-B). The idea behind testing the proposed algorithm with
an ideal dc source is to compare the results obtained by this
algorithm with that in the literature. Also the wind generator
is used to show that this algorithm works without any problem
when there are some disturbances at the generation side beside
the uncertainty at the load side. In Subsection C, the hybrid
SVM algorithm is applied to the three-wire system for balanced
load and with applying similar disturbances.
Fig. 6. PCC phase voltages at the 10-kW load terminals.
The 10-kVA three-phase split-capacitor VSI of Fig. 1 is simulated with the system and line parameters defined in Table V.
The inverter fundamental output voltage of phase is forced to
track a predefined sinusoidal reference
. The rms value of
the reference phase voltage is set at 220 V, and the phase angle
of voltage is set to be
. The voltage parameters, i.e.,
and , are kept constant throughout the simulation
studies that are conducted and discussed in the following subsections.
A. Four-Wire System With DC Source
The first three case studies are presented to validate the proposed algorithm for balanced and unbalanced loads. The fourth
and the fifth case studies are presented to make a comparison
between the results of this algorithm and the experimental results presented in [23].
1) 10-kW Balanced Load: In this case study, the three-phase
split-capacitor VSI is feeding a 10-kW balanced load at the
PCC. The first three cycles (0.06 s) of the phase voltages at the
PCC are shown in Fig. 6. According to Fig. 6, the hybrid SVM
needs only a half cycle to reach the steady state. The load’s phase
voltage is following the reference voltage with a small error
margin as depicted in Fig. 7 and the neutral current is shown in
Fig. 8.
Power quality standards require the THD of the voltage at
the PCC to be less than 5%. The voltage at the PCC under the
hybrid SVM control has a THD of 0.34%, which in turn implies
a better quality voltage injected to the load is achieved under
this control algorithm.
2) Open Phase Load Condition: All system and line parameters remain unchanged from the previous case study. The open
phase case is achieved by opening phase at
s; i.e., the
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Fig. 7. Phase
IEEE TRANSACTIONS ON SUSTAINABLE ENERGY, VOL. 4, NO. 3, JULY 2013
load voltage and the reference signal.
Fig. 10. Phase voltages at the PCC during a single phase-ground fault.
Fig. 8. Neutral current during balanced 10-kW load.
Fig. 11. PCC phase voltages at unbalanced resistive load terminals.
Fig. 9. Voltage of phase
and phase
during open phase .
current flowing into phase is forced to zero. Fig. 9 shows stable
and undistorted phase voltages of phases and during this
disturbance. The THD of the voltage at the PCC is still 0.34%.
Results in Fig. 9 show the validity of the proposed algorithm to
supply each phase of the load independently of the other phases.
3) Single Phase-Ground Fault: The load and system parameters are set back to their original values as in Case A.1. A single
phase to ground fault is applied to phase at time
s for
only one fundamental cycle. Phase voltages of phases and
are not affected by the fault, wherein phase voltage is zeros
during the fault period as shown in Fig. 10. After the fault is
cleared at
s, phase will follow the reference and
the THD of the voltage at the PCC quickly restores to the value
0.34%.
4) Unbalanced Resistive Load: In this case, the resistances
at phases and are 50 and 25 at phase . Fig. 11 shows
that the load voltage is symmetrical and not affected by this unbalanced loading. Fig. 12 shows the asymmetrical load current.
From Figs. 11 and 12, the system needs about one cycle to start
supplying the undistorted power signal and the voltage is always balanced at the load side. The THD of the load voltage
and current are 0.64% for phases and and 0.49% for phase
. In [23], the authors did a premium work and the THD for
the voltage signal is 2.12% and 2.40% for the current signal.
This comparison shows the advantages of using this simple algorithm in unbalanced conditions. For the 2D-SVM, as shown
in Fig. 13, it fails to maintain a balanced output voltage during
an unbalanced load condition. The THD for voltage of phase
is 1.49%.
5) Load Change for Inductive Load: In this case, the load
starts as symmetrical inductive load of 50 in series with 3 mH.
After 0.1 s, the resistance at phase becomes 25 . Fig. 14
ALBATRAN et al.: HYBRID 2D-3D SVM VOLTAGE CONTROL ALGORITHM FOR THREE PHASE INVERTERS
Fig. 12. Three-phase load current at unbalanced resistive conditions.
Fig. 13. PCC phase voltages at unbalanced resistive load terminals with
2D-SVM.
shows that the three-phase voltage is fixed in phase and magnitude and unaffected by this disturbance. The load current shown
in Fig. 15 is matching the load change without any problem.
The THD of the voltages are 0.47% for phase and 0.63% for
both phases and . The THD of the load currents are 0.42% for
phase and 0.61% for the other two phases. These results can be
compared with 2.29% for the THD in the voltage and 2.47% for
the THD in the current signals in [23]. Figs. 16 and 17 show that
the 2D-SVM fails to maintain a balanced output voltage during
an unbalanced load condition. The output voltage and current
were balanced before applying the unbalanced load change and
then the output voltage is unbalanced. For phase , the THD of
the output voltage is 1.73%, and 1.71% for the output current.
B. Four-Wire System With Wind Generator
In this subsection, the ideal dc source will be replaced by wind
generator. The first three cases in Section IV-A will be studied.
1) 10-kW Balanced Load and Wind Generator: In the following three cases, the proposed voltage control algorithm is
tested by adding uncertainty at the dc side by considering the
wind generation system shown in Fig. 1. The wind turbine has
Fig. 14. Phase voltages at the PCC during load step change at phase
inductive load phase .
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and
Fig. 15. Inductive load currents during load step change at phase .
the following parameters:
m,
kg/m , and
. The first second of the dc voltage obtained from
the wind generator and the boost converter is shown in Fig. 18.
This signal represents the transient starting voltage which contains many harmonics and that can also simulate the effect of
the input wind speed variation on the dc voltage.
The voltage at the PCC with distorted input dc voltage is similar to the voltage waveform obtained using ideal dc source, as
shown in Fig. 19. The voltage and the current THD is 0.52%
which is slightly greater than the THD obtained in Case A.1.
This result shows the ability of this proposed voltage control algorithm in handling the uncertainty at the dc-side.
2) Open Phase Load Condition and Wind Generator: Similar to Case A.2, phase is disconnected at
s and the
other phases and are connected to the same load in Case
B.2. As expected, the voltage and the current THD at phase
and phase is still 0.52% and the voltage waveforms are not
affected by this disconnection. The voltage at the PCC point is
similar to that presented in Fig. 9 and this small THD indicates
that the voltage waveform is almost pure sine-wave.
3) Single Phase-Ground Fault and Wind Generator: Also
similar to Case A.3, a single phase to ground fault is applied to
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Fig. 19. Phase voltages at the PCC during load step change at phase
inductive load.
Fig. 16. PCC phase voltages at inductive load terminals with 2D-SVM.
Fig. 17. Inductive load currents during load step change at phase
2D-SVM.
with
and
Fig. 20. Phase voltages at the PCC with three-wire system and wind generator.
phase voltage is zeros during the fault period, the same as the
result shown in Fig. 10. After the fault is cleared at
s,
phase will follow the reference and the THD of the voltage at
the PCC quickly restores to the value 0.52%.
C. Three-Wire System With Variable Wind Generation
Fig. 18. Input dc voltage
generated from the wind generation system.
phase at time
s for only one fundamental cycle. Phase
voltages of phases and are not affected by the fault, wherein
For the three-wire system, there is no neutral path and so there
is only one capacitor at the dc side which is the output from the
wind generation system. Similar to Cases A.1 and B.1, 10-kW
resistive load is fed by VSI. The voltage and current THD is
0.31% for the ideal dc source and 0.51% for the wind generation
system.
In this case, a single-phase to ground fault is applied at phase
at
s for one cycle; then an open phase occurred at
phase at
s for one cycle. Fig. 20 shows the threephase load voltages during these disturbances. Since the system
is a three-wire system, the other two phases will be affected by
the disturbances at phase . But the proposed voltage control
algorithm shows the ability to restore the system to its normal
state very quickly, as shown in Fig. 20.
ALBATRAN et al.: HYBRID 2D-3D SVM VOLTAGE CONTROL ALGORITHM FOR THREE PHASE INVERTERS
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Fig. 23. Three-phase load voltages and currents in unbalanced load.
Fig. 21. Test bed for validating the proposed algorithm.
Fig. 24. Phase THD in unbalanced load: (a) voltage THD; (b) current THD.
TABLE VI
SYSTEM PARAMETERS
VI. CONCLUSION
Fig. 22. Three-phase load voltages, currents, and THD in balanced load.
V. EXPERIMENTAL VALIDATION
The experimental arrangement shown in Fig. 21 is used
to validate the proposed algorithm. The control function is
achieved via a F28335 eZdsp programmable chip. The system
parameters are listed in Table VI. In this section, two case
studies are conducted to validate the proposed algorithm under
both balanced and unbalanced load conditions. In the first
study case, Fig. 22 depicts the three-phase output voltages and
currents for a balanced three-phase load with the 50- resistive
load at each leg. The measured voltage and current THD
are 0.8% and 0.9%, respectively. The second case exhibits a
reduction of the phase to 33 . The measured output voltage
and current waveforms are shown in Fig. 23. The measured
voltage and current THD shown in Fig. 24 are 0.9% and 1.1%,
respectively.
A new voltage control SVM-based algorithm has been presented in this paper. Beside the ability of supplying balanced
voltage at the load side independently of the loading state (balanced or unbalanced), this algorithm is efficient and reduces the
number of the needed measurement units. The proposed algorithm does not use any PI-controllers, which reduces the stability problems that may happen from the undesirable performance from such controllers during abnormal operation. The
proposed algorithm gives a direct control to the voltage magnitude and the voltage angle; this is necessary in controlling power
flow. This new algorithm is a hybrid between the 2D-SVM and
the 3D-SVM, so it has the ability to handle the unbalanced condition efficiently by implementing the complexity of 3D- and
the simplicity of the 2D-SVM. The novelty of the proposed
hybrid 2D-3D SVM algorithm, which is generating balanced
output voltage with lower THD independent of load irregularities, was investigated and validated through various simulations
as well as experimental case studies.
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Saher Albatran (S’12) received the B.Sc. degree in electric power engineering
from Yarmouk University, Irbid, Jordan, in 2005, and the M.Sc. degree in electric power and control engineering from Jordan University of Science and Technology (JUST), Irbid, Jordan, in 2008. Currently, he is working toward the Ph.D.
degree in electrical engineering at Mississippi State University.
He was an instructor in the Electrical Engineering Department, Faculty of
Engineering, Tafila Technical University, Tafila, Jordan. His research interests
include modeling, simulation, and control of dynamic systems.
Yong Fu (M’05) received the B.S. and M.S. degrees in electrical engineering
from Shanghai Jiaotong University, China, in 1997 and 2002, respectively, and
the Ph.D. degree in electrical engineering from the Illinois Institute of Technology, USA, in 2006.
From 2006 to 2009, he was a senior research associate in the Electric Power
and Power Electronics Center at the Illinois Institute of Technology. Presently,
he is an assistant professor in the Department of Electrical and Computer Engineering at Mississippi State University. His research interests include power
system optimization and economics, and renewable energy integration.
Ahmad Albanna (M’07) received the M.Sc. and Ph.D. degrees in electrical
engineering from Southern Illinois University Carbondale in 2006 and 2010,
respectively.
Currently, he is a senior lead power electronics engineer at Panasonic Automotive Systems where he is responsible for multiple design, modeling, and
simulation projects of power electronics for vehicular power systems.
Robin Schrader received the B.S.E.E. and M.S.E.E. degrees from Mississippi
State University in 2003 and 2012, respectively.
She worked for the past ten years as an applications engineer for SemiSouth
Laboratories, Inc. She is now a research associate in the Center of Advanced
Vehicular Systems (CAVS) at Mississippi State University. Her educational and
work experience has been in the area of power electronics.
Michael Mazzola (S’84–M’86) received the Ph.D. degree from Old Dominion
University in 1990.
He is currently a professor of electrical and computer engineering at Mississippi State University (MSU). From 1990 to 1993, he worked at the Naval
Surface Warfare Center in Pulsed Power Research and Technology. In 1993,
he joined the faculty of MSU. He has a technical background in semiconductor
devices and applications in power electronics, and their application in automobiles gained while leading research in the MSU Center for Advanced Vehicular
Systems (CAVS). He has contributed to the areas of silicon carbide device prototyping and application as well as materials growth and characterization for the
last 17 years. He is a registered professional engineer.