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Pole-Zero Analysis of Multi-Stage Amplifiers: A Tutorial Overview Punith R. Surkanti, Annajirao Garimella and Paul M. Furth Klipsch School of Electrical and Computer Engineering, New Mexico State University, Las Cruces, NM 88003, USA Email: [email protected], [email protected], [email protected] Abstract- Analyzing pole-zero locations of an amplifier is essential to 1) understand the characteristics of a circuit in the frequency domain, and 2) choose appropriate frequency compensation techniques to guarantee the stability of a circuit over a specified range of load resistance and capacitance. The objective of this paper is to provide tutorial treatment of the steps for analyzing poles and zeros in multi-stage amplifiers. These techuiques can be equally applied for the analysis of power management circuits such as low-dropout voltage regulators (LDOs) and controllers for DC-DC converters. I. INTRODUCTION Fig. 1. Finding the analytical equations of poles and zeros is often 1) choose appropriate frequency compensation techniques to stabilize an amplifier and 2) understand which Schematic of two-stage amplifier with cascode compensation [I]. adapted from Fig. 3 of [1]. The first stage is a PMOS essential to folded cascode differential amplifier and the second stage parameters have more impact than others, aiding in tuning output resistance and lumped parasitic capacitance of the first is a PMOS common-source amplifier. The transconductance, the circuit for desired frequency response. In this tutorial, we and second stage are represented by explain the process of performing small-signal analysis and C1 deriving the equations of poles and zeros in two-stage and three-stage amplifiers. Section II outlines the steps for finding and COUT gmb gm2, R1, ROUT, respectively. The first stage is inverting so as to ensure that the overall gain from VI N + to VOUT is non­ inverting. Equations for the small-signal parameters of the poles and zeros. Section III illustrates pole/zero analysis in amplifier are given in Table I and the small-signal model is a two-stage folded-cascode op-amp. Section IV shows an shown in Fig. 2. example of analyzing poles and zeros for a more complex three-stage amplifier. SPICE simulations are performed to compare hand-computed pole/zero locations with AC analysis. II. STEPS FOR FINDING POLES/ZEROS The steps for obtaining the DC gain, poles and zeros: 1) Draw the small-signal model 2) Apply Kirchhoff's Current Law (KCL) at each node 3) Solve the KCL equations using symbolic manipulation Fig. 2. Small-signal model of two-stage amplifier with cascode compensation. software to obtain the transfer function 4) Set 8=0 to find the DC gain of the amplifier 5) Factor and solve the numerator to obtain zeros 6) Applying the assumption of widely-separated poles, solve the denominator to obtain the poles, OR applying the assumption of widely-separated poles with complex pole pair, solve the denominator to obtain the poles III. POLE-ZERO ANALYSIS OF TWO-STAGE AMPLIFIER Compensation networks such as Miller compensation [2]­ [4], cascode compensation [1], [5]-[8], nested Miller compen­ sation (NMC) [9], [10], and reverse NMC (RNMC) [6], [11] are widely used techniques to stabilize multi-stage amplifiers. The transistor-level schematic of a two-stage op-amp using cascode compensation is shown in Fig. 1. This circuit is The first-stage is represented with voltage-controlled current gMIVS, where Vs Vs == VI N + VI N source (VCCS) age, given by is VI . - _. is the differential input volt­ The output of the first-stage The second-stage is represented with VCCS The output of the second-stage is capacitor and vx, transistor Cc and resistor where Vx Rc VOUT. gM2Vl. The compensation are connected between VOUT is the source node of the common-gate M6. Transistor M6 acts as a positive current buffer Vx and VI represented with VCCS gmBvx. Transistor resistor Rc and compensation capacitance Cc form the between M6, cascode compensation. The impedance looking into the source M6 is 1/ gmB, connected between nodes Vx and Rc can be used to increase the impedance 1 looking into the source to __ + Rc, as illustrated in [6], [7]. 9",B terminal of ground. Resistor 978-1-61284-857-0/11/$26.00 <92011 IEEE TABLE I (WPI 9m of M9 . ro9lirolOIIRL Gqd9 + GqdlO + GL * . 9m of M6 . b1 � . ic WPI. WP2 (1), we apply KCL at every node in Fig. 2. Let o VOUT to node vx. - = The set of KCL equations are = :!!.QJl.X... (7) (2) so as to eliminate (1) using symbolic manipulation software. The transfer WZI ) ( sJ ) (1+ + ADe 1+w� 8 wPl s, S2 (2) VI , Vx and ic to obtain the transfer function G(s) == VOUT(S)jvS(s) shown Solve the equations in (1+ The coefficients for of (8) are given by 9mBVX 9mlVS + "*" + vlsGl (V OUT - V X ) ..,....::!.X..­ t. c - Rc +(l/sCc) 119m B ic + 9m2 Vl + RV OUT + VOUTSGOUT B. Transfer Function in G(s) = be the current flowing through the compensation network from node the 3) One Real Pole & Two Complex Poles: The generic transfer function with one real pole one complex pole pair with a quality factor Q and a real zero is In order to obtain the transfer function of the amplifier shown in wPl __ OmItting bulk capacitances for simplicity A. Applying Kirchhoff's current la w (KCL) WP3), 1 _1_ ::::} WPI� -b 1 1_ ::::} b2 � WP2 � �b 2 WPlwP2 1 ::::} WP3 � b3 � � �� b3 WPlWP2WP3 ro4119m6ro6{rosllro2) Gad4 + Gad6 + Gas9 * * s, 9m of MbM2 9m1 R1 G1 9m2 RouT GOUT 9mB WP2 Assuming widely separated poles «: «: 2 3 coefficients of s and s can be approximated as SMALL-SIGNAL PARAMETERS OF TWO-STAGE AMPLIFIER (FIG. 2) QWP2 (8) 2 8 � ' 3 and s in the expanded denominator _1_ _1 _ b1 - WPI + QWP2 1 1 b2 - QWPIWP2 +� (9) b3 =� WPIWp 2 (WPI WP2 ), Assuming widely separated poles «: 3 cient of and s can be approximated as s, S2 the coeffi­ function of a two-stage amplifier with three left-half-plane (LHP) poles and one LHP zero has a general form given by ADC (1 + als) G(s) (1 + bls + b2 s2 + b3s3) Gain: ADc is the DC gain of the (10) (3) 1) DC amplifier, given by the product of the gains of the two stages as (4) 2) Three Real Poles: The generic transfer function with three real LHP poles is WZI WPI . WP2 , WP3 and single LHP zero C. Calculating Pole Locations The two-stage amplifier in Fig. the output capacitor 1) Three Real Poles: Assuming real and widely separated poles, the equation for the dominant pole is given by WPI 2 3 The coefficients for s and s in the expanded denominator of the transfer function in (5) are compared with those of the transfer function in (3) as shown below: s, WPI= __ 1 = - 1( / RouTCe+ReCe+ROUTCOUT b1 +Ce/ gmb +R1 C1 +RICegm2RoUT) (6) __ Applying gm1 Rl , gm2ROUT » 1 ::: ROUT ( " 1+S (aa[ RO : .�J) ) � �� �[ - - - - - -------+-8 ------- - - - - - -- - - - - - - - - - � ' - - - - -+- c- - g- � � 1 ROUTCC + R CC c C �k + ROUTC OUT + RIC l + RlCC g m 2Ro uTl+ bl 82 R 9�kCCI + [ C CC ROUTC OUT + RIC IROUTCC + RIC IR C CC + ROUTC OUT9�k CC + RIC IROUTC OUT + RIC 1 b2 3 + RIC IROUTC OUT g �kCCl . [RI C IROUTC OUTR C CC b3 (12) (12), that is, neglecting smaller terms, WPI� - 1/RICegm2RouT . "-.R' (11) In order to simplify this expression, we make the following assumptions concerning small-signal parameters R1 , RouT » Re and __1_ +_1_ +_1_ b1 wp2 WPI WP3 1_ 1_ + 1_ + b2 = w w p wp w p3 wp3wPI Pl 2 2 1 b3 - wPlwp2wp3 G(s) = - 2 has three real poles if is very large; otherwise, it has a complex pole pair. (5) __ GOUT (13) (1) (7), the equation of first non-dominant WPI Substituting the in pole is given by WP2 WP2 = WP b;1 = Equation ADC 9m 1 R 1 9m2 ROUT 1 R, Ceo a ? RnlTT ROUTCOUTCC +ROUTCOUT9mBRc Cc + WP 1 R 1 C1 9mBRoUTCC +R 1 C 1 9mBRc Cc + R 1 C 1 9mBRoUTCOUT). WP2 WP2 ::::;- (12), WP2 ( cg�?) (119m2 )C 1 1+ WP2 in in (13) (15). As the value of compensation capacitor Cc increases, the dominant pole WP2 moves to higher frequencies. Substituting and in (7), the high frequency pole is given by WPI WP3 WP3 = WP2 Cc +COUT - -:::---::--=--,=-....::....::....:..,----,CCCOUT(Rc +119mB) WP2 and WP3 were very close to each other, violating the assumption that the real poles are widely separated. Hence, we anticipate the existence of a complex pole pair. 2) One Real Pole and One Complex Pole Pair: For moderately-sized CouT,the two non-dominant poles converge and form a single complex pole pair. The dominant pole WPI Q 9mB9m2 C 1 COUT ::::; Cc ( Cc +COUT) 0.78 24MHz 1 / 9",B) 9mI/CC ( Rc+ 14MHz gml = Cc (19) . The phase margin for a system with three real poles and single zero is computed using the equation given by ( tan- 1 PM::::;900-tan- 1 ( a2 ) -tan- 1 ( a3 ) + WCBW/WP2 i:¥3 WGBW WZ 1 ) , (20) WCBW/WP3' where == and == If there exist a complex pole pair, the phase margin becomes PM::::;90° -tan- 1 ( ) a2 tan- 1 + Q(1- a� ) ( WGBW WZ 1 ) (21) . 4 shows the AC analysis simulated result of two-stage 1. The hand-calculated gain and pole­ Fig_ amplifier shown in Fig. zero locations of Table II are very close to the simulated values. " F=======:::::-r--"""""---"-"""'----=1 WP2 ::::; V 1 WCBW::::; ADC WPI is unchanged and is given by (13). Applying the assumptions from (12), the non-dominant complex pole and quality factor Q are given by WP2 - Cc ) The gain-bandwidth product is given by i:¥2 signal parameters of Table I, we found that the calculated val­ (C C+C 28MHz 9rn 2CQlJT 9m BCl Bandwith and Phase Margin (16) In a design example, when we input realistic values for small­ V CCOUT . WGBW WPI moves to lower frequencies, whereas the non-dominant pole •• WZ 1 E. WPI 50dB 40kHz 9mB9", 2 CICOUT Q (15) . Observe the equations of the dominant pole and first non-dominant pole (14) is approximated as 1 ValuelFrequency Parameter -(9m2RoUT9mBR 1 Cc)/(R 1 C 1 CC + Applying the assumptions in ues for TABLE II POLE/ZERO EQUATIONS OF FIG I AND THEIR ApPROXIMATE VALUES " (17) Gain=.51.OdB GBP=II.6r..·IHz PM=.59 . .52° -2S , , , . " 9m2 COUT 9mB C 1 D. One Real Zero The equation of the LHP zero is given by WZ 1 = 1 . Cc(Rc +119mB) - (18) -180 Table II summarizes the derived equations of the poles and 10 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - ., ' ' 10 J 10 10 � Frtqlltu('�'(Hl) ' 10 10 ' ' 10 - ' 10 zeros. The third column in the table represents the hand­ calculated values. Fig. 3 illustrates the pole/zero locations before and after compensation. Two-stage op-amp Uncompensated Fig. 4. Simulated loop gain and phase response of the two-stage amplifier with the theoretical pole and zero locations indicated. IV. POLE-ZERO ANALYSIS OF THREE-STAGE AMPLIFIER 5 [12]. The first stage is a The three-stage pseudo class-AB amplifier shown in Fig. �)2 &�)2 Two-Stage Cascode Compensation COZ] Complex pole-pair Fig. 3. Diagram illustrating pole/zero locations (not to scale). is the NMOS version of the circuit in differential amplifier and the next two stages are common­ source amplifiers. The PMOS transistor MlO, which is an inverting common-source amplifier, creates a feed-forward path gmF from the intermediate node to the output node. The last stage of the amplifier is a non-inverting common-source amplifier. It comprises an NMOS current mirror formed by Mg and M11 of dimensions in I:K ratio, as shown in Fig. 5. by proper placement of the two LHP zeros created by RNMC. The fourth pole is at very high frequency. As a result, the overall amplifier response can be designed to behave as a two­ pole system with widely-separated poles. As a design example, the simulated frequency response of the three-stage amplifier is shown in Fig. 7. 100 == 2- 50 t3 0 = Fig. 5. ....... . . . . . . . . . . . . . . . • .1 I -50 ' 10 RNMC with nulling resistor is adopted to stabilize the 10 ' 10i I amplifier for a wide range of capacitive loads. The small-signal � .....,... 8 ICI Fig. 6. � £ vOUT C, Small-signal model of three-stage amplifier shown in Fig. 5. Using notations similar to the previous example, iC I and iC2 are the currents flowing through the compensation network from node VOUT to node VI and from node V2 to node VI, respectively. Apply KCL at every node in Fig. 6, to obtain the set of equations: iC I + iC2 gmlvS + * + VI SCI iC I + iC2 V ��V ! iC I v�gc��x . tC 2 � I/SCC2 o iC2 + gm2VI + � + V2SC2 V gm3V2 iCI + gmFVI + :!!£l + VOUTSCOUT R llI... OUT = = = (22) = = = Solving these equations as illustrated in previous example, so as to eliminate Vb V2 , iC I and iC2 the DC gain, poles and zeros are derived as shown in Table III TABLE III POLE/ZERO EQUATIONS OF THREE-STAGE AMPLIFIER WITH RNMCR Value Parameter Equation ADC 9ml RI(9m2R2 9m3ROUT + 9mFROUT) WPI W P2 W P3 ZI W Z2 W WGBW - 1 RlCCI9=2R29=3ROUT 2TTti,lcCJ CC2(CCl+COUT) - 9=3 CCI+COUT CCICCOUT 1 RC(CCl+CC2) - 9=29=3 CCI+CC2 (9=2+9=3 CCI CC2 9mI/CC The amplifier has four poles. CC I .. . I . 10 ' I � R, I . . ... . ....... ....... ' 10 FrE'qut'u(y (Hz) 10 ' 91dB 122Hz 2.1MHz 32MHz 3.3MHz 29MHz 4.7MHz creates the dominant pole. The effect of the next two non-dominant poles can be nullified 10 ' 10 I I ' I I 6 CCI v, I I Schematic of three-stage amplifier based on [12). model of this three-stage amplifier is shown in Fig. I I -45 -90 -135 8 [PI -1 0 ' 10 10 ' 10 ' 10 ' ' 10 Frt"qu('ufY (Hz) 10 ' Fig. 7. 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