SC1894A

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 SC1894A
RELIABILITY REPORT
FOR
SC1894A FAMILY
August 12, 2014
MAXIM INTEGRATED
160 RIO ROBLES
SAN JOSE, CA 95134
Approved by
Eric Wright
Quality Assurance
Reliability Engineering
Maxim Integrated. All rights reserved.
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SC1894A
Conclusion
The SC1894A successfully meets the quality and reliability standards required of all Maxim Integrated products. In addition, Maxim
Integrated's continuous reliability monitoring program ensures that all outgoing product will continue to meet Maxim Integrated's quality and
reliability standards.
Table of Contents
I. ........Device Description
IV. .......Die Information
II. ........Manufacturing Information
V. ........Quality Assurance Information
III. .......Packaging Information
VI. .......Reliability Evaluation
.....Attachments
I. Device Description
A. General
rd
The SC1894 is Scintera’s 3 generation of RF PA linearizers (RFPAL) providing improved correction and functionality over the previous generations. The
SC1894 is a fully adaptive,RFin/RFout predistortion linearization solution optimized for a wide range of amplifiers, power levels, and communication
protocols. The SC1894 uses the PA output and input signals to adaptively generate an optimized correction function in order to minimize the PA’s selfgenerated distortion and impairments. Using RF-domain analog signal processing enables the SC1894 to operate over wide-signal bandwidths and
consume very low power. The SC1894 goes beyond linearization and provides accurate RF power measurement of RFIN and RFFB. Advanced features
including spectral monitoring and ACLR alarm are also available. These optional features are accessed through the SC1894’s serial peripheral interface
(SPI) bus. The SC1894 is available in 9x9mm, 64 pin QFN package.
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SC1894A
II. Manufacturing Information
A. Description/Function:
RF PA Linearizer
B. Process:
TSMC 0.18um CMOS
C. Number of Device Transistors:
5.65M
D. Fabrication Location
TSMC, Taiwan
E. Assembly Location:
ASE, CL, Taiwan
F. Date of Initial Production:
October 2012
III. Packaging Information
A. Package Type:
64 QFN 9x9mm
B. Lead Frame:
1102379111, Samsung, C194
C. Lead Finish:
Matte Tin
D. Die Attach:
Die 1 :EPEN4900B001E,Hitachi, EN4900G
Die 2: EPQMI536A001B, Henkel QMI-536
E. Bondwire:
AU082000A001, TANAKA, 2N 0.8MIL Au
F. Mold Material:
1800787111, Hitachi, CEL9240
G. Assembly Diagram:
67ISE00050-C
H. Classification of Moisture Sensitivity
per JEDEC standard J-STD-020-C
Level 3
I.
N/A°C/W
5100023121,NIPPON,CU_3N 0.8 MIL
Single Layer Theta Ja:
J. Single Layer Theta Jc:
N/A°C/W
K. Multi Layer Theta Ja:
22.17°C/W
L. Multi Layer Theta Jc:
6.37°C/W
IV. Die Information
A. Dimensions:
D1 (Maxim/Scintera): 221 X 2471 mils, D2 (Microchip EEPROM): 93X67 mils
B. Passivation:
Si3N4
C. Interconnect:
Al
D. Backside Metallization:
None
E. Minimum Metal Width:
M1: 0.23um, M2-M5: 0.28um, M6: 0.44um
F. Minimum Metal Spacing:
M1: 0.23um, M2-M5: 0.28um, M6: 0.46um
G. Bondpad Dimensions:
70um
H. Isolation Dielectric:
SiO2
I. Die Separation Method:
Wafer Saw
V. Quality Assurance Information
A. Quality Assurance Contacts:
Don Lipps (Manager, Reliability Engineering)
Bryan Preeshl (Vice President, QA)
B. Outgoing Inspection Level:
0.1% for all electrical parameters guaranteed by the Datasheet
0.1% for all Visual Defects
C. Observed Outgoing Defect Rate:
< 50 ppm
D. Sampling Plan:
Mil-Std-105D
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SC1894A
VI. Reliability Evaluation
A. Accelerated Life Test
The results of the 125°C biased (static) life test are shown in Table 1. Using these results, the Failure Rate, λ is calculated as follows:
λ =
MTTF
=
1
1.83
(Chi square value for MTTF upper limit)
1000 x 925 x 231 x 2
(where 925 = Temperature Acceleration factor assuming an activation energy of 0.7eV)
-9
= 4.28 x 10
= 4.28 F.I.T. (60% confidence level @ 25°C)
B. E.S.D. and Latch-Up Testing (Lot # A4222612401)
The SC1894A die type has been found to have all pins able to withstand a transient pulse of:
ESD-HBM: +/-1000V per JS-001-2012
ESD-CDM: +/- 250V per JEDEC JESD22-C101
Latch-Up testing has shown that this device withstands a current of +/-100mA, 85C and Power supply stress 1.5* VDDmax per
JEDEC JESD78D.
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SC1894A
Table 1
Reliability Evaluation Test Results
SC1894A
TEST ITEM
TEST CONDITION
FAILURE
IDENTIFICATION
SAMPLE SIZE
NUMBER OF
FAILURES
COMMENTS
High Temperature Operating Life
(HTOL)
Ta = 125°C
VCC Max
Time = 1000hrs.
High Temperature Storage Life
DC Parameters
77x3
0
25 x3
0
25 x3
0
25 x3
0
11x2
0
& functionality
(HTS)
Ta = 150°C
Time = 1000 hrs.
DC Parameters
& functionality
Temperature Cycling
(TC)
-65C to 150C
Time = 500c/s
DC Parameters
& functionality
Temperature Humidity and Bias
(THB)
-85C & 85%RH
Time = 1000hrs
Moisture Soak Level 3
DC Parameters
& functionality
(MSL)
DC Parameters
& functionality
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