電子情報通信学会 アナログRF研究会
第34回 アナログRF研究会
IEEE Solid-State Circuits Society Japan Chapter
Thirty Fourth Analog and RF Seminar
ミキサー回路のシミュレーション検証手法
の考察
菅谷英彦、アーサー シャルデンブランド、佐藤伸久
Cadence Design Systems, Japan
11/19/2013
Agenda
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Review of Mixers and Figures of Merit
Simulation Technologies
Mixer Simulation, the Basics
Mixer Simulation, Advanced Analysis
Summary
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Review of Mixers
Overview and Figures of Merit
Overview of Mixer
• Why do we need Mixers?
− Mixers move a signal from one
frequency to another frequency
− From baseband to RF or from RF to
baseband
What do we need to know
• Performance
− Conversion Gain
• Noise
− Noise Figure
• Linearity
• What does a Mixers do?
− The output of a Mixer is a product of
it’s inputs
−
• How do we use Mixers?
− Frequency Translation
− Phase Detection
− Phase Shifting
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− Intercept Point
− Compression Point
• Non-Ideal Effects
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Output LO Feedthrough
Input LO Feedthrough
RF Feedthrough
Image Rejection
Tools for Mixer Analysis
Simulation Technologies
Analyses
4
Time
Invariant
Periodic
Time
Large Signal
DC
PSS
Small Signal
AC
PAC
XF
Sampled
Periodic
Time
QuasiPeriodic
Time
Measurement,
Outputs
QPSS
Large-Signal Op Point
PAC
QPAC
Small-Signal Response
gain, rejection, …
PXF
PXF
QPXF
Small-Signal
Transfer Function
NOISE
PNOISE
PNOISE
QPNOISE
Small-Signal Noise
SP
PSP
QPSP
Small-Signal, S-Parameter
STB
PSTB
Small-Signal Stability
Loop Gain, gm, Φm
Rapid IPn
Rapid IPn
Distortion Analysis, IIP3,
IIP2
Transient
(Large Signal)
TRAN
Large Signal, Transient
Response and Noise
Envelope
Following
ENVLP
Modulated-Carrier
Transient Response
© 2013 Cadence Design Systems, Inc. All rights reserved.
So … Which Engine Should I Use?
Harmonic Balance and Shooting Newton are Complementary
Shooting Newton
Harmonic Balance
Analysis of strongly nonlinear circuits
Fast simulation of RF transceivers
• Shooting Newton works well for
− Circuits with strongly nonlinear
transient waveforms
− Ring oscillators
− Frequency dividers
− Input signals have sharp time
domain waveform transitions
− Switched Cap Filters
− DC-to-DC Converters
− Single Tone Circuit
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• Harmonic Balance works well for
− High dynamic range, weaklynonlinear systems
− RF front-ends (LNA, Mixer)
− IQ modulators
− LC and crystal oscillators
− Circuits with distributed components
− Transmission lines, S-parameter
models
− Multiple Tone Circuits
PSS (Periodic Steady-State)
Harmonic Balance Algorithm
IR
Initial estimate:
Spectral Voltage
IL
Calculate currents
ITotal
Converter time  freq
IC
IL
Calculate currents
© 2013 Cadence Design Systems, Inc. All rights reserved.
ID
Converter time  freq
Vfinal
6
ID
Iterate until Ierror < error bound
IR
Final -1 iteration:
Spectral Voltage
IC
Final Iteration:
Spectral Voltage
ITotal
Ierror
Iterate if the current
error is greater than
the error bound
Ierror
Ierror less than
the error bound
Periodic Small Signal Analysis
Signal from input baseband to output baseband
Signal from input (baseband+one sideband) to output baseband
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Periodic Small Signal Analysis
Rapid IP3
Input
Output
2*f1-f2
f1
f2
f1
Simulation Methods
• Sweep PSS
IPn
measurement • Sweep PSS  PAC
• PSS  PAC Rapid IP3
• DC  AC Rapid IP3
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2*f2-f1
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f2
Periodic Small Signal Analysis
Rapid IP3
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IP3 Measurement
Swept PSS  PAC  IPn Plot
(1). Swept PSS
(2). PAC
(3). IPn plot
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© 2013 Cadence Design Systems, Inc. All rights reserved.
Rapid IP3 Measurement
PSS (DC)  PAC (AC) Rapid IP3 IPn Plot
(1). PSS
(3). Rapid IP3
plot
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© 2013 Cadence Design Systems, Inc. All rights reserved.
(2). PAC +
Rapid IP3
Option
Mixer Testbench
Mixer Simulation, the Basic
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Mixer Characterization
Noise analysis
Swept HB analysis
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Rapid IP3 analysis
Mixer Verification
Reducing Verification Misses
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Variation Aware Mixer Verification
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Mixer Verification
Integrating Mixers into Up/Down Converters
VCO
RF
Divider
÷2
IQ Mod
BB
)
)
Down Converter Testbench
with VCO and Divider
RF
IQ Mod
BB
Down Converter Testbench
with noise model
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Mixer Verification
Integrating Mixers into Up/Down Converters
• In addition to characterizing mixer performance for ideal
inputs, sine waves, we need to test performance with
modulated inputs
– Modulated signals have different average to peak values and often
stress a device more than ideal inputs
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Challenges
From RFIC to Wireless IC
Technologies
For RF / Wireless IC
“In-Design” methodology • Examples: testbench with estimated parasitics,
Create Worst Case Statistical Corner
• Parasitic Aware Design, EAD, supports analog
design
RF “Sign-Off”
• EMIR analysis only supports transient analysis
• Aging Reliability
Metric Driven Verification • Wireless SoC design requires new methodology to
deal with the complexity of the verification task
Product Design
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• As the level of integration increases, IC, package,
and board are becoming more integrated
© 2013 Cadence Design Systems, Inc. All rights reserved.
Summary
• Mixer Block Design
– Periodic Steady State Analysis
– Rapid IPn
– Variation Aware Simulation
• RFIC
– Integrating Mixers into Converters
• Wireless SoC Design
– Metric Driven Verification
– Sign-Off : EM/IR
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© 2013 Cadence Design Systems, Inc. All rights reserved.
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© 2013 Cadence Design Systems, Inc. All rights reserved.