idt74alvch16245 3.3v cmos 16-bit bus transceiver with 3

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IDT74ALVCH16245
3.3V CMOS 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS
EXTENDED COMMERCIAL TEMPERATURE RANGE
3.3V CMOS 16-BIT BUS
TRANSCEIVER WITH
3-STATE OUTPUTS
AND BUS-HOLD
IDT74ALVCH16245
DESCRIPTION:
FEATURES:
–
–
–
0.5 MICRON CMOS Technology
Typical tSK(0) (Output Skew) < 250ps
ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
– 0.635mm pitch SSOP, 0.50mm pitch TSSOP,
and 0.40mm pitch TVSOP packages
– Extended commercial range of – 40°C to + 85°C
– VCC = 3.3V ± 0.3V, Normal Range
– VCC = 2.7V to 3.6V, Extended Range
– VCC = 2.5V ± 0.2V
– CMOS power levels (0.4µ W typ. static)
– Rail-to-Rail output swing for increased noise margin
Drive Features for ALVCH16245:
– High Output Drivers: ±24mA
– Suitable for heavy loads
This 16-bit bus transceiver is built using advanced dual metal CMOS
technology. The ALVCH16245 is designed for asynchronous communication between data buses. The control-function implementation
minimizes external timing requirements.
This device can be used as two 8-bit transceivers or one 16-bit
transceiver. It allows data transmission from the A bus to the B bus or
from the B bus to the A bus, depending on the logic level at the directioncontrol (DIR) input. The output-enable (OE) input can be used to disable
the device so that the buses are effectively isolated.
The ALVCH16245 has been designed with a ±24mA output driver.
This driver is capable of driving a moderate to heavy load while
maintaining speed performance.
The ALVCH16245 has “bus-hold” which retains the inputs’ last state
whenever the input bus goes to a high impedance. This prevents floating
inputs and eliminates the need for pull-up/down resistors.
APPLICATIONS:
• 3.3V High Speed Systems
• 3.3V and lower voltage computing systems
Functional Block Diagram
1DIR
1
2DIR
48
1A1
1A2
2A1
2A2
2A3
5
1A4
1A5
1A6
2A6
2A7
11
1A8
2B5
20
2B6
22
2A8
12
19
27
1B7
37
2B4
29
1B6
38
2B3
30
1B5
40
9
1A7
17
2A5
8
2B2
32
1B4
41
14
16
2A4
6
2B1
33
1B3
43
13
35
1B2
44
2OE
36
1B1
46
3
1A3
25
1OE
47
2
24
2B7
26
23
1B8
EXTENDED COMMERCIAL TEMPERATURE RANGE
2B8
MARCH 1999
1
c
1999 Integrated Device Technology, Inc.
DSC-4697/-
IDT74ALVCH16245
3.3V CMOS 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS
PIN CONFIGURATION
EXTENDED COMMERCIAL TEMPERATURE RANGE
ABSOLUTE MAXIMUM RATING
Symbol
VTERM(2)
1 DIR
1
48
1 OE
1B 1
2
47
1A 1
1B 2
3
46
GND
4
45
1B 3
1B 4
5
6
GND
Unit
V
– 0.5 to
VCC + 0.5
– 65 to + 150
V
°C
IOUT
DC Output Current
– 50 to + 50
mA
IIK
± 50
mA
– 50
mA
±100
mA
44
1A3
43
1A 4
IOK
Continuous Clamp Current,
VI < 0 or VI > VCC
Continuous Clamp Current, VO < 0
ICC
ISS
Continuous Current through
each VCC or GND
V CC
7
42
V CC
1B 5
8
41
1A 5
1B 6
9
40
1A 6
GND
10
39
GND
1B 7
11
38
1A 7
1B 8
12 SO48-1 37
SO48-2
13
SO48-3 36
1A 8
2B 2
14
35
2A 2
GND
15
34
GND
2B 3
16
33
2A 3
2B 4
17
32
2A 4
V CC
18
31
V CC
2B 5
19
30
2A 5
2B 6
20
29
2A 6
GND
21
28
GND
2B 7
22
27
2A 7
2B 8
23
26
2A 8
2 DIR
24
25
2 OE
2B1
Max.
– 0.5 to + 4.6
TSTG
Description
Terminal Voltage
with Respect to GND
Terminal Voltage
with Respect to GND
Storage Temperature
VTERM(3)
1A2
(1)
NEW16link
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or
any other conditions above those indicated in the operational sections
of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability.
2. VCC terminals.
3. All terminals except VCC.
2A 1
CAPACITANCE (TA = +25oC, f = 1.0MHz)
Symbol
CIN
Parameter(1)
Input Capacitance
Conditions
VIN = 0V
Typ.
5
Max.
7
Unit
pF
COUT
Output
Capacitance
I/O Port
Capacitance
VOUT = 0V
7
9
pF
VIN = 0V
7
9
pF
CI/O
NOTE:
1. As applicable to the device type.
FUNCTION TABLE (each 8-bit section)(1)
Inputs
SSOP/
TSSOP/TVSOP
TOP VIEW
Description
Output Enable Inputs (Active LOW)
xDIR
Direction Control Inputs
xAx
Side A Inputs or 3-State Outputs
xBx
Side B Inputs or 3-State Outputs
xDIR
L
L
H
Bus A Data to Bus B
H
X
High Z State
NOTE:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
Z = High-Impedance
PIN DESCRIPTION
Pin Names
xOE
xOE
L
(1)
(1)
NOTE:
1. These pins have “Bus-Hold.” All other pins are standard inputs,
outputs, or I/Os.
2
Outputs
Bus B Data to Bus A
NEW16link
IDT74ALVCH16245
3.3V CMOS 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS
EXTENDED COMMERCIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Operating Condition: TA = – 40°C to +85°C
Symbol
VIH
VIL
Parameter
Input HIGH Voltage Level
Input LOW Voltage Level
VCC = 2.3V to 2.7V
Min.
1.7
Typ.(1)
—
Max.
—
VCC = 2.7V to 3.6V
2
—
—
VCC = 2.3V to 2.7V
—
—
0.7
VCC = 2.7V to 3.6V
—
—
0.8
Test Conditions
Unit
V
V
IIH
Input HIGH Current
VCC = 3.6V
VI = VCC
—
—
±5
IIL
Input LOW Current
VCC = 3.6V
VI = GND
—
—
±5
IOZH
High Impedance Output Current
VCC = 3.6V
VO = VCC
—
—
± 10
µA
IOZL
(3-State Output pins)
—
—
± 10
µA
VIK
Clamp Diode Voltage
VCC = 2.3V, IIN = – 18mA
—
– 0.7
– 1.2
V
VH
Input Hysteresis
VCC = 3.3V
—
100
—
mV
VCC = 3.6V
VIN = GND or VCC
—
0.1
40
µA
Quiescent Power Supply Current
Quiescent Power Supply
Current Variation
One input at VCC − 0.6V,
other inputs at VCC or GND
—
—
750
µA
ICCL
ICCH
ICCZ
∆ICC
VO = GND
µA
NEW16link
NOTE:
1. Typical values are at VCC = 3.3V, +25°C ambient.
BUS-HOLD CHARACTERISTICS
Symbol
IBHH
Parameter(1)
Bus-Hold Input Sustain Current
VCC = 3.0V
Bus-Hold Input Sustain Current
Bus-Hold Input Overdrive Current
75
—
—
VI = 0.8V
VCC = 2.3V
IBHL
IBHHO
Max.
—
Min.
– 75
IBHL
IBHH
Typ.(2)
—
Test Conditions
VI = 2.0V
VCC = 3.6V
VI = 1.7V
– 45
—
—
VI = 0.7V
45
—
—
VI = 0 to 3.6V
—
—
± 500
Unit
µA
µA
µA
IBHLO
NEW16link
NOTES:
1. Pins with Bus-hold are identified in the pin description.
2. Typical values are at VCC = 3.3V, +25°C ambient.
3
IDT74ALVCH16245
3.3V CMOS 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS
EXTENDED COMMERCIAL TEMPERATURE RANGE
OUTPUT DRIVE CHARACTERISTICS
Symbol
VOH
VOL
Parameter
Output HIGH Voltage
VCC
Output LOW Voltage
Test Conditions(1)
= 2.3V to 3.6V
IOH = – 0.1mA
VCC = 2.3V
IOH = – 6mA
VCC = 2.3V
IOH = – 12mA
Min.
VCC – 0.2
Max.
—
2
—
1.7
—
VCC = 2.7V
2.2
—
VCC = 3.0V
2.4
—
VCC = 3.0V
IOH = – 24mA
2
—
VCC = 2.3V to 3.6V
IOL = 0.1mA
—
0.2
VCC = 2.3V
IOL = 6mA
—
0.4
IOL = 12mA
—
0.7
VCC = 2.7V
IOL = 12mA
—
0.4
VCC = 3.0V
IOL = 24mA
—
0.55
Unit
V
V
NEW16link
NOTE:
1. VIH and VIL must be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table for the
appropriate VCC range. TA = – 40°C to + 85°C.
OPERATING CHARACTERISTICS, TA = 25oC
Symbol
CPD
CPD
Parameter
Power Dissipation Capacitance
Outputs enabled
Power Dissipation Capacitance
Outputs disabled
Test Conditions
CL = 0pF, f = 10Mhz
SWITCHING CHARACTERISTICS
Symbol
Parameter
Propagation Delay
xAx to xBx or xBx to xAx
Output Enable Time
xOE to xAx or xBx
Output Disable Time
xOE to xAx or xBx
Output Skew(2)
VCC = 3.3V ± 0.3V
Typical
22
Typical
29
4
5
Unit
pF
pF
(1)
VCC = 2.5V ± 0.2V
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
tSK(o)
VCC = 2.5V ± 0.2V
VCC = 2.7V
VCC = 3.3V ± 0.3V
Min.
Max.
Min.
Max.
Min.
Max.
Unit
1
3.7
—
3.6
1
3
ns
1
5.7
—
5.4
1
4.4
1
5.2
—
4.6
1
4.1
—
—
—
—
—
500
NOTES:
1. See test circuits and waveforms. TA = – 40°C to + 85°C.
2. Skew between any two outputs of the same package and switching in the same direction.
4
ns
ns
ps
IDT74ALVCH16245
3.3V CMOS 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS
EXTENDED COMMERCIAL TEMPERATURE RANGE
TEST CIRCUITS AND WAVEFORMS:
TEST CONDITIONS
PROPAGATION DELAY
Symbol
VLOAD
VCC(1)= 3.3V±0.3V
VCC(1)= 2.7V
VCC(2)= 2.5V±0.2V
6
6
2 x Vcc
VIH
2.7
2.7
Vcc
V
SAM E PHAS E
INPUT TRANSITION
VT
1.5
1.5
Vcc / 2
V
OUTPUT
VLZ
300
300
150
mV
VHZ
300
300
150
mV
CL
50
50
Unit
V
30
tPLH
tPH L
tPLH
tPH L
V IH
VT
0V
V OH
VT
V OL
V IH
VT
0V
OPPOSITE PHASE
INPUT TRANSITION
pF
NEW16link
ALV C Link
TEST CIRCUITS FOR ALL OUTPUTS
ENABLE AND DISABLE TIMES
V LOAD
V CC
500 Ω
(1, 2)
V IN
CONTROL
INPUT
GND
tPZL
V OU T
Pulse
Generator
D.U.T.
OUTPUT
SW ITCH
NORM ALLY
CLOSE D
LOW
tPZH
OUTPUT
SW ITCH
NORM ALLY
OPEN
HIGH
500 Ω
RT
DISABLE
ENABLE
Open
CL
ALV C Link
DEFINITIONS:
CL= Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse
Generator.
NOTES:
1. Pulse Generator for All Pulses: Rate ≤ 10MHz; tF ≤ 2.5ns; tR ≤ 2.5ns.
2. Pulse Generator for All Pulses: Rate ≤ 10MHz; tF ≤ 2ns; tR ≤ 2ns.
V LOAD /2
V LOAD /2
VT
V LZ
V OL
tPH Z
VT
V OH
V HZ
0V
0V
SET-UP, HOLD, AND RELEASE TIMES
DATA
INPUT
Switch
VLOAD
tS U
tH
tR EM
ASYNCHRONOUS
CONTROL
SYNCHRONOUS
CONTROL
Open
tS U
tH
NEW16link
INPUT
TSK
ALV C Link
(x)
V IH
VT
0V
tPH L1
tPLH1
PULSE WIDTH
V OH
OUTPUT 1
tSK (x)
V IH
VT
0V
V IH
VT
0V
V IH
VT
0V
V IH
VT
0V
TIMING
INPUT
GND
OUTPUT SKEW -
0V
ALV C Link
NOTE:
1. Diagram shown for input Control Enable-LOW and input Control
Disable-HIGH.
SWITCH POSITION
Test
Open Drain
Disable Low
Enable Low
Disable High
Enable High
All Other tests
tPLZ
V IH
VT
LOW -HIGH-LOW
PULSE
VT
V OL
tSK (x)
tW
V OH
VT
V OL
OUTPUT 2
VT
HIGH-LOW -HIGH
PULSE
VT
ALV C Link
tPLH2
tPH L2
tSK (x) = t PLH2 - tP LH1 or tPH L2 - tP HL1
ALV C Link
NOTES:
1. For tSK(o) OUTPUT1 and OUTPUT2 are any two outputs.
2. For tSK(b) OUTPUT1 and OUTPUT2 are in the same bank.
5
IDT74ALVCH16245
3.3V CMOS 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS
EXTENDED COMMERCIAL TEMPERATURE RANGE
ORDERING INFORMATION
IDT
XX
X
XX
Bus-Hold
Family
ALVC
Temp. Range
XXX
XX
Device Type Package
PV
PA
PF
Shrink Small Outline Package (SO48-1)
Thin Shrink Small Outline Package (SO48-2)
Thin Very Small Outline Package (SO48-3)
245
16-Bit Bus Transceiver with 3-State Outputs
16
Double-Density with Resistors, ±24mA
H
Bus-Hold
74
–40°C to +85°C
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6
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