CMOS ±5 V/+5 V 4 Ω Single SPDT Switches ADG619/ADG620 FEATURES FUNCTIONAL BLOCK DIAGRAM 6.5 Ω (max) on resistance 0.8 Ω (max) on-resistance flatness 2.7 V to 5.5 V single supply ±2.7 V to ±5.5 V dual supply Rail-to-rail operation 8-lead SOT-23 package, 8-lead MSOP package Typical power consumption (<0.1 μW) TTL/CMOS compatible inputs ADG619/ADG620 S2 D S1 SWITCHES SHOWN FOR A LOGIC 1 INPUT 02617-001 IN Figure 1. APPLICATIONS Automatic test equipment Power routing Communication systems Data acquisition systems Sample-and-hold systems Avionics Relay replacement Battery-powered systems GENERAL DESCRIPTION PRODUCT HIGHLIGHTS The ADG619/ADG620 are monolithic, CMOS single-pole, double-throw (SPDT) switches. Each switch conducts equally well in both directions when on. 1. Low On resistance (RON): 4 Ω typ. 2. Dual ±2.7 V to ±5.5 V or single 2.7 V to 5.5 V supply. 3. Low power dissipation. CMOS construction ensures low power dissipation. 4. Fast tON/tOFF. 5. Tiny 8-lead SOT-23 package and 8-lead MSOP package. The ADG619/ADG620 offer low on resistance of 4 Ω, which is matched to within 0.7 Ω between channels. These switches also provide low power dissipation, yet give high switching speeds. The ADG619 exhibits break-before-make switching action, thus preventing momentary shorting when switching channels. The ADG620 exhibits make-before-break action. The ADG619/ADG620 are available in an 8-lead SOT-23 package and an 8-lead MSOP package. Table 1. Truth Table for the ADG619/ADG620 IN Switch S1 Switch S2 0 1 ON OFF OFF ON Rev. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 © 2006 Analog Devices, Inc. All rights reserved. ADG619/ADG620 TABLE OF CONTENTS Features .............................................................................................. 1 Absolute Maximum Ratings ............................................................6 Applications....................................................................................... 1 ESD Caution...................................................................................6 Functional Block Diagram .............................................................. 1 Pin Configuration and Function Descriptions..............................7 General Description ......................................................................... 1 Typical Performance Characteristics ..............................................8 Product Highlights ........................................................................... 1 Terminology .................................................................................... 10 Revision History ............................................................................... 2 Test Circuits..................................................................................... 11 Specifications..................................................................................... 3 Outline Dimensions ....................................................................... 13 Dual Supply ................................................................................... 3 Ordering Guide............................................................................... 14 Single Supply ................................................................................. 5 REVISION HISTORY 1/06—Rev. A to Rev. B Changes to RON Values in Table 2 .................................................. 2 Updated Outline Dimensions ....................................................... 13 Changes to Ordering Guide .......................................................... 13 6/03—Rev. 0 to Rev. A. Edits to Specifications ...................................................................... 2 Changes to Ordering Guide ............................................................ 4 Updated Outline Dimensions ......................................................... 8 Rev. B | Page 2 of 16 ADG619/ADG620 SPECIFICATIONS DUAL SUPPLY 1 VDD = +5 V ± 10%, VSS = −5 V ± 10%, GND = 0 V. All specifications −40°C to +85°C, unless otherwise noted. Table 2. Parameter ANALOG SWITCH Analog Signal Range On Resistance (RON) On Resistance Match Between Channels (ΔRON) On Resistance Flatness (RFLAT (ON)) B Version +25°C −40°C to +85°C Unit Test Conditions/Comments VSS to VDD VDD = +4.5 V, VSS = −4.5 V VS = ±4.5 V, IS = −10 mA, Figure 15 VS = ±4.5 V, IS = −10 mA 4 6.5 8.5 V Ω typ Ω max 0.7 1.1 0.7 1.15 1.35 0.8 1.2 Ω typ Ω max Ω typ Ω max LEAKAGE CURRENTS VDD = +5.5 V, VSS = −5.5 V Source Off Leakage IS (Off ) ±0.01 Channel On Leakage ID, IS (On) ±0.25 ±0.01 ±0.25 DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or IINH CIN, Digital Input Capacitance DYNAMIC CHARACTERISTICS 2 ADG619 tON tOFF Break-Before-Make Time Delay, tBBM nA typ VS = ±4.5 V, VD = ∓ 4.5 V, Figure 16 VS = VD = ±4.5 V; Figure 17 ±1 nA max nA typ nA max 2.4 0.8 V min V max μA typ μA max pF typ VIN = VINL or VINH ±0.1 ns typ ns max ns typ ns max ns typ ns min RL = 300 Ω, CL = 35 pF VS = 3.3 V; Figure 18 RL = 300 Ω, CL = 35 pF VS = 3.3 V; Figure 18 RL = 300 Ω, CL = 35 pF VS1 = VS2 = 3.3 V; Figure 19 ns typ ns max ns typ ns max ns typ ns min pC typ dB typ dB typ MHz typ pF typ pF typ RL = 300 Ω, CL = 35 pF VS = 3.3 V; Figure 18 RL = 300 Ω, CL = 35 pF VS = 3.3 V; Figure 18 RL = 300 Ω, CL = 35 pF VS = 0 V; Figure 20 VS = 0 V, RS = 0 Ω, CL = 1 nF, Figure 21 RL = 50 Ω, CL = 5 pF, f = 1 MHz, Figure 22 RL = 50 Ω, CL = 5 pF, f = 1 MHz, Figure 23 RL = 50 Ω, CL = 5 pF; Figure 24 f = 1 MHz f = 1 MHz ±1 0.005 2 80 120 45 75 40 155 90 10 ADG620 tON Make-Before-Break Time Delay, tMBB 40 65 200 330 160 Charge Injection Off Isolation Channel-to-Channel Crosstalk Bandwidth –3 dB CS (Off ) CD, CS (On) 110 −67 −67 190 25 95 tOFF VS = ±3.3 V, IS = −10 mA 85 400 10 Rev. B | Page 3 of 16 ADG619/ADG620 Parameter POWER REQUIREMENTS IDD B Version +25°C −40°C to +85°C 0.001 1.0 ISS 0.001 1.0 1 2 Temperature range for B version is −40°C to +85°C. Guaranteed by design, not subject to production test. Rev. B | Page 4 of 16 Unit μA typ μA max μA typ μA max Test Conditions/Comments VDD = +5.5 V, VSS = −5.5 V Digital inputs = 0 V or 5.5 V Digital inputs = 0 V or 5.5 V ADG619/ADG620 SINGLE SUPPLY 1 VDD = +5 V ± 10%, VSS = 0 V, GND = 0 V. All specifications –40°C to +85°C, unless otherwise noted. Table 3. Parameter ANALOG SWITCH Analog Signal Range On Resistance (RON) On Resistance Match Between Channels (ΔRON) On Resistance Flatness (RFLAT (ON)) LEAKAGE CURRENTS Source Off Leakage IS (Off ) Channel On Leakage ID, IS (On) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or IINH CIN, Digital Input Capacitance DYNAMIC CHARACTERISTICS 2 ADG619 tON tOFF Break-Before-Make Time Delay, tBBM B Version +25°C 7 10 0.8 1.1 0.5 ±0.01 ±0.25 ±0.01 ±0.25 −40°C to +85°C Unit Test Conditions/Comments 0 V to VDD VDD = 4.5 V, VSS = 0 V VS = 0 V to 4.5 V, IS = −10 mA, Figure 15 12.5 V Ω typ Ω max Ω typ Ω max Ω typ Ω max VS = 0 V to 4.5 V, IS = −10mA 1.3 0.5 1 ±1 2.4 0.8 V min V max μA typ μA max pF typ VIN = VINL or VINH ±0.1 ns typ ns max ns typ ns max ns typ ns min RL = 300 Ω, CL = 35 pF VS = 3.3 V; Figure 18 RL = 300 Ω, CL = 35 pF VS = 3.3 V; Figure 18 RL = 300 Ω, CL = 35 pF VS1 = VS2 = 3.3 V; Figure 19 ns typ ns max ns typ ns max ns typ ns min pC typ dB typ dB typ MHz typ pF typ pF typ RL = 300 Ω, CL = 35 pF VS = 3.3 V; Figure 18 RL = 300 Ω, CL = 35 pF VS = 3.3 V; Figure 18 RL = 300 Ω, CL = 35 pF VS = 3.3 V; Figure 20 VS = 0 V, RS = 0 Ω, CL = 1 nF; Figure 21 RL = 50 Ω, CL = 5 pF, f = 1 MHz; Figure 22 RL = 50 Ω, CL = 5 pF, f = 1 MHz; Figure 23 RL = 50 Ω, CL = 5 pF; Figure 24 f = 1 MHz f = 1 MHz VDD = 5.5 V Digital inputs = 0 V or 5.5 V ±1 2 280 110 10 ADG620 tON tOFF Make-Before-Break Time Delay, tMBB 50 85 210 340 170 110 420 10 Charge Injection Off Isolation Channel-to-Channel Crosstalk Bandwidth –3 dB CS (OFF) CD, CS (ON) POWER REQUIREMENTS IDD 6 –67 –67 190 25 95 0.001 1.0 1 2 VDD = 5.5 V VS = 1 V/4.5 V; VD = 4.5 V/1 V, Figure 16 nA typ nA max nA typ nA max 0.005 120 220 50 75 70 VS = 1.5 V to 3.3 V, IS = –10 mA Temperature range for B version is –40°C to +85°C Guaranteed by design, not subject to production test. Rev. B | Page 5 of 16 μA typ μA max VS = VD = 1 V/4.5 V, Figure 17 ADG619/ADG620 ABSOLUTE MAXIMUM RATINGS TA = 25°C, unless otherwise noted. Table 4. Parameter VDD to VSS VDD to GND VSS to GND Analog Inputs1 Digital Inputs1 Peak Current, S or D Continuous Current, S or D Operating Temperature Range Industrial (B Version) Storage Temperature Range Junction Temperature MSOP Package θJA Thermal Impedance θJC Thermal Impedance SOT-23 Package θJA Thermal Impedance θJC Thermal Impedance Lead Temperature, Soldering (10 sec) IR Reflow, Peak Temperature 1 Rating 13 V −0.3 V to +6.5 V +0.3 V to −6.5 V VSS − 0.3 V to VDD + 0.3 V −0.3 V to VDD + 0.3 V or 30 mA (whichever occurs first) 100 mA (pulsed at 1 ms, 10% duty cycle max) Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Only one absolute maximum rating may be applied at any one time. 50 mA −40°C to +85°C −65°C to +150°C 150°C 206°C/W 44°C/W 229.6°C/W 91.99°C/W 300°C 220°C Overvoltages at IN, S, or D are clamped by internal diodes. Current should be limited to the maximum ratings given. ESD CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Rev. B | Page 6 of 16 ADG619/ADG620 D 1 S1 2 8 ADG619/ ADG620 7 D 1 S2 S1 2 VSS TOP VIEW 6 IN (Not to Scale) VDD 4 5 NC GND 3 GND 3 Figure 2. 8-Lead SOT-23 (RT-8) 02617-002 NC = NO CONNECT VDD 4 ADG619/ ADG620 TOP VIEW (Not to Scale) 8 S2 7 VSS 6 IN 5 NC NC = NO CONNECT 02617-003 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Figure 3. 8-Lead MSOP (RM-8) Table 5. Pin No. 1 2 3 4 5 6 7 Mnemonic D S1 GND VDD NC IN VSS 8 S2 Description Drain Terminal. May be an input or output. Source Terminal. May be an input or output. Ground (0 V) Reference. Most positive power supply pin. Not internally connected. Logic Control Input Pin. Most negative power supply pin in a dual-supply application. In single-supply applications, this pin should be tied to ground at the device. Source Terminal. May be an input or output. Rev. B | Page 7 of 16 ADG619/ADG620 TYPICAL PERFORMANCE CHARACTERISTICS 10 8 VDD, VSS = ±2.5V 7 9 8 VDD, VSS = ±3V ON RESISTANCE (Ω) ON RESISTANCE (Ω) 6 5 VDD, VSS = ±3.3V 4 VDD, VSS = ±4.5V 3 VDD, VSS = ±5V TA = +85°C 7 6 TA = +25°C 5 TA = –40°C 4 3 2 TA = 25°C –5 –4 –2 –3 –1 0 1 VD, VS (V) 2 3 4 1 0 5 TA = 25°C VSS = 0V VDD = 2.7V 16 0.3 VDD = 3.3V 8 VDD = 4.5V 6 VDD = 5V 4 0 1 3 2 4 IS (OFF) 0.1 0 ID, IS (ON) –0.1 –0.2 –0.3 –0.4 02617-005 2 0.2 02617-008 LEAKAGE CURRENTS (nA) 12 10 –0.5 5 0 10 20 VD, VS (V) 0.5 6 0.3 TA = +85°C TA = +25°C TA = –40°C 2 02617-006 1 VDD = +5V VSS = –5V –4 –3 –2 –1 0 1 VD, VS (V) 2 3 4 80 0.2 ID, IS (ON) 0.1 0 IS (OFF) –0.1 –0.2 –0.3 02617-009 LEAKAGE CURRENTS (nA) ON RESISTANCE (Ω) 5 0 –5 70 VDD = 5V VSS = 0V VD = 4.5V/1V VS = 1V/4.5V 0.4 3 30 40 50 60 TEMPERATURE (°C) Figure 8. Leakage Currents vs. Temperature (Dual Supply) Figure 5. On Resistance vs. VD (VS) (Single Supply) 4 5 VDD = +5V VSS = –5V VD = ±4.5V VS = 4.5V 0.4 VDD = 3V 14 4 3 2 Figure 7. On Resistance vs. VD (VS) for Different Temperatures (Single Supply) 0.5 18 ON RESISTANCE (Ω) 1 0 VD, VS (V) Figure 4. On Resistance vs. VD (VS) (Dual Supply) 0 VDD = 5V VSS = 0V ± 0 02617-004 1 02617-007 2 –0.4 –0.5 5 Figure 6. On Resistance vs. VD (VS) for Different Temperatures (Dual Supply) Rev. B | Page 8 of 16 0 10 20 30 40 50 60 TEMPERATURE (°C) 70 80 Figure 9. Leakage Currents vs. Temperature (Single Supply) ADG619/ADG620 –10 TA = 25°C –20 VDD = +5V VSS = –5V 150 ATTENUATION (dB) CHARGE INJECTION (pC) 200 100 VDD = 5V VSS = 0V 0 –5 –4 –3 –2 –1 0 VS (V) 1 –40 –50 –60 2 3 4 –80 0.2 5 Figure 10. Charge Injection vs. Source Voltage 10 FREQUENCY (MHz) 100 0 160 –2 VDD = 5V VSS = 0V 140 tON 100 ATTENUATION (dB) VDD = +5V VSS = –5V 120 TIME (ns) 1 Figure 13. Crosstalk vs. Frequency 180 80 60 VDD = +5V VSS = –5V TA = 25°C –70 02617-010 50 –30 02617-013 250 tOFF –4 –6 –8 –10 VDD = 5V VSS = 0V 0 –40 –20 0 20 VDD = +5V VSS = –5V 40 –12 VDD = +5V VSS = –5V TA = 25°C –14 0.2 02617-011 20 80 60 TEMPERATURE (°C) Figure 11. tON/tOFF Times vs. Temperatures –20 ATTENUATION (dB) –30 –40 –50 –60 –70 VDD = +5V VSS = –5V TA = 25°C 1 10 FREQUENCY (MHz) 02617-012 –80 –100 0.03 1 10 FREQUENCY (MHz) 100 Figure 14. On Response vs. Frequency –10 –90 02617-014 40 100 Figure 12. Off Isolation vs. Frequency Rev. B | Page 9 of 16 1000 ADG619/ADG620 TERMINOLOGY Table 6. Mnemonic IDD ISS RON ΔRON RFLAT (ON) IS (Off ) ID, IS (On) VD (VS) VINL VINH IINL (IINH) CS (Off ) CD, CS (On) tON tOFF tMBB tBBM Charge Injection Crosstalk Off Isolation Bandwidth Insertion Loss Description Positive Supply Current. Negative Supply Current. Ohmic resistance between D and S. On resistance match between any two channels, that is, RON Max − RON Min. Flatness is defined as the difference between the maximum and minimum value of on resistance as measured over the specified analog signal range. Source leakage current with the switch off. Channel leakage current with the switch on. Analog voltage on Terminals D, S. Maximum Input voltage for Logic 0. Minimum input voltage for Logic 1. Input current of the digital input. Off switch source capacitance. On switch capacitance. Delay between applying the digital control input and the output switching on. Delay between applying the digital control input and the output switching off. On time is measured between the 80% points of both switches, when switching from one address state to another. Off time or On time is measured between the 90% points of both switches, when switching from one address state to another. A measure of the glitch impulse transferred from the digital input to the analog output during switching. A measure of unwanted signal coupled through from one channel to another as a result of parasitic capacitance. A measure of unwanted signal coupling through an off switch. The frequency response of the on switch. The loss due to the on resistance of the switch. Rev. B | Page 10 of 16 ADG619/ADG620 TEST CIRCUITS IDS VS Figure 15. On Resistance D ID (OFF) A VD S NC Figure 16. Off Leakage 0.1µF VDD VSS S A Figure 17. On Leakage 0.1µF VDD VSS 50% VIN D IN VS ID (ON) D RL 300Ω GND CL 35pF 50% 90% 90% VOUT VOUT tON tOFF Figure 18. Switching Times S1 VS1 VDD VSS 0.1µF VIN VDD VSS D2 D S2 VS2 IN VIN CL2 35pF RL2 300Ω VOUT 50% 0V VOUT 50% 90% 90% 0V GND tBBM 02617-019 0.1µF tBBM Figure 19. Break-Before-Make Time Delay, tBBM (ADG619 Only) VDD VSS 0.1µF VDD VSS VS1 VIN VD IN VIN RL2 300Ω GND RL1 300Ω VS1 CL2 35pF CL1 35pF 50% 0V 50% VS1 80%V D 80%V D 02617-020 0.1µF VS2 tMBB Figure 20. Make-Before-Break Time Delay, tMBB (ADG620 Only) B VS VSS VDD VSS D S VIN VOUT CL 1nF IN GND S2 ΔVOUT VOUT S1 Figure 21. Charge Injection Rev. B | Page 11 of 16 ΔVOUT QINJ = CL × ΔVOUT 02617-021 RS VDD VD 02617-017 RON = V1/IDS S A 02617-018 02617-015 VS IS (OFF) D 02617-016 V1 S ADG619/ADG620 VDD VSS 0.1µF 0.1µF VDD NETWORK ANALYZER VSS S 50Ω 50Ω IN VS D VIN RL 50Ω OFF ISOLATION = 20 LOG 02617-022 GND VOUT VOUT VS Figure 22. Off Isolation VDD VSS 0.1µF NETWORK ANALYZER VOUT 0.1µF VSS VDD S1 R 50Ω S2 50Ω D R 50Ω IN VS CHANNEL-TO-CHANNEL CROSSTALK = 20 LOG 02617-023 GND VOUT VS Figure 23. Channel-to-Channel Crosstalk VDD VSS 0.1µF 0.1µF VDD NETWORK ANALYZER VSS S 50Ω IN VS VIN RL 50Ω GND INSERTION LOSS = 20 LOG VOUT VOUT WITH SWITCH VS WITHOUT SWITCH Figure 24. Bandwidth Rev. B | Page 12 of 16 02617-024 D ADG619/ADG620 OUTLINE DIMENSIONS 3.20 3.00 2.80 8 3.20 3.00 2.80 5.15 4.90 4.65 5 1 4 PIN 1 0.65 BSC 0.95 0.85 0.75 1.10 MAX 0.15 0.00 0.38 0.22 0.80 0.60 0.40 8° 0° 0.23 0.08 SEATING PLANE COPLANARITY 0.10 COMPLIANT TO JEDEC STANDARDS MO-187-AA Figure 25. 8-Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions shown in millimeters 2.90 BSC 8 7 6 5 1 2 3 4 1.60 BSC 2.80 BSC PIN 1 INDICATOR 0.65 BSC 1.95 BSC 1.30 1.15 0.90 1.45 MAX 0.15 MAX 0.38 0.22 0.22 0.08 SEATING PLANE 8° 4° 0° COMPLIANT TO JEDEC STANDARDS MO-178-BA Figure 26. 8-Lead Small Outline Transistor Package [SOT-23] (RT-8) Dimensions shown in millimeters Rev. B | Page 13 of 16 0.60 0.45 0.30 ADG619/ADG620 ORDERING GUIDE Model Temperature Range Package Description Package Option Branding 1 ADG619BRM ADG619BRM-REEL ADG619BRM-REEL7 ADG619BRMZ 2 ADG619BRMZ-REEL2 ADG619BRMZ-REEL72 ADG619BRT-REEL ADG619BRT-REEL7 ADG619BRT-500RL7 ADG619BRTZ-REEL2 ADG619BRTZ-REEL72 ADG619BRTZ-500RL72 ADG620BRM ADG620BRM-REEL ADG620BRM-REEL7 ADG620BRMZ2 ADG620BRT-REEL ADG620BRT-REEL7 ADG620BRTZ-REEL72 −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C 8-Lead Mini Small Outline Package (MSOP) 8-Lead Mini Small Outline Package (MSOP) 8-Lead Mini Small Outline Package (MSOP) 8-Lead Mini Small Outline Package (MSOP) 8-Lead Mini Small Outline Package (MSOP) 8-Lead Mini Small Outline Package (MSOP) 8-Lead Small Outline Transistor Package (SOT-23) 8-Lead Small Outline Transistor Package (SOT-23) 8-Lead Small Outline Transistor Package (SOT-23) 8-Lead Small Outline Transistor Package (SOT-23) 8-Lead Small Outline Transistor Package (SOT-23) 8-Lead Small Outline Transistor Package (SOT-23) 8-Lead Mini Small Outline Package (MSOP) 8-Lead Mini Small Outline Package (MSOP) 8-Lead Mini Small Outline Package (MSOP) 8-Lead Mini Small Outline Package (MSOP) 8-Lead Small Outline Transistor Package (SOT-23) 8-Lead Small Outline Transistor Package (SOT-23) 8-Lead Small Outline Transistor Package (SOT-23) RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 RT-8 RT-8 RT-8 RT-8 RT-8 RT-8 RM-8 RM-8 RM-8 RM-8 RT-8 RT-8 RT-8 SVB SVB SVB SCC SCC SCC SVB SVB SVB SCC SCC SCC SWB SWB SWB S21 SWB SWB S21 1 2 Branding on SOT-23 and MSOP packages is limited to three characters due to space constraints. Z= Pb-free part. Rev. B | Page 14 of 16 ADG619/ADG620 NOTES Rev. B | Page 15 of 16 ADG619/ADG620 NOTES ©2006 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C02617-0-1/06(B) Rev. B | Page 16 of 16