Type
OptiMOS 3 Power-Transistor
IPD060N03L G
IPF060N03L G
IPS060N03L G
IPU060N03L G
™
Product Summary
Features
• Fast switching MOSFET for SMPS
• Optimized technology for DC/DC converters
V DS
30
V
R DS(on),max
6
mΩ
ID
50
A
• Qualified according to JEDEC1) for target applications
• N-channel, logic level
• Excellent gate charge x R DS(on) product (FOM)
• Very low on-resistance R DS(on)
• Avalanche rated
• Pb-free plating
• Halogen-free according to IEC61249-2-21 *
IPD060N03L G
Type
• Avalanche rated
IPF060N03L G
IPS060N03L G
IPU060N03L G
• Pb-free plating; RoHS compliant
Package
PG-TO252-3
PG-TO252-3-23
PG-TO251-3-11
PG-TO251-3
Marking
060N03L
060N03L
060N03L
060N03L
Maximum ratings, at T j=25 °C, unless otherwise specified
Parameter
Symbol Conditions
Continuous drain current
ID
Value
Unit
V GS=10 V, T C=25 °C
50
V GS=10 V, T C=100 °C
50
V GS=4.5 V, T C=25 °C
50
V GS=4.5 V,
T C=100 °C
43
I D,pulse
T C=25 °C
350
I AS
T C=25 °C
50
Avalanche energy, single pulse
E AS
I D=20 A, R GS=25 Ω
60
mJ
Reverse diode dv /dt
dv /dt
I D=50 A, V DS=24 V,
di /dt =200 A/µs,
T j,max=175 °C
6
kV/µs
Gate source voltage
V GS
Pulsed drain current2)
Avalanche current, single pulse
1)
3)
±20
A
V
J-STD20 and JESD22
* IPD060N03L G HF available with SP000680632 only in Malacca, Malaysia
IPS060N03L G available in HF
Rev. 2.1
page 1
2010-04-07
IPD060N03L G
IPF060N03L G
IPS060N03L G
IPU060N03L G
Maximum ratings, at T j=25 °C, unless otherwise specified
Parameter
Symbol Conditions
Power dissipation
P tot
Operating and storage temperature
T j, T stg
Value
T C=25 °C
IEC climatic category; DIN IEC 68-1
Parameter
Unit
56
W
-55 ... 175
°C
55/175/56
Values
Symbol Conditions
Unit
min.
typ.
max.
-
-
2.7
minimal footprint
-
-
75
6 cm² cooling area 4)
-
-
50
30
-
-
Thermal characteristics
Thermal resistance, junction - case
R thJC
SMD version, device on PCB
R thJA
K/W
Electrical characteristics, at T j=25 °C, unless otherwise specified
Static characteristics
Drain-source breakdown voltage
V (BR)DSS V GS=0 V, I D=1 mA
Gate threshold voltage
V GS(th)
V DS=V GS, I D=250 µA
1
-
2.2
Zero gate voltage drain current
I DSS
V DS=30 V, V GS=0 V,
T j=25 °C
-
0.1
1
V DS=30 V, V GS=0 V,
T j=125 °C
-
10
100
I GSS
V GS=20 V, V DS=0 V
-
10
100
nA
R DS(on)
V GS=4.5 V, I D=30 A
-
7.2
9
mΩ
V GS=10 V, I D=30 A
-
5
6
-
1.4
-
Ω
34
67
-
S
Gate-source leakage current
Drain-source on-state resistance
5)
Gate resistance
RG
Transconductance
g fs
2)
See figure 3 for more detailed information
3)
See figure 13 for more detailed information
|V DS|>2|I D|R DS(on)max,
I D=30 A
V
µA
4)
Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain
connection. PCB is vertical in still air.
5)
Rev. 2.1
Measured from drain tab to source pin
page 2
2010-04-07
Parameter
IPD060N03L G
IPF060N03L G
IPS060N03L G
IPU060N03L G
Values
Symbol Conditions
Unit
min.
typ.
max.
-
1700
2300
-
640
850
Dynamic characteristics
Input capacitance
C iss
V GS=0 V, V DS=15 V,
f =1 MHz
Output capacitance
C oss
Reverse transfer capacitance
Crss
-
35
52
Turn-on delay time
t d(on)
-
5
-
Rise time
tr
-
3
-
Turn-off delay time
t d(off)
-
20
-
Fall time
tf
-
3
-
Gate to source charge
Q gs
-
5.6
-
Gate charge at threshold
Q g(th)
-
2.8
-
Gate to drain charge
Q gd
-
2.5
-
Switching charge
Q sw
-
5.3
-
Gate charge total
Qg
-
10.8
14.4
Gate plateau voltage
V plateau
-
3.2
-
Gate charge total
Qg
V DD=15 V, I D=30 A,
V GS=0 to 10 V
-
22
30
Gate charge total, sync. FET
Q g(sync)
V DS=0.1 V,
V GS=0 to 4.5 V
-
9.4
-
Output charge
Q oss
V DD=15 V, V GS=0 V
-
17
-
-
-
50
-
-
350
V DD=15 V, V GS=10 V,
I D=30 A, R G=1.6 Ω
pF
ns
Gate Charge Characteristics 6)
V DD=15 V, I D=30 A,
V GS=0 to 4.5 V
nC
V
nC
Reverse Diode
Diode continuous forward current
IS
Diode pulse current
I S,pulse
Diode forward voltage
V SD
V GS=0 V, I F=30 A,
T j=25 °C
-
0.88
1.1
V
Reverse recovery charge
Q rr
V R=15 V, I F=I S,
di F/dt =400 A/µs
-
-
10
nC
6)
Rev. 2.1
T C=25 °C
A
See figure 16 for gate charge parameter definition
page 3
2010-04-07
IPD060N03L G
IPF060N03L G
IPS060N03L G
IPU060N03L G
2 Drain current
P tot=f(T C)
I D=f(T C); V GS≥10 V
60
60
50
50
40
40
I D [A]
P tot [W]
1 Power dissipation
30
30
20
20
10
10
0
0
0
50
100
150
200
0
50
100
T C [°C]
150
3 Safe operating area
4 Max. transient thermal impedance
I D=f(V DS); T C=25 °C; D =0
Z thJC=f(t p)
parameter: t p
parameter: D =t p/T
103
10
limited by on-state
resistance
1 µs
10 µs
102
0.5
1
101
0.2
Z thJC [K/W]
100 µs
DC
I D [A]
200
T C [°C]
1 ms
0.1
0.05
0.02
0.1
10 ms
0.01
100
single pulse
10-1
10-1
100
101
102
0
0
0
0
0
0
1
10-6
10-5
10-4
10-3
10-2
10-1
100
t p [s]
V DS [V]
Rev. 2.1
0.01
page 4
2010-04-07
IPD060N03L G
IPF060N03L G
IPS060N03L G
IPU060N03L G
5 Typ. output characteristics
6 Typ. drain-source on resistance
I D=f(V DS); T j=25 °C
R DS(on)=f(I D); T j=25 °C
parameter: V GS
parameter: V GS
120
20
5V
4.5 V
10 V
100
3V
16
4V
3.5 V
3.2 V
R DS(on) [mΩ]
I D [A]
80
60
3.5 V
12
4V
8
4.5 V
40
10 V
3.2 V
11.5 V
4
20
5V
3V
2.8 V
0
0
0
1
2
3
0
20
40
V DS [V]
60
80
100
80
100
I D [A]
7 Typ. transfer characteristics
8 Typ. forward transconductance
I D=f(V GS); |V DS|>2|I D|R DS(on)max
g fs=f(I D); T j=25 °C
parameter: T j
100
80
80
60
60
I D [A]
g fs [S]
100
40
40
20
20
175 °C
25 °C
0
0
0
1
2
3
4
5
Rev. 2.1
0
20
40
60
I D [A]
V GS [V]
page 5
2010-04-07
IPD060N03L G
IPF060N03L G
IPS060N03L G
IPU060N03L G
9 Drain-source on-state resistance
10 Typ. gate threshold voltage
R DS(on)=f(T j); I D=30 A; V GS=10 V
V GS(th)=f(T j); V GS=V DS; I D=250 µA
12
2.5
10
2
V GS(th) [V]
R DS(on) [mΩ]
8
98 %
6
typ
1.5
1
4
0.5
2
0
0
-60
-20
20
60
100
140
180
-60
-20
20
60
100
140
180
T j [°C]
T j [°C]
11 Typ. capacitances
12 Forward characteristics of reverse diode
C =f(V DS); V GS=0 V; f =1 MHz
I F=f(V SD)
parameter: T j
104
10000
103
1000
1000
Ciss
100
Coss
175 °C, 98%
I F [A]
C [pF]
25 °C
102
175 °C
25 °C, 98%
10
100
Crss
101
1
10
0
5
10
15
20
25
30
Rev. 2.1
0.0
0.5
1.0
1.5
2.0
V SD [V]
V DS [V]
page 6
2010-04-07
IPD060N03L G
IPF060N03L G
IPS060N03L G
IPU060N03L G
13 Avalanche characteristics
14 Typ. gate charge
I AS=f(t AV); R GS=25 Ω
V GS=f(Q gate); I D=30 A pulsed
parameter: T j(start)
parameter: V DD
12
100
15 V
6V
24 V
10
100 °C
25 °C
8
V GS [V]
I AV [A]
150 °C
10
6
4
2
1
0
10-1
100
101
102
103
0
5
t AV [µs]
10
15
20
25
30
Q gate [nC]
15 Drain-source breakdown voltage
16 Gate charge waveforms
V BR(DSS)=f(T j); I D=1 mA
34
V GS
Qg
32
V BR(DSS) [V]
30
28
26
V g s(th)
24
Q g(th)
22
Q sw
Q gs
20
-60
-20
20
60
100
140
Q g ate
Q gd
180
T j [°C]
Rev. 2.1
page 7
2010-04-07
Package Outline
Rev. 2.1
IPD060N03L G
IPF060N03L G
IPS060N03L G
IPU060N03L G
PG-TO252-3
page 8
2010-04-07
Package Outline
IPD060N03L G
IPF060N03L G
IPS060N03L G
IPU060N03L G
PG-TO252-3-23
PG-TO251-3-11: Outline
PG-TO251-3-21: Outline
Rev. 2.1
page 9
2010-04-07
Package Outline
Rev. 2.1
IPD060N03L G
IPF060N03L G
IPS060N03L G
IPU060N03L G
PG-TO251-3-11
page 10
2010-04-07
Package Outline
IPD060N03L G
IPF060N03L G
IPS060N03L G
IPU060N03L G
PG-TO251-3
PG-TO251-3-11: Outline
PG-TO251-3-21: Outline
Rev. 2.1
page 11
2010-04-07
IPD060N03L G
IPF060N03L G
IPS060N03L G
IPU060N03L G
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2008 Infineon Technologies AG
All Rights Reserved.
Legal Disclaimer
The information given in this document shall in no event be regarded as a guarantee of
conditions or characteristics. With respect to any examples or hints given herein, any typical
values stated herein and/or any information regarding the application of the device,
Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind,
including without limitation, warranties of non-infringement of intellectual property rights
of any third party.
Information
For further information on technology, delivery terms and conditions and prices, please
contact the nearest Infineon Technologies Office (www.infineon.com).
Warnings
Due to technical requirements, components may contain dangerous substances. For information
on the types in question, please contact the nearest Infineon Technologies Office.
Infineon Technologies components may be used in life-support devices or systems only with
the express written approval of Infineon Technologies, if a failure of such components can
reasonably be expected to cause the failure of that life-support device or system or to affect
the safety or effectiveness of that device or system. Life support devices or systems are
intended to be implanted in the human body or to support and/or maintain and sustain
and/or protect human life. If they fail, it is reasonable to assume that the health of the user
or other persons may be endangered.
Rev. 2.1
page 12
2010-04-07