ISSN: 2319-5967
ISO 9001:2008 Certified
International Journal of Engineering Science and Innovative Technology (IJESIT)
Volume 3, Issue 3, May 2014
Analysis of Control Techniques of a New
Cascaded Fifteen-level Inverter
C. Danya Bersis1, R. Arulraj2, V. Kalaimani3, A.P. Parthiban4
Abstract— This paper presents a new generalized fifteen-level cascaded H-bridge inverter with various Multi Carrier
Pulse Width Modulation (MC PWM) control strategies. The proposed inverter topology is symmetrical topology which
has two sets of units. One is cascaded H- bridge section which has seven sub multi-level inverters which are serially
connected with another cascaded H-bridge MLI section. This topology is controlled by various pulse width modulation
control strategies like Phase Disposition (PD) PWM, Variable Frequency PD (VF PD) PWM, Alternate Phase Opposition
Disposition (APOD) PWM, Variable Frequency APOD (VF APOD) PWM; Inverted Sine (IS) PWM and Variable
Frequency IS (VF IS) PWM. MC PWM in proposed fifteen-level inverter with Total Voltage and Current Harmonic
Distortion is analyzed by using MATLAB/SIMULINK.
Index Terms—Pulse Width Modulation, Phase Disposition PWM, Variable Frequency PD PWM, Inverted Sine
PWM, Variable Frequency IS PWM, Alternate Phase Opposition Disposition PWM, Variable Frequency APOD
PWM, Total Harmonic Distortion, Amplitude Modulation Index.
I.
INTRODUCTION
Multi-level inverters are high power and high voltage power converters which has the capable of generating
high-quality output waveforms with less dv/dt and smaller common mode noise. The MLI has been designed in
different applications like medium to high-power applications such as power conditioning devices, motor drives,
renewable energy generation and distribution [1]. Conventional cascaded H-bridge MLI is important MLI
structure which does not use any flying capacitors or clamping diodes.
Aghdam et al [2] developed MCPWM (Multicarrier Pulse Width Modulation) control methods for a multilevel
inverter with different values of input voltage sources. Mariethoz and Rufer [3] have developed a new design
and control of asymmetrical multi-level inverter. Seyezhai in [4] designed a three-phase asymmetric multilevel
inverter with inverted sine PWM (ISPWM) control techniques. A generalized cascaded MLI is advanced MLI
topology.
A thirteen-level symmetrical inverter and thirty one level asymmetrical inverters are presented by using
staircase modulation control technique is mentioned in [5]. Both MLI topologies have same number of switches
but symmetrical inverter uses more number of voltage sources. V.Arun and B.Shanthi [6] have developed a new
cascaded asymmetrical fifteen-level inverter with unipolar phase disposition PWM, unipolar Carrier
Overlapping PWM, unipolar Alternative Phase Opposition Disposition PWM and unipolar Inverted Sine PWM.
This paper presents a new generalized symmetrical cascaded fifteen-level inverter with PD (Phase Disposition),
IS (Inverted Sine), APOD (Alternate Phase Opposition Disposition), VF PD (Variable Frequency Phase
Disposition), VF IS (Variable Frequency Inverted Sine) and VF APOD (Variable Frequency Alternate Phase
Opposition Disposition) PWM control strategies.
II.
CIRCUIT DIAGRAM
Circuit diagram of a fifteen-level proposed inverter is shown in fig.1. It has twenty switches and seven voltage
sources. Required fifteen-level is generated by switches S1 to S16 and required polarity (fifteen-level output
voltage with positive or negative polarity) is generated by switches S17 to S20. Switches S17 and S18 will
produce positive half cycle output voltage and the switches S19 and S20 will produce negative half cycle output
voltage.
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ISSN: 2319-5967
ISO 9001:2008 Certified
International Journal of Engineering Science and Innovative Technology (IJESIT)
Volume 3, Issue 3, May 2014
Fig. 1 Circuit diagram of a fifteen-level proposed inverter
A.
PD PWM
Fig. 2 Phase Disposition Modulation
Proposed fifteen-level inverter requires seven carrier signals (each having amplitude one) which are in phase
with each other. So it is called Phase Disposition (PD) PWM control technique.
B.
APOD
Fig. 3 Alternate Phase Opposition Disposition Modulation
Seven triangular signals presents in the proposed fifteen-level inverter is 180 degree out of phase with each
other. So it is called as APOD PWM (Alternate Phase Disposition Pulse Width Modulation) control technique.
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C.
International Journal of Engineering Science and Innovative Technology (IJESIT)
Volume 3, Issue 3, May 2014
ISPWM
Fig. 4 Inverted Sine Modulation
IS PWM (Inverted Sine Pulse Width Modulation) of proposed fifteen-level symmetrical inverter requires
90degree shifted (inverted) seven carrier (triangular) signals which are having 2kHz frequency.
D.
VF PD PWM
Fig. 5 Variable Frequency Phase Disposition Modulation
VF PD PWM (Variable Frequency Phase Disposition Pulse Width Modulation) for the proposed inverter
requires seven carrier signals. Upper two and lower two triangular signals having 2000Hz frequency and the
middle three carrier requires 4000Hz frequency which are in phase.
E.
VF APOD
Fig. 6 Variable Frequency Alternate Phase Opposition Disposition Modulation
In this, upper two and lower two carriers having 2 kHz frequency and middle three carrier requires 4kHz
frequency which are 180degree out of phase with each other.
F.
VF IS PWM
Fig. 7 Variable Frequency Inverted Sine Modulation
Variable frequency inverted sine PWM has three 4 kHz carrier signals which are present in the middle and 2kHz
upper two and lower two carriers.
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III.
SIMULATION RESULTS
Simulation of proposed fifteen-level symmetrical inverter with RL load is carried out by MATLAB/
SIMULINK. The value of resistor R is 50ohm and the value of inductor L is 180mH.
Fig. 8 Gate signals for Cascaded H-bridge section by using PD PWM control method
Gate signals for proposed fifteen-level inverter cascaded H-bridge section using PD PWM control strategy is
shown in fig.8. FFT analysis (Harmonic spectrum for output voltage with amplitude modulation index one) for
various PWM control techniques like PD, APOD, IS, VF PD, VF APOD and VF IS PWM is shown in fig.9 to
fig.20
Fig. 9 A fifteen-level output voltage by using PD PWM
Fig. 10 Corresponding Harmonic spectrum with Ma=1
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Fg.11 A fifteen-level output voltage by using APOD PWM
Fig. 12 Corresponding Harmonic spectrum with Ma=1
Fig. 13 A fifteen-level output voltage by using IS PWM
Fig. 14 Corresponding Harmonic spectrum with Ma=1
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Fig. 15 A fifteen-level output voltage by using VF PD PWM
Fig. 16 Corresponding Harmonic spectrum with Ma=1
Fg.17 A fifteen-level output voltage by using VF APOD PWM
Fig. 18 Corresponding Harmonic spectrum with Ma=1
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Fig. 19 A fifteen-level output voltage by using VF IS PWM
Fig. 20 Corresponding Harmonic spectrum with Ma=1
Table-1 Voltage THD (in %)
Various PWM
strategies
PD
APOD
IS
VF PD
VFAPOD
VF IS
Amplitude Modulation Indexes
1
8.67
7.68
8.93
8.08
7.73
7.81
0.97
8.76
8.78
9.22
8.74
8.77
8.54
0.94
8.47
8.88
9.37
8.92
8.89
9.16
0.91
8.49
8.80
9.65
8.88
8.88
9.42
0.88
8.09
8.29
9.56
8.46
8.68
9.99
Table-2 Current THD (in %)
Various PWM
strategies
PD
APOD
IS
VF PD
VFAPOD
VF IS
Amplitude Modulation Indexes
1
0.45
0.27
0.38
0.29
0.25
0.38
0.97
0.58
0.29
0.46
0.34
0.25
0.48
0.94
0.64
0.30
0.46
0.36
0.26
0.41
0.91
0.54
0.29
0.42
0.36
0.24
0.35
0.88
0.41
0.28
0.43
0.31
0.23
0.31
Table 1 and 2 shows total voltage and current distortion for thirteen-level inverter by using various PWM
control strategies.
IV.
CONCLUSION
In this paper, a fifteen-level generalized cascaded symmetrical inverter has been presented and analyzed by
using MATLAB/ SIMULINK and the results are carried out for different pulse width modulation control
strategies like PD, VF PD, APOD, VF APOD, IS and VF IS PWM with various amplitude modulation indexes.
225
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REFERENCES
[1]. J. Rodriguez, S. Bernet, P. Steimer, and I. Lizama, “A survey on neutral point clamped inverters,” IEEE Trans. Ind.
Electron., vol. 57, no. 7, pp. 2219–2230, Jul. 2010.
[2]. M.G.H.Aghdam, S.H.Fathi, B.Gharehpetian,“Analysis of multicarrier PWM methods for asymmetric multilevel
inverter,” in Proc. 3rd IEEE Conference on Industrial Electronics and Applications, ICIEA’08, pp.2057 -2062 , 2008.
[3]. S.Mariethoz, and A.C. Rufer, “Design and control of asymmetrical multi-level inverters,” in Proc. IEEE 28th Annual
Conference, IECON 02, vol.1, pp. 840-845, 2002.
[4]. R.Seyezhai, “Inverted sine pulse width modulated three-phase Cascaded multilevel inverter,” International Journal of
Advances in Engineering & Technology, vol. 2, pp.602-610, 2012
[5]. Mohammad Farhadi Kangarlu, Ebrahim Babaei, “A Generalized Cascaded Multilevel Inverter Using Series Connection
of Submultilevel Inverters”, IEEE Transactions on Power Electronics, vol. 28, no. 2, February 2013
[6]. V.Arun, B.Shanthi and S.P.Natarajan, “Unipolar PWM Control Technique having Inverted Sine Carrier for an
Asymmetric Reduced Switch Multilevel Inverter”, International Journal of Engineering Science and Innovative
Technology (IJESIT) Volume 2, Issue 3, May 2013
AUTHOR BIOGRAPHY
Danya Bersis C. was born in 1991. She has obtained her B.E. (Electronics and Communication Engineering)
degree from Anna University in the year 2012. Now she is pursuing her M.Tech. Power Electronics and Drives in
SRM University, Chennai. She published many literatures in several conferences. Her areas of interests are
Converters, Inverters, Power Quality Management, DC drives and computer networks.
R. Arulraj received B.E. Electronics and instrumentation Engineering from Anna University, Chennai in the year
2012. Now he is pursuing his M.Tech. Power Electronics and Drives in SRM University, Chennai. His area of
interests are Special Electrical Machines, Computer networks, AC drives and DC drives
V. Kalaimani received B.E. Electrical and Electronics Engineering from Jayaram college of Engineering &
Technology in the year 2011. Now he is pursuing his M.Tech. Power Electronics and Drives in SRM University,
Chennai. His areas of interests are AC Drives, DC Drives and System Theory.
A.P. Parthiban received B.E. Electrical and Electronics Engineering from DMI college of Engineering College in
the year 2010. Now he is pursuing his M.Tech. Power Electronics and Drives in SRM University, Chennai. His
areas of interests are Special Electrical Machines, System Theory and Converters.
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