LMV321-Q1 SINGLE, LMV358-Q1 DUAL, LMV324-Q1 QUAD LOW-VOLTAGE RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS SLOS415E − JUNE 2003 − REVISED APRIL 2008 D D D D D LMV324 . . . D OR PW PACKAGE (TOP VIEW) Qualified for Automotive Applications 2.7-V and 5-V Performance No Crossover Distortion Low Supply Current: LMV321 . . . 130 µA Typ LMV358 . . . 210 µA Typ LMV324 . . . 410 µA Typ Rail-to-Rail Output Swing 1OUT 1IN− 1IN+ VCC+ 2IN+ 2IN− 2OUT 1 14 2 13 3 12 4 11 5 10 6 9 7 8 4OUT 4IN− 4IN+ GND 3IN+ 3IN− 3OUT description/ordering information LMV358 . . . D OR PW PACKAGE (TOP VIEW) The LMV321, LMV358, and LMV324 are single, dual, and quad low-voltage (2.7 V to 5.5 V) operational amplifiers with rail-to-rail output swing. 1OUT 1IN− 1IN+ GND The LMV321, LMV358, and LMV324 are the most cost-effective solution for applications where low-voltage operation, space saving, and low price are required. These amplifiers were designed specifically for low-voltage (2.7 V to 5 V) operation, with performance specifications meeting or exceeding the LM358 and LM324 devices that operate from 5 V to 30 V. Additional features of the LMV3xx devices are a common-mode input voltage range that includes ground, 1-MHz unity-gain bandwidth, and 1-V/µs slew rate. 1 8 2 7 3 6 4 5 VCC+ 2OUT 2IN− 2IN+ LMV321 . . . DBV PACKAGE (TOP VIEW) 1IN+ 1 GND 2 IN− 3 5 VCC+ 4 OUT Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 2008, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • 1 LMV321-Q1 SINGLE, LMV358-Q1 DUAL, LMV324-Q1 QUAD LOW-VOLTAGE RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS SLOS415E − JUNE 2003 − REVISED APRIL 2008 ORDERING INFORMATION{ PACKAGE† TA −40°C to 85°C Single −40°C 40 C to 85°C 85 C Dual SOT23-5 (DBV) Quad Q −40°C to 125°C Single −40°C 40 C to 125 125°C C Dual LMV321IDBVRQ1 Tube of 75 LMV358IDQ1 Reel of 2500 LMV358IDRQ1 Reel of 2000 LMV358IPWRQ1 Tube of 50 LMV324IDQ1 Reel of 2500 LMV324IDRQ1 TSSOP (PW) Reel of 2000 LMV324IPWRQ1 V324IQ1 SOT23-5 (DBV) Reel of 3000 LMV321QDBVRQ1 RCCB Tube of 75 LMV358QDQ1 Reel of 2500 LMV358QDRQ1 Reel of 2000 LMV358QPWRQ1 Tube of 50 LMV324QDQ1 Reel of 2500 LMV324QDRQ1 Reel of 2000 LMV324QPWRQ1 SOIC (D) SOIC (D) SOIC (D) TSSOP (PW) −40°C to 125°C Quad Q TOP-SIDE MARKING Reel of 3000 TSSOP (PW) −40°C to 85°C ORDERABLE PART NUMBER SOIC (D) TSSOP (PW) † RC1B 358IQ1 358IQ1 LMV324IQ1 V358Q1 V358Q1 LMV324Q1 MV324Q1 For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at http://www.ti.com. ‡ Package drawings, thermal data, and symbolization are available at http://www.ti.com/packaging. symbol (each amplifier) − IN− OUT 2 + IN+ • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • LMV321-Q1 SINGLE, LMV358-Q1 DUAL, LMV324-Q1 QUAD LOW-VOLTAGE RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS SLOS415E − JUNE 2003 − REVISED APRIL 2008 LMV324 simplified schematic VCC VBIAS1 + VCC − VBIAS2 + Output − VCC VCC VBIAS3 + IN− IN+ VBIAS4− + − absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V Differential input voltage, VID (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±5.5 V Input voltage, VI (either input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to 5.5 V Duration of output short circuit (one amplifier) to ground at (or below) TA = 25°C, VCC ≤ 5.5 V (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Unlimited Package thermal impedance, θJA (see Notes 4 and 5): D (8-pin) package . . . . . . . . . . . . . . . . . . . . . . 97°C/W D (14-pin) package . . . . . . . . . . . . . . . . . . . . 86°C/W DBV (5-pin) package . . . . . . . . . . . . . . . . . . 206°C/W PW (8-pin) package . . . . . . . . . . . . . . . . . . . 149°C/W PW (14-pin) package . . . . . . . . . . . . . . . . . . 113°C/W Operating virtual junction temperature, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65 to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values (except differential voltages and VCC specified for the measurement of IOS) are with respect to the network GND. 2. Differential voltages are at IN+ with respect to IN−. 3. Short circuits from outputs to VCC can cause excessive heating and eventual destruction. 4. Maximum power dissipation is a function of TJ(max), qJA, and TA. The maximum allowable power dissipation at any allowable ambient temperature is PD = (TJ(max) − TA)/qJA. Selecting the maximum of 150°C can affect reliability. 5. The package thermal impedance is calculated in accordance with JESD 51-7. • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • 3 LMV321-Q1 SINGLE, LMV358-Q1 DUAL, LMV324-Q1 QUAD LOW-VOLTAGE RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS SLOS415E − JUNE 2003 − REVISED APRIL 2008 recommended operating conditions (see Note 6) VCC Supply voltage (single-supply operation) VIH t rn on voltage oltage level le el Amplifier turn-on VIL Amplifier turn turn-off off voltage level TA free air temperature Operating free-air MIN MAX 2.7 5.5 VCC = 2.7 V 1.7 VCC = 5 V 3.5 UNIT V V VCC = 2.7 V 0.7 VCC = 5 V 1.5 I suffix −40 85 Q suffix −40 125 V °C NOTE 6: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. electrical characteristics at TA = 25°C, VCC+ = 2.7 V (unless otherwise noted) PARAMETER VIO aV TEST CONDITIONS MIN Input offset voltage IO Average temperature coefficient of input offset voltage TYP MAX 1.7 7 UNIT mV mV/°C 5 IIB Input bias current 11 250 nA IIO Input offset current 5 50 nA CMRR Common-mode rejection ratio VCM = 0 to 1.7 V kSVR Supply-voltage rejection ratio VCC = 2.7 V to 5 V, VICR Common-mode input voltage range CMRR w 50 dB Output swing RL = 10 kΩ to 1.35 1 35 V VO = 1 V High level Low level Supply pp y current B1 Unity-gain bandwidth fm Gm Vn Equivalent input noise voltage In Equivalent input noise current 4 63 dB 50 60 dB 0 to 1.7 −0.2 to 1.9 V VCC − 100 VCC − 10 60 180 80 170 LMV358 (both amplifiers) 140 340 LMV324 (all four amplifiers) 260 680 LMV321 ICC 50 CL = 200 pF mV mA m 1 MHz Phase margin 60 deg Gain margin 10 dB f = 1 kHz 46 nV/√Hz f = 1 kHz 0.17 pA/√Hz • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • LMV321-Q1 SINGLE, LMV358-Q1 DUAL, LMV324-Q1 QUAD LOW-VOLTAGE RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS SLOS415E − JUNE 2003 − REVISED APRIL 2008 electrical characteristics at specified free-air temperature range, VCC+ = 5 V (unless otherwise noted) PARAMETER TA† TEST CONDITIONS MIN 25°C VIO aV Input offset voltage IO MAX 1.7 7 Full range Average temperature coefficient of input offset voltage 9 25°C 5 25°C 15 UNIT mV mV/°C 250 IIB Input bias current IIO Input offset current CMRR Common-mode rejection ratio VCM = 0 to 4 V 25°C 50 65 dB kSVR Supply-voltage rejection ratio VCC = 2.7 V to 5 V, VO = 1 V, VCM = 1 V 25°C 50 60 dB VICR Common mode Common-mode input voltage range CMMR w 50 dB 25°C 0 to 4 −0.2 0 2 to 4.2 42 V VCC − 40 Full range 500 25°C 25°C VCC − 300 Full range VCC − 400 Low level Full range High level RL = 10 kΩ to 2.5 25V AVD IOS Output short-circuit short circuit current Low level RL = 2 kΩ Sourcing, VO = 0 V 25°C VCC − 100 Full range VCC − 200 25°C ICC Supply current 65 15 Full range 10 V/mV 5 60 10 160 130 25°C CL = 200 pF mA 250 350 210 Full range LMV324 (all four amplifiers) 180 100 Full range LMV358 (both amplifiers) mV 280 25°C 25°C 300 VCC − 10 Full range 25°C LMV321 nA 400 25°C 25°C Sinking, VO = 5 V 120 nA 50 150 High level Output swing Large signal differential Large-signal voltage gain 5 Full range RL = 2 kΩ to 2.5 25V † TYP 440 615 410 Full range A mA 830 1160 B1 Unity-gain bandwidth 25°C 1 MHz fm Phase margin 25°C 60 deg Gm Gain margin 25°C 10 dB Vn Equivalent input noise voltage f = 1 kHz 25°C 39 nV/√Hz In Equivalent input noise current f = 1 kHz 25°C 0.21 pA/√Hz SR Slew rate 25°C 1 V/ms Full range is −40°C to 85°C for I-level part, −40°C to 125°C for Q-level part. • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • 5 LMV321-Q1 SINGLE, LMV358-Q1 DUAL, LMV324-Q1 QUAD LOW-VOLTAGE RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS SLOS415E − JUNE 2003 − REVISED APRIL 2008 TYPICAL CHARACTERISTICS 30 30 100 Phase 10 50 0 600 Ω −20 1 10 100 10 50 0 −10 1 10 Frequency − kHz 100 Figure 2 GAIN AND PHASE MARGIN vs FREQUENCY GAIN AND PHASE MARGIN vs FREQUENCY 100 70 100 60 80 60 80 60 50 40 40 16 pF 30 20 100 pF 20 10 0 −10 −20 10 0 Gain −20 500 pF 1000 pF VCC = 5 V RL = 600 W CL = 16 pF, 100 pF, 500 pF, 1000 pF 16 pF 100 pF 500 pF 1000 pF 100 1000 Frequency − kHz Phase 30 40 20 16 pF 500 pF Gain 20 0 100 pF −20 10 −40 0 −60 −10 16 pF 100 pF VCC = 5 V RL = 100 kΩ CL = 16 pF, 100 pF, 500 pF, 1000 pF −20 10 −80 10000 100 1000 pF 1000 Frequency − kHz Figure 4 Figure 3 • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • 60 1000 pF 40 Gain − dB Phase Phase Margin − Deg 70 50 Gain − dB 1000 Frequency − kHz Figure 1 6 −50 10000 −20 −50 10000 1000 100 Phase 0 0 −10 2 kΩ 20 Gain − dB 2 kΩ 600 Ω 150 Gain 100 kΩ Phase Margin − Deg Gain − dB Gain 200 VCC = 5 V RL = 100 kΩ, 2 kΩ, 600 Ω 150 100 kΩ 20 40 200 VCC = 2.7 V RL = 100 kΩ, 2 kΩ, 600 Ω 500 pF −40 −60 −80 10000 Phase Margin − Deg 40 GAIN AND PHASE MARGIN vs FREQUENCY Phase Margin − Deg GAIN AND PHASE MARGIN vs FREQUENCY LMV321-Q1 SINGLE, LMV358-Q1 DUAL, LMV324-Q1 QUAD LOW-VOLTAGE RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS SLOS415E − JUNE 2003 − REVISED APRIL 2008 TYPICAL CHARACTERISTICS STABILITY vs CAPACITIVE LOAD GAIN AND PHASE MARGIN vs FREQUENCY 50 160 85°C 25°C −40°C 40 10000 2.5 V _ 130 100 Phase 20 70 Gain 40 10 VCC = 5 V RL = 2 kΩ TA = 85°C, 25°C, −40°C 0 −20 10000 100 1000 Frequency − kHz VCC = ±2.5 V AV = +1 RL = 2 kΩ VO = 100 mVPP 10 −2 −1.5 −1 −0.5 0 Output Voltage − V 2.5 V _ VO + RL CL Capacitive Load − nF Capacitive Load − pF 1 1.5 STABILITY vs CAPACITIVE LOAD 10000 2.5 V 100 LMV3xx (25% Overshoot) −1.5 0.5 Figure 6 10000 10 −2.0 CL 100 STABILITY vs CAPACITIVE LOAD 1000 RL LMV3xx (25% Overshoot) Figure 5 VI VO + −2.5 V 1000 10 −10 10 Capacitive Load − pF Gain − dB 30 Phase Margin − Deg VI −1 −0.5 0 Output Voltage − V VCC = ±2.5 V RL = 2 kΩ AV = 10 VO = 100 mVPP 1000 LMV3xx (25% Overshoot) 100 134 kΩ +2.5 V VCC = ±2.5 V AV = +1 RL = 1 MΩ VO = 100 mVPP 0.5 1 1.21 MΩ _ VI + VO RL CL −2.5 V 10 −2.0 1.5 −1.5 Figure 7 −1 −0.5 0 Output Voltage − V 0.5 1 1.5 Figure 8 • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • 7 LMV321-Q1 SINGLE, LMV358-Q1 DUAL, LMV324-Q1 QUAD LOW-VOLTAGE RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS SLOS415E − JUNE 2003 − REVISED APRIL 2008 TYPICAL CHARACTERISTICS STABILITY vs CAPACITIVE LOAD SLEW RATE vs SUPPLY VOLTAGE 10000 1.500 RL = 100 kΩ 1.400 LMV3xx (25% Overshoot) 1.300 Slew Rate − V/ µs Capacitive Load − nF VCC = ±2.5 V RL = 1 MΩ AV = 10 VO = 100 mVPP 1000 100 134 kΩ 1.21 MΩ _ −1.5 1.100 LMV3xx 1.000 PSLEW 0.900 0.700 VO + RL CL −0.5 0 0.600 −2.5 V 10 −2.0 NSLEW 0.800 +2.5 V VI Gain 1.200 −1 0.5 1 0.500 2.5 1.5 3.0 4.0 4.5 5.0 V CC − Supply Voltage − V Output Voltage − V Figure 9 Figure 10 SUPPLY CURRENT vs SUPPLY VOLTAGE − QUAD AMPLIFIER INPUT CURRENT vs TEMPERATURE 700 −10 VCC = 5 V VI = VCC/2 600 −20 TA = 85°C 500 Input Current − nA Supply Current − µA 3.5 TA = 25°C 400 300 TA = −40°C 200 −30 LMV3xx −40 −50 100 0 0 1 2 3 4 5 −60 −40 −30 −20 −10 0 10 20 30 40 50 60 70 80 6 TA − °C VCC − Supply Voltage − V Figure 12 Figure 11 8 • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • LMV321-Q1 SINGLE, LMV358-Q1 DUAL, LMV324-Q1 QUAD LOW-VOLTAGE RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS SLOS415E − JUNE 2003 − REVISED APRIL 2008 TYPICAL CHARACTERISTICS SOURCE CURRENT vs OUTPUT VOLTAGE SOURCE CURRENT vs OUTPUT VOLTAGE 100 100 VCC = 2.7 V VCC = 5 V 10 Sourcing Current − mA Sourcing Current − mA 10 LMV3xx 1 0.1 1 0.1 0.01 0.01 0.001 0.001 LMV3xx 0.01 0.1 1 0.001 0.001 10 0.01 0.1 Figure 13 SINKING CURRENT vs OUTPUT VOLTAGE 100 100 VCC = 2.7 V VCC = 5 V 10 Sinking Current − mA 10 Sinking Current − mA 10 Figure 14 SINKING CURRENT vs OUTPUT VOLTAGE 1 LMV3xx 0.1 1 LMV324 0.1 0.01 0.01 0.001 0.001 1 Output Voltage Referenced to VCC+ − V Output Voltage Referenced to VCC+ − V 0.01 0.1 1 0.001 0.001 10 0.01 0.1 1 10 Output Voltage Referenced to GND − V Output Voltage Referenced to GND − V Figure 15 Figure 16 • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • 9 LMV321-Q1 SINGLE, LMV358-Q1 DUAL, LMV324-Q1 QUAD LOW-VOLTAGE RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS SLOS415E − JUNE 2003 − REVISED APRIL 2008 TYPICAL CHARACTERISTICS SHORT-CIRCUIT CURRENT vs TEMPERATURE SHORT-CIRCUIT CURRENT vs TEMPERATURE 300 120 100 240 Sourcing Current − mA Sinking Current − mA 270 LMV3xx VCC = 5 V 210 180 150 120 LMV3xx VCC = 2.7 V 90 60 80 LMV3xx VCC = 5 V 60 LMV3xx VCC = 2.7 V 40 20 30 0 −40 −30 −20 −10 0 0 10 20 30 40 50 60 70 80 90 TA − °C TA − °C Figure 18 −kSVR vs FREQUENCY +kSVR vs FREQUENCY 90 VCC = −5 V RL = 10 kΩ 70 60 +k SVR − dB −k SVR − dB 70 LMV3xx 40 30 LMV3xx 50 40 30 20 20 10 10 1K 10K 100K 0 100 1M 1K 10K Frequency − Hz Frequency − Hz Figure 19 10 VCC = 5 V RL = 10 kΩ 80 50 0 100 10 20 30 40 50 60 70 80 90 Figure 17 80 60 −40 −30 −20−10 0 Figure 20 • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • 100K 1M LMV321-Q1 SINGLE, LMV358-Q1 DUAL, LMV324-Q1 QUAD LOW-VOLTAGE RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS SLOS415E − JUNE 2003 − REVISED APRIL 2008 TYPICAL CHARACTERISTICS +kSVR vs FREQUENCY −kSVR vs FREQUENCY 80 80 VCC = −2.7 V RL = 10 kΩ 70 60 60 LMV3xx LMV3xx 50 +k SVR − dB −k SVR − dB VCC = 2.7 V RL = 10 kΩ 70 40 30 50 40 30 20 20 10 10 0 100 1K 10K 100K 0 100 1M 1K Frequency − Hz Figure 21 Figure 22 OUTPUT VOLTAGE SWING vs SUPPLY VOLTAGE 6 70 1M RL = 10 kΩ THD > 5% AV = 3 RL = 10 kΩ 60 5 50 100K OUTPUT VOLTAGE vs FREQUENCY Peak Output Voltage − V OPP Output Voltage Swing vs Supply Voltage − mV 10K Frequency − Hz Negative Swing 40 30 20 Positive Swing 4 LMV3xx VCC = 5 V 3 2 LMV3xx VCC = 2.7 V 1 10 0 0 2.5 3.0 3.5 4.0 4.5 VCC − Supply Voltage − V 1 5.0 10 100 Frequency − kHz 1000 10000 Figure 24 Figure 23 • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • 11 LMV321-Q1 SINGLE, LMV358-Q1 DUAL, LMV324-Q1 QUAD LOW-VOLTAGE RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS SLOS415E − JUNE 2003 − REVISED APRIL 2008 TYPICAL CHARACTERISTICS CROSSTALK REJECTION vs FREQUENCY OPEN-LOOP OUTPUT IMPEDANCE vs FREQUENCY 150 110 100 LMV3xx VCC = 5 V 140 Crosstalk Rejection − dB Impedance − Ω 90 VCC = 5 V RL = 5 kΩ AV = 1 VO = 3 VPP LMV3xx VCC = 2.7 V 80 70 60 50 130 120 110 40 100 30 20 1 1000 2000 3000 90 100 4000 Frequency − kHz Figure 25 12 1K 10K Frequency − Hz Figure 26 • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • 100K LMV321-Q1 SINGLE, LMV358-Q1 DUAL, LMV324-Q1 QUAD LOW-VOLTAGE RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS SLOS415E − JUNE 2003 − REVISED APRIL 2008 TYPICAL CHARACTERISTICS NONINVERTING LARGE-SIGNAL PULSE RESPONSE NONINVERTING LARGE-SIGNAL PULSE RESPONSE Input LMV3xx LMV3xx 1 V/Div 1 V/Div Input VCC = ±2.5 V RL = 2 kΩ T = 25°C VCC = ±2.5 V RL = 2 kΩ TA = 85°C 1 µs/Div 1 µs/Div Figure 27 Figure 28 NONINVERTING LARGE-SIGNAL PULSE RESPONSE Input 1 V/Div LMV3xx VCC = ±2.5 V RL = 2 kΩ TA = −40°C 1 µs/Div Figure 29 • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • 13 LMV321-Q1 SINGLE, LMV358-Q1 DUAL, LMV324-Q1 QUAD LOW-VOLTAGE RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS SLOS415E − JUNE 2003 − REVISED APRIL 2008 TYPICAL CHARACTERISTICS NONINVERTING SMALL-SIGNAL PULSE RESPONSE NONINVERTING SMALL-SIGNAL PULSE RESPONSE Input Input LMV3xx 50 mV/Div 50 mV/Div LMV3xx VCC = ±2.5 V RL = 2 kΩ TA = 85°C VCC = ±2.5 V RL = 2 kΩ TA = 25°C 1 µs/Div 1 µs/Div Figure 30 Figure 31 NONINVERTING SMALL-SIGNAL PULSE RESPONSE 50 mV/Div Input LMV3xx VCC = ±2.5 V RL = 2 kΩ TA = −40°C 1 µs/Div Figure 32 14 • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • LMV321-Q1 SINGLE, LMV358-Q1 DUAL, LMV324-Q1 QUAD LOW-VOLTAGE RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS SLOS415E − JUNE 2003 − REVISED APRIL 2008 TYPICAL CHARACTERISTICS INVERTING LARGE-SIGNAL PULSE RESPONSE INVERTING LARGE-SIGNAL PULSE RESPONSE Input Input LMV3xx 1 V/Div 1 V/Div LMV3xx VCC = ±2.5 V RL = 2 kΩ TA = 25°C VCC = ±2.5 V RL = 2 kΩ TA = 85°C 1 µs/Div 1 µs/Div Figure 33 Figure 34 INVERTING LARGE-SIGNAL PULSE RESPONSE Input 1 V/Div LMV3xx VCC = ±2.5 V RL = 2 kΩ TA = −40°C 1 µs/Div Figure 35 • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • 15 LMV321-Q1 SINGLE, LMV358-Q1 DUAL, LMV324-Q1 QUAD LOW-VOLTAGE RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS SLOS415E − JUNE 2003 − REVISED APRIL 2008 TYPICAL CHARACTERISTICS INVERTING SMALL-SIGNAL PULSE RESPONSE INVERTING SMALL-SIGNAL PULSE RESPONSE Input Input LMV3xx 50 mV/Div 50 mV/Div LMV3xx VCC = ±2.5 V RL = 2 kΩ TA = 25°C VCC = ±2.5 V RL = 2 kΩ TA = 85°C 1 µs/Div 1 µs/Div Figure 36 Figure 37 INVERTING SMALL-SIGNAL PULSE RESPONSE 50 mV/Div Input LMV3xx VCC = ±2.5 V RL = 2 kΩ TA = −40°C 1 µs/Div Figure 38 16 • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • LMV321-Q1 SINGLE, LMV358-Q1 DUAL, LMV324-Q1 QUAD LOW-VOLTAGE RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS SLOS415E − JUNE 2003 − REVISED APRIL 2008 TYPICAL CHARACTERISTICS INPUT CURRENT NOISE vs FREQUENCY INPUT CURRENT NOISE vs FREQUENCY 0.50 0.80 VCC = 5 V 0.45 Input Current Noise − pA/ Hz Input Current Noise − pA/ Hz VCC = 2.7 V 0.60 0.40 0.20 0.40 0.35 0.30 0.25 0.20 0.15 0.10 0.05 0.00 10 Hz 100 Hz 1 kHz 0.00 10 kHz 10 Hz Frequency 100 Hz 1 kHz 10 kHz Frequency Figure 39 Figure 40 INPUT VOLTAGE NOISE vs FREQUENCY 200 Input Voltage Noise − nV/ Hz 180 160 140 120 100 80 VCC = 2.7 V 60 40 VCC = 5 V 20 10 Hz 100 Hz 1 kHz 10 kHz Frequency Figure 41 • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • 17 LMV321-Q1 SINGLE, LMV358-Q1 DUAL, LMV324-Q1 QUAD LOW-VOLTAGE RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS SLOS415E − JUNE 2003 − REVISED APRIL 2008 TYPICAL CHARACTERISTICS THD + N vs FREQUENCY THD + N vs FREQUENCY THD − % 1.000 10.000 VCC = 2.7 V RL = 10 kΩ AV = 1 VO = 1 VPP VCC = 2.7 V RL = 10 kΩ AV = 10 VO = 1 VPP 1.000 THD − % 10.000 LMV3xx 0.100 0.100 LMV3xx 0.010 0.010 0.001 0.001 10 100 1K 10K 10 100K Frequency − Hz Figure 42 Figure 43 THD + N vs FREQUENCY 10.000 10K 100K THD + N vs FREQUENCY 10.000 VCC = 5 V RL = 10 kΩ AV = 1 VO = 1 VPP VCC = 5 V RL = 10 kΩ AV = 10 VO = 2.5 VPP 1.000 THD − % THD − % 1.000 1K 100 Frequency − Hz 0.100 0.100 0.010 0.010 LMV3xx LMV3xx 0.001 0.001 10 18 100 1K 10K 10 100K 100 1K Frequency − Hz Frequency − Hz Figure 44 Figure 45 • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • 10K 100K PACKAGE OPTION ADDENDUM www.ti.com 5-May-2015 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) LMV324QDQ1 OBSOLETE SOIC D 14 TBD Call TI Call TI -40 to 125 LMV358QDQ1 OBSOLETE SOIC D 8 TBD Call TI Call TI -40 to 125 LMV358QPWQ1 OBSOLETE TSSOP PW 8 TBD Call TI Call TI -40 to 125 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 5-May-2015 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF LMV324-Q1, LMV358-Q1 : • Catalog: LMV324, LMV358 NOTE: Qualified Version Definitions: • Catalog - TI's standard catalog product Addendum-Page 2 PACKAGE OUTLINE PW0008A TSSOP - 1.2 mm max height SCALE 2.800 SMALL OUTLINE PACKAGE C 6.6 TYP 6.2 SEATING PLANE PIN 1 ID AREA A 0.1 C 6X 0.65 8 1 3.1 2.9 NOTE 3 2X 1.95 4 5 B 4.5 4.3 NOTE 4 SEE DETAIL A 8X 0.30 0.19 0.1 C A 1.2 MAX B (0.15) TYP 0.25 GAGE PLANE 0 -8 0.15 0.05 0.75 0.50 DETAIL A TYPICAL 4221848/A 02/2015 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. 4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side. 5. Reference JEDEC registration MO-153, variation AA. www.ti.com EXAMPLE BOARD LAYOUT PW0008A TSSOP - 1.2 mm max height SMALL OUTLINE PACKAGE 8X (1.5) 8X (0.45) SYMM 1 8 (R0.05) TYP SYMM 6X (0.65) 5 4 (5.8) LAND PATTERN EXAMPLE SCALE:10X SOLDER MASK OPENING METAL SOLDER MASK OPENING METAL UNDER SOLDER MASK 0.05 MAX ALL AROUND 0.05 MIN ALL AROUND SOLDER MASK DEFINED NON SOLDER MASK DEFINED SOLDER MASK DETAILS NOT TO SCALE 4221848/A 02/2015 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com EXAMPLE STENCIL DESIGN PW0008A TSSOP - 1.2 mm max height SMALL OUTLINE PACKAGE 8X (1.5) 8X (0.45) SYMM (R0.05) TYP 1 8 SYMM 6X (0.65) 5 4 (5.8) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:10X 4221848/A 02/2015 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms and conditions of sale of semiconductor products. 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