ECE-343 Spring 2012, Lab 4
Feedback Amplifiers
Due as indicated on the time-management form
Overview
This lab involves the use of feedback to design a voltage amplifier with more predictable performance.
You will design a second stage amplifier to combine with the differential amplifier that you built in Lab 3
(producing a high-gain, two-stage amplifier with differential input). One input of the differential amplifier
will be connected to an external (single-ended) source, while the other input will be driven by the feedback
signal. To make things interesting, we require that a 10 kΩ resistor be added between the differential
amplifier input terminals. A conceptual diagram is shown below.
The (closed-loop) amplifier must have a gain (vout /vin ) of 26 dB ± 1 dB for frequencies between 100 Hz
and 50 kHz. “Good” designs should be insensitive to active component parameters, insensitive to power
supply variations, and should provide a wide output swing. As with any voltage amplifier, high input
impedance and low output impedance is desirable.
Use only ALD1106 NMOS and ALD1107 PMOS transistors. In your designs, use the model parameters
from the spice models provided on the course www site. Connect the body terminals of the chip to the
appropriate supply rail (±5 V)
Tasks
1. Create a table summarizing the properties of your differential amplifier design from Task 2 of Lab 3,
with the additional 10 kΩ input resistor included. Include the following:
Input DC Offset (should be 0 V)
Output DC Offset
Midband Input Impedance (no external load)
Midband Output Impedance
Open-Circuit (No Load) Voltage Gain
2. Design the second stage amplifier to create a 2-stage amplifier with “high enough” gain. You may not
use capacitive coupling between the amplifier stages. Further, the output of the second stage amplifier
should be biased such that:
• 0 V is well within the output swing range for the second stage, and
• Connecting a resistive load to ground on the output node should not significantly impact the
bias currents.
The design is left largely up to you. You may use BJTs or MOSFETs. Describe your design choices in
detail, including how you determined the specifications for the 2nd stage, and how you appropriately
biased the amplifier.
Predict all bias voltages, and extend the table from Task 1 to show the properties of the second amplifier stage. Provide a third column of the table to show the properties of the cascaded, 2-stage amplifier
(without the feedback connected).
Verify your 2nd stage design using a simulation.
3. Use resistive feedback to complete the design so that the closed-loop system meets the above specifications. Do not use capacitive coupling in the feedback path. Your design process should use a 2-port
analysis to show how the feedback network loads the amplifier output, and drives the cascaded amplifier input. Your analysis should:
(a) Clearly identify the network which provides the gain “A”, and show how β is determined.
(b) Give the gains A and β in terms of the feedback resistor values.
(c) Select appropriate feedback resistor values to meet the requirements above.
(d) Extend the table from Task 1 to include the properties of the (closed-loop) amplifier.
4. Verify your design using a simulation. Provide simulation results using a transient analysis for a 1 kHz
input to show amplifier stability. Also provide an AC simulation showing the gain vs. frequency
characteristics of the amplifier.
Make a (log-log) plot showing the change in (midband) input resistance as an external load resistance
is varied.
5. Build the system, and measure the gain for frequencies ranging from 10 Hz to 500 kHz.
For a 1 kHz input signal, measure the output resistance of the amplifier.
Again for a 1 kHz signal, measure the amplifier input resistance for external loads of RL = 100 Ω,
1 kΩ, 10 kΩ, 50 kΩ, and ∞.
6. Report and Demonstration:
a are each responsible for producing a written lab report. Be sure to discuss
(a) Lab partners labeled your design process, and present your theoretical, simulated, and experimental results.
(b) Each lab partner must schedule a short demonstration and oral exam with their grader TA. Lab
notebooks should be available to the TAs during this presentation.
Time Management and Lab Notebook Documentation
ECE343, Spring 2012, Lab 4
a
Names: Group #
b
Please use this form to collect signatures from your assigned TA for each lab as you complete the tasks indicated
below. Signatures must be collected on or before the indicated date. Include this completed form with your lab
notebooks and final lab report.
In unusual circumstances, you may request a If a change in schedule is approved, have the instructor/TA change and
change of one or more of the deadlines listed initial the dates listed below, and sign in this block.
below. This request must be approved either
Monday or Tuesday of the week in which the
lab is assigned.
Wed/Thu, Mar 21,22
Attend the lab briefing and review the deadlines given below. Any modifications must
be approved by Tuesday, 4:00 p.m.
Mon, Apr 2: 4:00 p.m.
(10 pts) Circuit design and simulation results completed All designs must be entered
into lab notebooks.
TA’s: Rate from 1 (worst) to 5 (best)...
Clarity of Design Process: 1 2 3 4 5
Lab Notebook Procedures: 1 2 3 4 5
Simulations Completed: 1 2 3 4 5
Clarity of Simulation Results: 1 2 3 4 5
Successful Design Complete: 1 2 3 4 5
Early Check-off: 1 2 3 4 5
Signature:
Fri, Apr 6: 3:30 p.m.
Date:
(10 pts) Experimental measurements completed and entered into lab notebooks.
Rate from 1 (worst) to 5 (best)...
Experimental Procedures Clearly Described:
Lab Notebook Procedures:
Preliminary Analysis of Results:
Clarity of Results Presentation:
Successful Design Demonstrated:
Early Check-off:
Signature:
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Date:
Mon, Apr 9: 4:00 p.m.
Each Lab Partner must schedule a demonstration.
Mon, Apr 9: 4:00 p.m.
a only) Text should be com(10 pts) Rough draft of report completed: (Lab Partner plete, requiring editing primarily for grammar, consistency, or presentation.
Signature:
Date:
As Scheduled
(40 pts) Demonstration and Oral Exam: Each partner is required to demonstrate a lab
measurement, and show understanding of the lab content. Lab notebooks must be present
at the time of the exam.
Wed, Apr 11: 4:00 p.m.
(50 pts) Final Report Due in Room 219 (Lab Partner b only) Turn in your final report
with this form. Reports are not accepted late.