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Loop Gain in Analog Design—A New and Complete Approach Agustin Ochoa Ramtron International Corporation 1850 Ramtron Drive Colorado Springs, CO 80921, USA Abstract- Loopgain has long been a defining function in determining stability properties of analog designs. It has surprisingly been ill defined leaving questions on loading and feedforward effects unanswered. In this article I generate a direct method for producing a unique and complete loop gain function using driving point impedance and signal flow graph techniques. In this approach loading and signal paths, feedback and feed forward paths in the amplifier as well as in the feedback net are included. Full feedback is described using two loops, the normal loop-forward amplifier-reverse feedback net loop and a reverse loop in the opposite direction, a symmetrical result. I. I. INTRODUCTION A feedback system is one in which a sample of its response is returned to the input and re-cycled through the system. This process reduces sensitivity of the design to process and temperature variations trading off amplifier gain. It also introduces potential instability if the feedback signal is not properly conditioned. Feedback is normally characterized by the system loop gain—a function that has generally not been well defined in the literature, usually given as a variation of opening the loop. For ideal systems and those approximating ideal, the simple theory of opening the loop to find the loop gain works well. Real systems however are not composed of unilateral blocks having low output and high input impedances and loading and feedforward effects need to be included in the analysis. Bode[1] suggested a return-ratio (RR) definition for loopgain where an active element’s controlled source is replaced by an ideal one in the circuit, the controlled source maintaining its coupling to the controlling node and the RR being the response in the controlled source due to excitation by its replacement source. While seemingly a clean definition RR is not measureable on the bench and simulations become complex as we must account for the nonideal behavior of the transconductor. In this paper I develop a loop gain procedure fully accounting for loading and feedforward effects due to application of the feedback network and loads as well as feedback signals through the amplifier itself. Net feedback is shown to be composed of two loops: The forward loop with the signal flowing through the high gain amplifier then through the feedback net in the reverse direction and a reverse loop with the signal travelling in the opposite direction around the primary loop due to a reverse transmission through the amplifier and forward through the feedback net. Part II presents the argument for the process, Part III sets up simulation templates for obtaining loop results and in Part IV two examples are demonstrated. Part V summarizes the contributions made in this work. II. FORMULATING LOOP GAIN PROPERLY While Bode used a transfer element in an active device as his focus, a two port approach reveals transfer elements available for generalizing the process. For a feedback system as shown in Figure 1 we write the system transfer function, Hos, as the product of the output short circuit current Isc and the output Driving Point Impedance DPIout[2] as given in (1). The output short circuit current is given as the effective transconductance at the output due to excitation at the source Gmos multiplied by the input voltage signal vs. The Driving Point Impedance DPIout is the more interesting factor and will be shown to contain the system loopgain directly. H os = I sc DPI out (1) I sc = Gmos v s To obtain the output DPI we set the system input to AC ground using a large capacitor, here 10F as shown in Figure 2. We split the output node into the three branches for load, amp, and feedback net, apply a voltage source to each, and find the total current into the three branches, iin as given in (2), with these sources set equal to vout. Figure 1: Feedback System with Elements Source, Amplifier, Feedback Network and Load rs 10F AMP Fbk Net ia va il Load vl if vf Figure 2: Setup for Finding Output DPI for Feedback System in Fig. 1 Figure 3: Flow Graph for Output DPI Showing Role of Self and Cross Components iin = il + ia + i f = ill + (iaa + iaf ) + (i ff + i fa ) (2) = ( yll + yaa + g maf + y ff + g mfa )vout In the expansion of (2) into component currents we see that there are two types—currents into a node due to a voltage excitation at that node or ‘self’ currents represented as admittances and currents into a node due to a voltage at another node, ‘cross-currents’ represented using transconductances. Currents ixx are into node x due to excitation at source x while ixy represents currents into node x due to excitation source y. With this distinction the last line in (2) is seen to separate the cross currents from the self direct to ground currents, re-arranged in (3). This last result is used to define the flow graph in Figure 3. (iin − ( g maf + g mfa )vout ) 1 = vout yll + y aa + y ff (3) From the flow graph we identify the cross-currents as the ‘feedback’ signals. We write directly for the effective output impedance zout (4) in terms of the ‘open loop’ output impedance z’out and loop gain function LG: ' z out = z out z out 1 − LG 1 yll + yaa + y ff = − ( g maf + g mfa ) 1− yll + yaa + y ff LG = − ( g maf + g mfa ) yll + yaa + y ff ; z ' out = (4) 1 yll + yaa + y ff A useful variant of the loop gain function in (4) is found by multiplying top and bottom by an arbitrary voltage converting terms to currents: LG = = − ( g maf + g mfa )v ( yl + y aa + y ff )v − (iaf + i fa ) (admittances) to ground that are in parallel in the full circuit at the point where we ‘cut’ the loop to find the output DPI. The resulting branches are seen to be in parallel accounting fully for circuit impedances looking into the cut with the feedback zeroed--the cross currents are suppressed. These self currents define the system z’out in (4). The cross currents (transconductances) indicate traversal of the loop in each direction, the normal forward high gain path and a reverse path, backward through the amplifier usually having lower gain. These cross currents are loop feedback parameters—a response at one end of the loop due to an excitation at the other end, account for the signals that flow in the loop, Figure 3. Note the symmetry exposed in this representation showing signal propagation in both directions around the loop. In this form we fully account for the source and the target of the currents: A feedback current is identified specifically as a cross current and a non-feedback current, one that does not loop, is identified as a self current. Loop gain is seen to be given by the symmetrical relation ‘minus the sum of the cross currents divided by the sum of the self currents.’ III. FINDING LOOP GAIN FROM SIMULATION To simplify the simulation setup we combine the load current with the amplifier current in (5) and in Figure 2, rename the sources v1x and v2y removing the ‘amplifier’, ‘feedback’, and ‘load’ identification as shown in Figure 4. LG is now given in (6). LG = − (i12 + i21 ) i11 + i22 To find two of the four LG terms in (6) we use the schematic in Figure 4. Source v22, an AC frequency swept unity magnitude source drives the feedback net while source v12 is set to zero magnitude. The cross current i12 is found as the current through source v12, the self current i22 is the current through source v22. To find the remaining loop gain terms we use a modified copy of the schematic in Figure 4 replacing the AC swept source v22 with a zeroed v21 source and the zeroed v12 with a driven v11 source generating the corresponding terms i21 and i11. We then form the algebra in (6) to obtain the system loop gain. Since this approach ‘cuts’ a wire in the main feedback path it is not necessary to be concerned where in the loop this rs 1kF vout AMP This relation has intuitive appeal in that the loop gain components consist of self currents, ill, iaa and iff, and cross currents iaf and ifa. The self currents represent port currents Load i12 (5) ill + iaa + i ff (6) i22 Fbk Net 1kH v12 v22 1kF 1kF Figure 4: System Setup for Obtaining Currents i22 and i12 analysis is made. We insert the isolating induuctor, AC shorting capacitors and voltage sources anywhere inn this loop, before or after the feedback net. IV. TWO EXAMPLES IN FINDING LOOP GAIN We apply this method to two circuits—aa voltage regulator and a crystal oscillator. The first exam mple, the voltage regulator, is a two stage modified Milller compensated amplifier having ~3.6nF, 0.5uA load (here to be included in the definition of Zload placed in Figure 55). The feedback network is a resistor divider of approximattely 7.5Meg Ohm top, 20Meg Ohm lower resistors with a 6pF F bypass capacitor across the upper resistor. The copies of tthe inductor loop interrupted, large capacitor AC grounded noddes schematics are shown in Figure 5. The regulator copy on the left in Figuree 5 generates self current i22 and cross current i12, is driven wiith AC magnitude one frequency swept v22 while source v12 is zeroed. The copy C swept generates on the right having v21 zeroed with v11 AC terms i11 and i21. The amplifier uses the ttopology recently reported in [3] featuring a compensation caapacitor from the output to a low impedance point at the caascode node of a stacked differential input pair, Figure 6. This internal feedback loop does not addd complications to the method described in this paper—the external loop is analysed for effective feedback behaviour as internal loops are automatically included in the results. Formulating the algebraic definition of looop gain we obtain the plots shown in Figure 7 for loop gain and phase. Phase Margin is obtained as 88 degrees for this deesign, a unity gain bandwidth of a bit over 100 kHz and low w frequency gain exceeding 60dB. vref vref vo vo z load Fbk net v22 v12 z load Fbk net v11 v21 Figure 7: Loop Gain Magnitude (top) and Phase P (bottom) for the Voltage Regulator Systeem While not plotted here it is clear that the output impedance he results of this paired factors can be generated from th simulation set using (4), dividing z’out o by (1-LG). To generate the closed loop transfer function we need the Gmos factor in (1). This is found as the current into o an AC short (very large capacitor) at vout due to excitation at vref. Examination of these h analysis significantly various factors with simulation or hand aids in the understanding of the beh haviour of a design and in creating the design in the first place. Hand analysis is tractable as feedback is disabled in these partiaal circuits. For the second example we loo ok at a low power crystal oscillator. A 32 KHz crystal with 12 2 pF effective load is used as the feedback network across a single s transistor amplifier with current source load nominally of o about 200nA shown in Figure 8, is analyzed using the output impedance method p the transistor in defined above. This design puts subthreshold—the MOS is in bipolarr operation. Figure 5: Simulation Setup Showing Two Instances oof a Regulator with Appropriate Drives to Obtain the Four Loop G Gain Factors I bias vout 24pF 24pF (a) Figure 8: 32 kHz Crystal Oscillator Core Cell Figure 6: Amplifier Used in Regulator Design Featturing Capacitive Feedback at Low Impedance Nodee With a driving point analysis approach, the effects of feedback were found by looking into a point in the outer feedback path and accounting for the response of the current in each direction due to a voltage excitation—the normal Driving Point Impedance setup. Figure 9: The Loop Gain Schematic Template for the Crystal Oscillator Circuit Figure 10: Loop Gain Magnitude (top) and Phase (bottom) for the Crystal Oscillator The loop gain AC grounds, isolation inductor and AC sources are inserted into the oscillator circuit as shown in Figure 9. Two instances of this template are used with the complementary source definitions to generate the output DPI currents which are then combined algebraically to define the loop gain function magnitude and phase plotted in Figure 10. The small signal loop gain is seen greater than one as required for start of oscillation at the frequency where the phase goes through 0 degrees for positive feedback. SUMMARY The usual discussion of feedback begins with ideal elements followed by a discussion of loading and feedforward effects that may impact the design behavior. In this paper this approach was avoided altogether with the analysis not resorting to ideal elements and including from the start source, load, and feedback network effects without distinction. Indeed non-ideal amplifier behavior was tacitly included as well. The basis of this analysis is the classic feedback modified output impedance in (4) as the often stated zout=z’out/(1-LG). The process described is seen to produce two types of responses, a self response as a current into a port due to a voltage excitation at that port and a cross response, a current into a port due to excitation at different port. This identification allows for the separation of terms into their appropriate role in the impedance relation of feedback systems. The impedance factor z’out (with the feedback appropriately zeroed) and the loop signals that combine with z’out to produce the system loop gain as defined in the DPIout relation in (4), are separated naturally. The flow graph for the output impedance gives visual recognition and differentiation of these roles. A necessary symmetry of two loops is revealed adding the reverse transmission directly into the feedback dialog. This Driving Point Impedance approach has been demonstrated using two circuits, a modified Miller compensated voltage regulator (having an internal loop) and a low power crystal oscillator. The circuits are modified using template inserts into the outer feedback path and two instances of the modified feedback system are simulated simultaneously to obtain loop gain and transfer function terms which are then algebraically combined. This approach lends itself to hand analysis for gaining further insight as the process automatically removes feedback in the setup making the subcircuits analyzed considerably simpler than the full feedback system. ACKNOWLEDGMENT This work has been evolving over a long time and it has been my good fortune to have attracted the interests of Don Patterson, Roger Gill, and of Jorge Vega who have provided comments and discussion over the course of this work and manuscript, much to its improvement. REFERENCES [1] H. W. Bode, Network Analysis and Feedback Amplifier Design, New York, NY, Van Nostrand, 1945. [2] Ochoa, A., Jr.,‘A Systematic Approach to the Analysis of General and Feedback Circuits and Systems Using Signal Flow Graphs and DrivingPoint Impedance’, Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions onFeb 1998 Volume: 45 Issue: 2,187 – 195. [3] Hu Zhiming, Zhou Ze-Kun, Chen Yue, Zhang Bo, ‘A Ultra-Fast Load Regulation Capacitor-free LDO with Advanced Capacitive-coupling Feedforward Compensation’, 10th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT), 1-4 Nov. 2010, 482 – 484