570 Chapter 8 䊏 Feedback
8.5.2 Series-Series Feedback
Consider the series-series feedback connection of Fig. 8.12. The effect of nonideal networks
can be calculated using the representation of Fig. 8.16a. In this case the most convenient twoport representation is the use of the open-circuit impedance parameters or z parameters
because the basic amplifier and the feedback network are now connected in series at input
and output and thus have identical currents at their terminals. As shown in Fig. 8.17, the z
zS
Basic amplifier
ii
io
z22a
z11a
+
+
z12a io
z21a ii
–
–
+
vs
(a)
z11f
z22f
+
+
z12f io
z21f ii
–
ii
zL
Feedback network
–
–
zS
New basic amplifier
z11a
io
z22a
+
z21a ii
zL
–
+
(b)
z11f
vs
z22f
–
New feedback network
+
z12f io
–
Figure 8.16 (a) Series-series feedback configuration using the z-parameter representation.
(b) Circuit of (a) redrawn with generators z21f ii and z12a io omitted.
parameters specify the network by expressing terminal voltages in terms of terminal currents,
and this results in simple calculations when the two networks have common terminal currents.
The calculation in this case proceeds as the exact dual of that in Section 8.5.1. From Fig. 8.16,
summation of voltages at the input gives
v s = (zS + z11a + z11f )ii + (z12a + z12f )io
(8.79)
8.5 Practical Configurations and the Effect of Loading
571
i2
i1
+
+
v1
v2
–
–
v1 = z11i1 + z12i2
v2 = z21i1 + z22i2
z11 =
v1
i1 i2 = 0
z12 =
v1
i2 i1 = 0
z21 =
v2
i1 i2 = 0
z22 =
v2
i2 i1 = 0
Figure 8.17 The z-parameter
representation of a two-port.
Summing voltages at the output we obtain
0 = (z21a + z21f )ii + (zL + z22a + z22f )io
(8.80)
zi = zS + z11a + z11f
zo = zL + z22a + z22f
(8.81)
It is useful to define
(8.82)
Again neglecting reverse transmission through the basic amplifier, we assume that
|z12a | |z12f |
(8.83)
Also neglecting feed-forward through the feedback network, we can write
|z21a | |z21f |
(8.84)
With these assumptions it follows that
io
=A
vs
−z21a
a
zi zo =
−z21a
1 + af
1+
z12f
zi zo
(8.85)
where
a=−
z21a
zi zo
f = z12f
(8.86)
(8.87)
A circuit representation of a in (8.86) and f in (8.87) can be found by removing generators
z21f ii and z12a io from Fig. 8.16a in accord with (8.83) and (8.84). This gives the approximate
representation of Fig. 8.16b, where the new basic amplifier includes the loading effect of the
original feedback network. The new feedback network is an ideal one as used in Fig. 8.12. The
transfer function of the basic amplifier of Fig. 8.16b is the same as in (8.86), and the transfer
function of the feedback network of Fig. 8.16b is given by (8.87). Thus Fig. 8.16b is a circuit
representation of (8.86) and (8.87).
Since Fig. 8.16b has a direct correspondence with Fig. 8.12, all the results of Section 8.4.4
can now be used. The loading effect of the feedback network on the basic amplifier is included
572
Chapter 8 䊏 Feedback
by connecting the feedback-network terminal impedances z11f and z22f in series at input and
output of the basic amplifier. Terms z11f and z22f are defined in Fig. 8.17 and are obtained
by calculating the terminal impedances of the feedback network with the other port open circuited. Feedback function f given by (8.87) is the reverse transfer impedance of the feedback
network.
Consider, for example, the series-series feedback triple of Fig. 8.18a, which is useful as
a wideband feedback amplifier. RE2 is usually a small resistor that samples the output current
io , and the resulting voltage across RE2 is sampled by the divider RF and RE1 to produce a
feedback voltage across RE1 . Usually RF RE1 and RE2 .
The two-port theory derived earlier cannot be applied directly in this case because the basic
amplifier cannot be represented by a two-port. However, the techniques developed previously
using two-port theory can be used with minor modification by first noting that the feedback
network can be represented by a two-port as shown in 8.18b. One problem with this circuit is
that the feedback generator z12f ie3 is in the emitter of Q1 and not in the input lead where it can
be compared directly with v s . This problem can be overcome by considering the small-signal
equivalent of the input portion of this circuit as shown in Fig. 8.19. For this circuit
v s = ii zS + v be + ie1 z11f + z12f ie3
(8.88)
Using
ie3 =
io
α3
(8.89)
in (8.88) gives
v s − z12f
io
= ii zS + v be + ie1 z11f
α3
(8.90)
where the quantities in these equations are small-signal quantities. Equation 8.90 shows that
the feedback voltage generator z12f (io /α3 ) can be moved back in series with the input lead; if
this was done, exactly the same equation would result. (See Fig. 8.18c.) Note that the commonbase current gain α3 of Q3 appears in this feedback expression because the output current is
sampled by RE2 in the emitter of Q3 in order to feed back a correcting signal to the input. This
problem is common to most circuits employing series feedback at the output, and the α3 of Q3
is outside the feedback loop. There are many applications where this is not a problem, since
α 1. However, if high gain precision is required, variations in α3 can cause difficulties.
The z parameters of the feedback network can be determined from Fig. 8.20 as
v 1 RE1 RE2
z12f =
=
(8.91)
i2 i1 = 0
RE1 + RE2 + RF
v 2 z22f =
= RE2 ||(RE1 + RF )
(8.92)
i2 i1 = 0
v 1 z11f =
= RE1 ||(RF + RE2 )
(8.93)
i1 i2 = 0
Using (8.84), we neglect z21f .
From the foregoing results we can redraw the circuit of Fig. 8.18b as shown in Fig. 8.18c.
As in previous calculations, the signal fed forward via the feedback network (in this case
z21f ie1 ) is neglected. The feedback voltage generator is placed in series with the input lead
8.5 Practical Configurations and the Effect of Loading
573
io
Q3
Q2
zS
Q1
zL
RL2
RL1
+
vs
–
feedback network
RF
RE1
RE2
(a)
io
Q3
Q2
zS
Q1
+
vs
zL
RL2
RL1
ie3 =
ie1
io
α3
–
z22f
z11f
+
+
z12f ie3
z21f ie1
–
–
(b)
io
zS
z12f
i
α3 o
+
–
Q3
Q2
Q1
zL
RL2
RL1
+
vs
–
RF
RF
RE1
RE2
RE2
RE1
(c)
Figure 8.18 (a) Series-series feedback triple. (b) Circuit of (a) redrawn using a two-port z-parameter
representation of the feedback network. (c) Approximate representation of the circuit in (b).
574
Chapter 8 䊏 Feedback
ii
zS
+
+
vbe
vs
gm1vbe
rπ1
–
–
ie1
z11f
+
z12f ie3
Figure 8.19 Small-signal
equivalent circuit of the input
stage of the circuit in Fig. 8.18b.
–
and an ideal differencing node then exists at the input. The effect of feedback loading on the
basic amplifier is represented by the impedances in the emitters of Q1 and Q3 . Note that this
case does differ somewhat from the example of Fig. 8.16b in that the impedances z11f and z22f
of the feedback network appear in series with the input and output leads in Fig. 8.16b, whereas
in Fig. 8.18c these impedances appear in the emitters of Q1 and Q3 . This is due to the fact that
the basic amplifier of the circuit of Fig. 8.18a cannot be represented by two-port z parameters
but makes no difference to the method of analysis. Since the feedback voltage generator in
Fig. 8.18c is directly in series with the input and is proportional to io , a direct correspondence
with Fig. 8.16b can be established and the results of Section 8.4.4 can be applied. There is no
further need of the z parameters, and by inspection we can write
a
io
=A
vs
1 + af
(8.94)
where
f =
z12f
RE1 RE2
1
=
α3
α3 RE1 + RE2 + RF
(8.95)
and a is the transconductance of the circuit of Fig. 8.18c with the feedback generator
[(z12f /α3 )io ] removed.
The input impedance seen by v s with feedback applied is (1 + af )× (input impedance of
the basic amplifier of Fig. 8.18c including feedback loading).
The output impedance with feedback applied is (1 + af ) times the output impedance of
the basic amplifier including feedback loading.
RF
+
+
i1
v1
–
RE1
RE2
i2
v2
–
Figure 8.20 Circuit for the calculation of the z parameters of the feedback network of the circuit in
Fig 8.18a.
8.5 Practical Configurations and the Effect of Loading
575
If the loop gain T = af is large, then the gain with feedback applied is
A=
RE1 + RE2 + RF
1
io
= α3
vs
f
RE1 RE2
(8.96)
EXAMPLE
A commercial integrated circuit2 based on the series-series triple is the MC 1553 shown in
Fig. 8.21a. Calculate the terminal impedances, loop gain, and overall gain of this amplifier at
low frequencies.
The MC 1553 is a wideband amplifier with a bandwidth of 50 MHz at a voltage gain of
50. The circuit gain is realized by the series-series triple composed of Q1 , Q2 , and Q3 . The
output voltage is developed across the load resistor RC and is then fed to the output via emitter
follower Q4 , which ensures a low output impedance. The rest of the circuit is largely for bias
+VCC
RA
RB
CP
RC
Q5
Q4
Q3
RK
Q2
Vo
Q1
Vs
RF
RG
CF
RE1
RE2
Q8
RD
CB
Q7
Q6
RE1 = 100 Ω, RE2 = 100 Ω, RF = 640 Ω, RA = 9 kΩ,
RB = 5 kΩ, RC = 600 Ω, RD = 12 kΩ, RG = 3 kΩ,
RK = 6 kΩ
(a)
i3
Q3
Q2
Q1
88 Ω
9 kΩ
+
vs
–
RC
5 kΩ
88 Ω
(b)
Figure 8.21 (a) Circuit of the MC 1553 wideband integrated circuit. (b) Basic amplifier of the series-
series triple in (a).
576
Chapter 8 䊏 Feedback
i3
+
rπ 1
+
vs
–
+
v1
rπ 2
gm1v1
+
gm2v2
v3
–
v4
v2
88 Ω
+
rπ 3
–
88 Ω
–
IC1 = 0.6 mA
IC2 = 1 mA
IC3 = 4 mA
rπ 1 = 4.33 kΩ
1 Ω
gm1 =
rπ 2 = 2.6 kΩ
1 Ω
gm2 =
rπ 3 = 650 Ω
4 Ω
gm3 =
43.3
RC
–
5 kΩ
9 kΩ
gm3v3
26
26
(c)
Figure 8.21 (c) Small-signal equivalent circuit of the basic amplifier in (b).
purposes except capacitors CP , CF , and CB . Capacitors CP and CF are small capacitors of
several picofarads and are included on the chip. They ensure stability of the feedback loop,
and their function will be described in Chapter 9. Capacitor CB is external to the chip and is a
large bypass capacitor used to decouple the bias circuitry at the signal frequencies of interest.
Bias Calculation. The analysis of the circuit begins with the bias conditions. The bias current
levels are set by the reference current IRK in the resistor RK , and assuming VBE(on) = 0.6 V
and VCC = 6 V, we obtain
IRK =
VCC − 2VBE(on)
RK
(8.97)
Substituting data in (8.97) gives
IRK =
6 − 1.2
A = 0.80 mA
6000
The current in the output emitter follower Q4 is determined by the currents in Q6 and Q8 .
Transistor Q8 has an area three times that of Q7 and Q6 and thus
IC8 = 3 × 0.8 mA = 2.4 mA
IC6 = 0.8 mA
where βF is assumed large in these bias calculations. If the base current of Q1 is small, all of
IC6 and IC8 flow through Q4 and
IC4 IC6 + IC8
(8.98)
Thus
IC4 3.2 mA
Transistor Q8 supplies most of the bias current to Q4 , and this device functions as a Class A
emitter-follower output stage of the type described in Section 5.2. The function of Q6 is to
allow formation of a negative-feedback bias loop for stabilization of the dc operating point,
and resistor RG is chosen to cause sufficient dc voltage drop to allow connection of RD back
to the base of Q1 . Transistors Q1 , Q2 , Q3 , and Q4 are then connected in a negative-feedback
bias loop and the dc conditions can be ascertained approximately as follows.
8.5 Practical Configurations and the Effect of Loading
577
If we assume that Q2 is on, the voltage at the collector of Q1 is about 0.6 V and the voltage
across RA is 5.4 V. Thus the current through RA is
5.4
RA
5.4
=
= 0.6 mA
9000
IRA =
(8.99)
If βF is assumed high, it follows that
IC1 IRA = 0.6 mA
(8.100)
Since the voltage across RE1 is small, the voltage at the base of Q1 is approximately 0.6 V,
and if the base current of Q1 is small, this is also the voltage at the collector of Q6 since any
voltage across RD will be small. The dc output voltage can be written
VO = VC6 + IC6 RG
(8.101)
Substitution of data gives
VO = (0.6 + 0.8 × 3) V = 3 V
The voltage at the base of Q4 (collector of Q3 ) is VBE above VO and is thus 3.6 V. The
collector current of Q3 is
IC3 VCC − VC3
RC
(8.102)
Substitution of parameter values gives
6 − 3.6
A = 4 mA
600
The voltage at the base of Q3 (collector of Q2 ) is
IC3 VB3 −IE3 RE2 + VBE(on)
(8.103)
Thus
VB3 = VC2 (4 × 0.1 + 0.6) V = 1 V
IC2 may be calculated from
IC2 VCC − VC2
RB
(8.104)
and substitution of parameter values gives
6−1
A = 1 mA
IC2 5000
The ac Calculation. The ac analysis can now proceed using the methods previously developed
in this chapter. For purposes of ac analysis, the feedback triple composed of Q1 , Q2 , and Q3
in Fig. 8.21a is identical to the circuit in Fig. 8.18a, and the results derived previously for the
latter circuit are directly applicable to the triple in Fig. 8.21a. To obtain the voltage gain of the
circuit of Fig. 8.21a, we simply multiply the transconductance of the triple by the load resistor
RC , since the gain of the emitter follower Q4 is almost exactly unity. Note that resistor RD is
578
Chapter 8 䊏 Feedback
assumed grounded for ac signals by the large capacitor CB , and thus has no influence on the
ac circuit operation, except for a shunting effect at the input that will be discussed later. From
(8.95) the feedback factor f of the series-series triple of Fig. 8.21a is
f =
100 × 100
1
= 12.0 0.99 100 + 100 + 640
(8.105)
where β0 = 100 has been assumed.
If the loop gain is large, the transconductance of the triple of Fig. 8.21a can be calculated
from (8.96) as
1
io3
1
=
A/V
vs
f
12
(8.106)
where io3 is the small-signal collector current in Q3 in Fig. 8.21a. If the input impedance of
the emitter follower Q4 is large, the load resistance seen by Q3 is RC = 600 and the voltage
gain of the circuit is
vo
io3
=−
× RC
vs
vs
(8.107)
vo
= −50.0
vs
(8.108)
Substituting (8.106) in (8.107) gives
Consider now the loop gain of the circuit of Fig. 8.21a. This can be calculated by using the
basic-amplifier representation of Fig. 8.18c to calculate the forward gain a. Fig. 8.18c is redrawn
in Fig. 8.21b using data from this example, assuming that zS = 0 and omitting the feedback
generator. The small-signal, low-frequency equivalent circuit is shown in Fig. 8.21c assuming
β0 = 100, and it is a straightforward calculation to show that the gain of the basic amplifier is
a=
i3
= 20.3 A/V
vs
(8.109)
Combination of (8.105) and (8.109) gives
T = af = 12 × 20.3 = 243.6
(8.110)
The transconductance of the triple can now be calculated more accurately from (8.94) as
20.3
a
io3
=
A/V = 0.083 A/V
=
vs
1+T
244.6
(8.111)
Substitution of (8.111) in (8.107) gives for the overall voltage gain
vo
io3
= − RC = −0.083 × 600 = −49.8
vs
vs
(8.112)
This is close to the approximate value given by (8.108).
The input resistance of the basic amplifier is readily determined from Fig. 8.21c to be
ria = 13.2 k
(8.113)
The input resistance when feedback is applied is
Ri = ria (1 + T )
(8.114)
8.5 Practical Configurations and the Effect of Loading
579
Substituting (8.113) and (8.110) in (8.114) gives
Ri = 13.2 × 244.6 k
= 3.23 M
(8.115)
As expected, series feedback at the input results in a high input resistance. In this example,
however, the bias resistor RD directly shunts the input for ac signals and is outside the feedback
loop. Since RD = 12 k
and is much less than Ri , the resistor RD determines the input
resistance for this circuit.
Finally, the output resistance of the circuit is of some interest. The output resistance of the
triple can be calculated from Fig. 8.21c by including output resistance ro in the model for Q3 .
The resistance obtained is then multiplied by (1 + T ) and the resulting value is much greater
than the collector load resistor of Q3 , which is RC = 600 . The output resistance of the full
circuit is thus essentially the output resistance of emitter follower Q4 fed from a 600-
source
resistance, and this is
Ro =
1
gm4
+
RC
=
β4
26
600
+
3.2 100
= 14 (8.116)