MASSACHUSETTS INSTITUTE OF TECHNOLOGY
Department of Electrical Engineering and Computer Science
6.334 Power Electronics
Problem Set 6
Issued: March 31, 2003
Due: April 4, 2003
Reading: KSV Chapter 24, handouts on filter design
Problem 6.1
KSV Problem 8.6
Problem 6.2
Figure 1 shows the schematic of a Full-Bridge Neutral-Point Clamped Inverter. This is a simple example
of a multilevel inverter topology.
a.
Propose a switching pattern for the devices in the neutral-point clamped inverter that takes
advantage of the multilevel capabilities of the NPC inverter and results in an (unfiltered)
output voltage vx(t) having no third, fifth, or even harmonics. How many times does each
active device switch on and off per ac output cycle?
b. How does the total harmonic distortion of the unfiltered waveform vx(t) compare to that of a
conventional inverter using the harmonic elimination scheme of Fig. 8.6(c)?
Problem 6.3
A 50 W buck converter generates a 5 V output from a 10 V input. The switching frequency is 100 kHz,
and the buck inductor operates at a small ripple ratio (less than 5%). The input source supplying the buck
converter has negligible output impedance, but the allowable peak-to-peak current ripple drawn from the
source must be less than 50 mA peak-to-peak.
a. Design an input filter for the buck converter that will meet the allowed input ripple specification.
(The input filter is placed between the converter and the source.) There should be enough
damping such that there is less than 10 dB of peaking in the transfer function from filter input
current (buck converter current) to filter output current (supply current). Furthermore, the output
impedance of the filter should be sufficiently low that the voltage ripple at the input of the buck
converter is less than 75 mV peak-to-peak. (There are also stability considerations associated with
the filter output impedance, but we will neglect these.) Hint: You can make good use of the paper
by Phelps and Tate that was handed out in class!
b. Plot the transfer function magnitude from filter input current to filter output current, and argue
convincingly that the filter will meet the required specifications. (Those who are ambitious may
choose to include a time-domain simulation of the filter performance.)
Problem 6.4
KSV Problem 24.2
Also, plot the device voltage and current during turn-on and turn-off transitions for this case, along with
the switching locus in the V-I plane. Hint: You may assume that the switch voltage still transitions
linearly during the switching process.
Problem 6.5
KSV Problem 24.3
Figure 1 A Neutral-Point Clamped Inverter.