On the possibility to use SiC JFETs in Power Electronic circuits
Björn Ållebrand and Hans-Peter Nee
Division of Electrical Machines and Power Electronics
KTH, Royal Institute of Technology
Teknikringen 33
100 44 STOCKHOLM, SWEDEN
E-mail: bjorn.allebrand@ekc.kth.se
Acknowledgements
The authors wish to thank the following people.
Mikael Östling, Carl-Mikael Zetterling, Thord Nilson, Lars Lindberg, Gunnar Asplund, Bo Danielsson,
Åke Alexandersson, Ingemar Sköld, Waldemar Belnon
Keywords
Silicon Carbide, Converter circuits, Device applications, Emerging technologies, Emerging topologies,
Power semiconductor devices, Soft switching
Abstract
This article describes a proposed bridge circuit without anti-parallel diodes and results from preliminary
computer simulations of the proposed circuit. There is a discussion of the normally-on property of the
JFET and interviews with industry representatives are presented with their opinions on the SiC JFET.
Introduction
background
Silicon is presently the only semiconductor material used in commercially available power devices
(with one exception). Recently a large focus has been on the material silicon carbide (SiC). It has a
larger energy band gap than silicon, making it useful at higher temperatures. Moreover the thermal
conductivity is several times higher than for silicon. The most important advantage of SiC is the high
breakdown electric field, which implies that the voltage drop becomes several times lower than for a
similar silicon device.
At first sight it seems as the MOSFET is the most promising switching device using silicon carbide.
Since the breakdown electric field for SiC is 10 times higher than for Si, the doping density in the drain
drift region can be increased. This means that the drift region can be made shorter and that the resistivity
is decreased. Consequently, the voltage drop for a high-voltage MOSFET will be orders of magnitude
lower than for a corresponding Si MOSFET. There is however a big problem with the manufacturing of
SiO2 -SiC interface [29], and it may take many years before this problem is solved in a way allowing for
mass production of SiC MOSFETS:s.
However, a Junction Field Effect Transistor (JFET) has no SiO2 -SiC interface and could therefore be
available as a commercial power device within a few years. As soon as the prices for SiC substrates
reduce and large area chips without defects appear on the market, a family of 0.5-6 kV JFETs can be
produced. Another significant difference between the JFET and the MOSFET is that the MOSFET is
normally-off, whereas the JFET is normally-on. This means that the JFET conducts if no voltage is
applied to the gate. This may lead to large transient current flows at system power-up. Because of
this feature the power JFET has been dismissed as an undesirable device according to Baliga [1] for
instance. The discussion whether normally-on devices should be used in power electronics or not is not
a new discussion. During the last decades different possible devices in Si have been proposed, and up
to now normally-off devices have been chosen for large-scale use. For the SiC JFET it is perhaps more
wise to discuss whether we could manage without it or not. Having such an opportunity to reduce the
losses, the normally-on problem appears to be secondary at the first glance. According to Mihaila et
al. [25], a 6.5 kV SiC JFET will have a lower voltage drop than a SiC trench MOSFET even though
the JFET is much simpler to manufacture. In order to obtain information on the system aspects of a
normally-on device, a number of interviews with industry representatives has been performed. This,
among other aspects, is investigated in this paper in order to predict the potential use of the SiC JFET
in the future.
Literature study
There are several ways of designing a SiC JFET. Depending on which applications are aimed at or which
specific features are desired, different JFET structures have been developed.
A design by Ivanov et al. [15] was made to show that a 4H-SiC buffer layer could be grown on a 6H-SiC
substrate.
Siemens has made a design presented in several articles ([10], [11], [12], [27]). This design of the SiC
JFET was intended for in a cascode circuit with a low-voltage Si MOSFET. An important feature of this
combination is a constant threshold voltage of approximately 30 V which is independent of the blocking
voltage. However this design gives a comparably high on-state resistance.
The buried-gate JFET is the most prominently featured design in SiC JFET articles.
Kelner et al. have written several articles on the buried-gate design. Davis et al. [9] gave a brief description of the design, while [17] is a comparison between fabricated MESFETs and buried-gate JFETs. In
[18] Kelner describes a buried-gate SiC JFET which has been fabricated and evaluated and in reference
[16] high temperature operation of a buried-gate SiC JFET is treated. In [16] has the gate has a slightly
different placement compared to the design in [17] and [18].
Alok and Baliga [5] present a high-voltage (450 V) 6H-SiC substrate gate JFET. However the big disadvantage with this design, which will make it unsuitable for circuit considerations, is the large threshold
voltage (-400 V).
In [19] Konstantinov et al. presents a buried-gate SiC JFET which can handle blocking voltages up to
600-700 V and achieve drain currents up to 60 mA. Compared to the threshold voltage of -400 V in [5],
this device has a threshold voltage of -40 V.
In [32] and [6] the physics of SiC devices are given a basic review, and a comprehensive analysis of
breakdown mechanisms in 4H-SiC MOSFETs and JFETs are presented in [26].
Breakdown and low-temperature anomalous effects in 6H-SiC JFETs are described in [21] and in [14]
sub-threshold currents in silicon carbide buried-gate JFET are investigated.
An extensive summary of device fabrication is given by Davis et al. in [9]. The fabrication of SiC JFETs
is also described in [5], [15], [17] and [18].
Shenai [37] and Wondrak et al. [42] describe applications in which SiC JFETs can be found in the
future.
SiC JFETs for use in high-temperature applications are described in [7], [8], [13], [16], [23], [28], [30],
[31], [33], [34], [40], [45] and [46], and in [13] the use of SiC JFETs for radio frequency applications
are described.
Despite the tremendous potential for SiC JFETs in power applications, only a low number of papers on
this topic have been published.
Wondrak et al. [41] describe in this article in which voltage areas SiC MOSFETs and SiC JFETs can be
used.
Several articles from Siemens ([10], [11], [12] and [27]) describe how their high-voltage 4H-SiC vertical JFET can be used in a circuit. This circuit is a cascode circuit. The advantages with this circuit
is that the SiC JFET becomes normally-off, and the gate drive circuit is only needed for the MOSFET.
The disadvantage with this circuit is that possibilities of the SiC JFET are not fully utilized. The Si
MOSFET contributes to the on-resistance and the SiC JFET has a threshold voltage of -30V which, is
independent of the blocking voltage. This means that the JFET can be connected in series with a low
voltage MOSFET. The low threshold voltage of the SiC JFET implies that the on-resistance of the SiC
JFET is increased substantially when compared to a design optimised for low on-resistance..
SiC JFETs can operate at very high temperatures and survive very high radiation doses. These characteristics make SiC JFETs potentially the ideal choice for nuclear power applications.
References [24], [22], [23] and [33] and describes how the SiC JFET can be used in radiation applications.
Modelling of SiC JFETs in Spice has been presented by Zappe et al. in [43] and [44]
Modelling of temperature effects of SiC JFETs is described in [20] and [35].
Performance evaluations of SiC JFETs can be found in [12], [36] and [39].
In [32] and [6] the physics of SiC devices are given a basic review, and a comprehensive analysis of
breakdown mechanisms in 4H-SiC MOSFETs and JFETs are presented in [26].
Breakdown and low-temperature anomalous effects in 6H-SiC JFETs are described in [21] and in [14]
sub-threshold currents in silicon carbide buried-gate JFET are investigated.
Proposed device and circuit operation
A SiC JFET for use in power electronics puts new demands on the normally used circuits. In most
circuits there is a power diode anti-parallel with the switch. This power diode becomes a weak link in
combination with SiC JFETs. Replacing the Si diode with a SiC diode is no improvement due to the
high voltage drop of a SiC diode [47]. The SiC diode is therefore only interesting at the highest voltage
levels. A solution to this problem for all other voltages is to remove the anti-parallel diode and to use
the SiC JFET function to conduct current in both directions. A circuit for a simple chopper utilizing
this solution is found in figure 1, where Lσ (Lsigma) is the stray inductance of the circuit, Q1 and Q2
are SiC JFETs, C1 and C2 are capacitances. These capacitances could be external capacitances or just
stray capacitances of the JFETs.
To get an understanding of how this circuit works, the turn-on and turn-off of the JFET are studied.
When Q1 is turned off, Q2 will not be turned on. Instead the current in L σ commutate through the
capacitor C1. This will means that the current through Lσ decreases and the voltage across C1 will rise
and the voltage across C2 will decrease. When the current through L σ has nearly reached zero, Q2 will
is turned on. This results in a soft turn-off for Q1 and a soft turn.on for Q2. Note that Q2 operates as an
Lsigma
1
2
Q1
V1
C1
V2
Q2
Iload
C2
V3
Fig. 1: Circuit utilizing JFETs with no anti-parallel diodes
anti-parallel diode in this case. When Q1 is turned on again it is turned on just a short time before Q2 is
turned off. This gives rise to a short-circuit with the aim of increasing the current through L σ from zero
to the load current, Iload . Consequently Q1 will have a hard turn-on but the the turn-off for Q2 will be
soft according to [38]. See figure 2 for voltage and current waveforms from the circuit. As can be seen
from the figure, the turn-on for Q1 must be improved substantially in order to minimize the oscillations.
This work is currently being carried out and will be presented in a close future. However since SiCswitches have lower losses than Si-switches, the tendency to oscillate will always be significant. It is in
the opinion of the authors that this problem can be reduced by means of an adequate gate-drive strategy.
300
Voltage
250
Voltage/Current
200
150
Current
100
50
0
−50
1.2
1.25
1.3
Time
1.35
−4
x 10
Fig. 2: Voltage and current waveforms from the suggested JFET circuit, Vd=200V, I o =100A
Interviews with industry representatives with different perspectives
HVDC and SVC perspective
A SiC JFET will be a welcome addition due to the low losses compared to Si power devices today. This
will reduce the size of the cooling system and electrolytic capacitors which is a large part of the HVDC
and SVC converters today. The normally on feature is a problem, but small compared to the advantages
of the SiC JFET. In applications where series connected power devices are used, normally-on devices
will not be a big problem. The drive circuits must be very advanced for series connected power devices
anyway. The normally-on problem could be solved in several ways. One way is to turn on the voltage
to the gate circuit before the DC link is charged. A better way would be to feed the gate circuit with a
separate voltage. Another alternative could be to supply standby-power by means of light, i.e. with the
on/off signal. Such a solution would provide a redundancy since two supplies will necessary.
Industrial drives perspective
from an industrial drives perspective, economy is the most important aspect. As for HVDC, the cooling
is important, and substantial savings can be made due to low losses of a SiC switch. A SiC JFET chip
will however probably cost three times more than for a similar device in silicon. This cost increase will
not matter very much if the cost of the power devices is a minor part of the total cost,as for instance
in large drives in the range of 100 kW and upwards. However, for smaller drives the increase in cost
of the switches can make it unacceptable to use SiC JFETs. Also the drive circuit for the SiC JFET
may be more expensive than a drive circuit for a normally-off device. If the cooling is the dominant
factor for an industrial drive then the SiC JFET is very interesting. Another important aspect is the
inherent overcurrent capability of a SiC-switch. The high-temperature capability can be used in this
way, together with the high thermal conductivity.
Electric traction perspective
For power electronics in traction applications the critical aspect is the volume, because the converters
are to be placed under the floor and the smaller the volume are, the better it fits. Here the SiC JFET will
be a welcome addition. Due to the low losses, the need for coolers is nearly eliminated, which means
much less space is occupied by the converters. Moreover the JFET can be used for higher switching
frequencies, which means that passive components can be smaller. An important point brought forward
during the interview is standardisation and modulisation of the proposed SiC JFET. In what way will
the SiC JFET be packaged? Will it be in twin packs with additional capacitances and will this become
a standard? If this is the case it is alright but otherwise the non-standardisation may become a problem. For the normally-on problem the answer was that the manufacturer has complete control over the
power electronics, and normally-on components would therefore not be a problem. Increased gate-drive
complexity is certainly a drawback, but the low losses of a SiC JFET are still dominating the positive
judgement.
Benefits and drawbacks
There are several benefits and drawbacks of using a SiC JFET. These will be described in this section.
Benefits
The primary benefit is the low voltage drop and high switching speed. Another important benefit is
that no anti-parallel diodes are necessary, which means that the complexity is reduced and that the
reverse recovery problem is solved permanently. A good summary can also be found in [2]. Interesting
theoretical comparisons between SiC and Si Power devices can be found in [3] and [4].
Drawbacks
There are several drawbacks using a SiC JFET. These drawbacks are described in this section.
Increased complexity of the gate drive circuit
Due to the the normally-on property of the JFET there will be an increased complexity of the gate drive
circuit.
A property of the JFETs is that a negative voltage is required to turn it off and also a SiC JFET will
require larger gate power compared to a MOSFET. Both these things will complicate the design of the
gate drive circuit.
To avoid large transient current flows at power-up, the gate drive circuit has to be modified compared to
a MOSFET gate drive circuit.
A way of avoiding the normally on feature at system power-up is to use a control voltage from the DClink. First the DC-link is power-up, than the drive circuits is turned on and last the converter is switched
on. This is no additional complication for large drives but for small drives there is a complication due
to additional costs for the switch. In some drives there is no connection to the DC-link making this
solution impossible.
One way of avoiding problems at system power-up is a separate control voltage for the drive circuits.
This voltage is turned on before system power-up therefore avoiding the normally on problem. However,
this solution requires some kind of supervision of the separate control voltage, so if the separate control
voltage disappears the main power supply can be shut down. This supervision can be done in several
ways. One way is to use light as an information carrier. This can be done by using a rogowski coil
to measure if there are any current/voltage and then a light emitting diode to create light which is
then transferred by opto cable to a super visionary circuit, which can break the main power supply if
problems occur. This super visionary circuit would be important for HVDC or other applications where
it is important that a short circuit never happens. However this solution leads to a more complicate gate
drive circuit.
Over voltages due to fast switchings and negative voltages
Due to the fast switching frequency used in the circuit this will lead to high over voltages. Due to the
SiC JFET is used as a diode, negative voltages will appear across this JFET during switching.
Capacitive charging currents at turn-on
Due to the proposed circuit there will be capacitive charging currents at turn-on. These currents will
lead to additional losses. But a circuit with anti-parallel diodes which reverse recovery, will give losses
and put a limit on the switching frequency of the circuit. Comparing these losses to the losses due
to capacitive charging currents, the DJIB circuit will have lower losses due to having no diodes with
reverse recovery. The capacitive charging currents at turn-on will not be a problem.
EMI/EMC
Due to fast switchings there may be a problem with electro magnetic interference (EMI) and electro
magnetic compability (EMC). Looking at figure 2 it can be seen that the current and voltage are rippling
a lot. The frequency of the over currents and over voltages can be calculated from the circuit shown in
figure 1. This frequency, fe , is proportional to the square-root of the stray inductance times the auxiliary
capacitance as shown i equation 1.
1
fe = √
(1)
2π LC
Comparison between proportional theoretical frequency and the frequency measured in PSpice gives the
same result. Some conclusions can be drawn from equation 1. The lower the values of the inductance
and the capacitor the higher the frequency of the over voltages and over currents becomes.
Conclusion
A new diodeless circuit using SiC JFETs has been propsed and its benefits and drawbacks have been
discussed. Interviews with industry representatives with different perspectives have been presented, and
their opinions of the SiC JFET converters are summarized.
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