Reconfigurable all-optical logic gate based on a single SOA
with improved dynamics
Gianluca Berrettini and Antonio Malacarne
CEIRC - Scuola Superiore Sant'Anna - Via Moruzzi 1, 56124 Pisa - Italy
gianluca.berettini@cnit.it
Paolo Ghelfi, Antonella Bogoni and Luca Potì
CNIT - Photonic Networks National Laboratory - Via Moruzzi 1, 56124 Pisa - Italy
Abstract: A simple, compact, ultra-fast, reconfigurable photonic logic gate is demonstrated
exploiting Four-Wave-Mixing and Cross-Gain-Modulation in a single Semiconductor-OpticalAmplifier with improved dynamics. Bit-Error-Rate measurements are reported for XNOR, AND,
NOR, and NOT logic functions.
©2006 Optical Society of America
OCIS codes: (200.4660) Optical logic; (230.1150) All-optical devices
1. Introduction
The development of all-optical technologies is fundamental to develop future telecommunication networks, where
all the node functionalities should be carried out in the optical domain. The all-optical realization of functions such
as add-drop multiplexing, packet synchronization, clock recovery, address recognition, signal regeneration is
essential to avoid optoelectronic conversions, that could be the bottleneck toward broadband and flexible networks.
All-optical logic gates are key elements in the realization of such functionalities. In literature some schemes of
all-optical logic gates have been reported, exploiting nonlinear effects in optical fibers [1], in semiconductor devices
[2] or in waveguides [3]. In particular, Semiconductor Optical Amplifiers (SOAs) are very attractive nonlinear
devices, since they can exhibit both a strong change of the refractive index and a high gain in the optical power.
Moreover, differently from fiber devices, SOAs are promising for photonic integration. In order to improve the
efficiency and the dynamics of the nonlinear effects, the SOA-based logic gates are generally realized exploiting
interferometric structures [4] that need accurate control and stabilization.
In this paper we propose a simple scheme to realize a reconfigurable logic gate, exploiting simultaneously Four
Wave Mixing (FWM) and Cross Gain Modulation (XGM) [5] in a non-interferometric structure based on a single
SOA. The same scheme allows to implement XNOR, AND, NOR, and NOT logic gates. A counter-propagating
Continuous Wave (CW) pump is introduced to improve the dynamic behavior of the SOA, thus avoiding pattern
effects and allowing ultra-fast signal processing. Bit Error Rate (BER) measurements at 10 Gbps demonstrate the
high performance of the reconfigurable logic gate and confirm its suitability in long cascaded configurations.
2. SOA-based reconfigurable logic gate
The working principle of the proposed all-optical logic gate can be well described considering the realization of the
XNOR function (Fig. 1), which fully exploits the potential of the proposed scheme. A and B are the signals that have
to be processed, whose wavelengths are λA and λB respectively. The XNOR logic function is obtained exploiting
simultaneously FWM between the two polarization-aligned signals A and B, and XGM on a co-propagating probe
signal, whose wavelength must be the same as the generated FWM term (λprobe=λFWM). In order to avoid phase
interference between probe and FWM component, the probe channel is launched into the SOA with orthogonal
polarization with respect to the signals and to the FWM term. The power of signals A and B must be high enough to
saturate the device and to generate a strong FWM component, while the probe power must be low enough to avoid
SOA saturation.
Input signals
probe
Optical
filter
x
chA chB
FWM
XGM
y
Case XOR
XGM
y
x
y
Logic Gate
11
1
01
0
A
10
0
B
00
1
x
λA
λprobe=λFWM
λB
XGM
λ
x
x
y
y
Fig. 1. Working principle of the XNOR gate.
SOA
Tunable
Probe
BPF
λProbe ≠ λFWM
NOR
NOT
BPF
λProbe = λFWM
XOR
AND
NOT
CW Pump
λ
Fig. 2. Scheme of the reconfigurable logic gate.
When both signals are present into the SOA (case 11), the FWM component arises and at the same time the
probe channel experiences a very low gain into the saturated device due to XGM. At the output of the SOA an
optical filter centered at λprobe=λFWM can isolate the FWM term, so that the logic output is at the high level. In case
both signals A and B are absent (case 00), the FWM effect does not take place and the SOA is not saturated.
Therefore, the probe channel experiences a strong amplification, and at the filter output a high power level is
present. By opportunely setting the input power of the probe channel, the output power in the cases 11 and 00 can be
equalized. On the other hand, if only one of the signals A or B is present (cases 10 and 01), the FWM does not occur
but the SOA is saturated, thus drastically reducing the gain of the probe. In these cases at the output of the optical
filter the power level is low.
In Fig. 2 the scheme of the reconfigurable SOA-based logic gate is shown. The SOA output is split in two
optical paths where two different filters are used, so that the proposed scheme can be exploited to realize the XNOR,
AND, NOR and NOT logic functions, keeping the same input conditions for the signals A and B. In particular, when
the probe wavelength is set equal to the FWM component and orthogonally polarized with respect to signals A and
B, the XNOR function is obtained exploiting FWM and XGM at the same time, as described above. If the probe
channel is turned off, the output of the optical filter centered at λFWM represents a FWM-based AND logic function.
Changing the wavelength of the probe channel so that λprobe≠λFWM, the NOR function can be extracted using an
optical band pass filter centered at λprobe. In this case, the NOR gate is based on XGM in the SOA. Finally, the NOT
function can be obtained from each gate outputs, considering only one input signal and exploiting XGM on the
probe channel. Therefore the simple and integrable scheme reported in Fig. 2, including two different filters at the
output of the SOA (or one single tunable filter), can be easily reconfigured to obtain different logic gates, just
controlling the wavelength of the probe channel or turning it off. The proposed scheme is able to process both NonReturn-to-Zero (NRZ) and Return-to-Zero (RZ) signals. In the first case the probe can be a CW light, whereas in the
second case it must be a pulsed clock synchronized with signals A and B. In order to suppress pattern dependent
signal distortions, a counter-propagating high-power CW pump has been launched into the device, reducing the
mean lifetime of the carriers and keeping an optimum saturation level in the SOA [6].
3. Experimental results
In Fig. 3 the experimental setup used for the implementation of the reconfigurable all-optical logic gate is shown.
BPG
ODL
ML
MZ
Super
Continuum
λA
BPF
A
W EDFA
G λB
BPF
BPF
EDFA
ODL
SOA
EDFA
λProbe
BPF
CW
Pump
λProbe=λFWM
BPF
XOR, AND,NOT
NOR, NOT
BPF
λProbe≠λFWM
Fig. 3. Experimental setup of the reconfigurable logic gate. ML=Mode-locked Laser pulse source, ODL=Optical Delay Line,
MZ=Mach Zehnder e-o modulator, BPG=Bit Pattern Generator, AWG=Array Waveguide Grating, EDFA=Erbium Doped Fiber
Amplifier, BPF=Band Pass Filter, CW=Continuous Wave laser.
An active fiber Mode-locked Laser (ML) generating 4ps-wide pulses at 10GHz has been used to produce both
signals and probe channels by means of supercontinuum generation through 500m of Highly Non-Linear Fiber
(HNLF). In particular the 20ps-wide pulsed signals and probe have been obtained filtering the supercontinuum
spectrum at λA=1550.9nm, λB=1552.5nm, and λprobe=1549.3nm=λFWM or λprobe=1546.1nm≠λFWM. The wavelength of
the counter-propagating CW pump has been fixed at 1544nm. The exploited SOA is a commercial polarizationindependent device, with a 1mm-long active region, 31dB small signal gain at 1547nm, and 13dBm saturated output
power. The input average power has been set to 3dBm and 10dBm for signals and pump respectively. On the other
hand the probe has been launched into the SOA with a mean power of -15dBm, so that the output power in the case
00 was -13dBm, equalized to the generated FWM component in the case 11. Signals A and B have been aligned in
polarization at the input of the SOA, while the probe polarization has been rotated 90 degrees.
Gain Recovery Time
Ch A
XOR
AND
Photoreceived am plitude [a.u.]
a)
Photoreceived amplitude [a.u.]
Ch A
Ch B
Normalized Power (dB)
7
Ch B
b)
XOR
6
5
4
3
2
Without pump
With pump
1
0
20
40
60
80
100
120
Time (ps)
1
AND
BtoB chA
BtoB chB
AND
XOR
NOT
NOR
0,01
1E-4
c)
BER
NOR
NOR
1E-6
1E-8
NOT A
NOT A
Time [100 ps/Div]
Time [20 ps/Div]
1E-10
1E-12
-11
-10
-9
-8
-7
-6
-5
-4
Received peak power (dBm)
Fig. 4. a) Left: sequences of the input signals and of the corresponding logic gate output. Right: eye-diagram of the input
signals and of the corresponding logic gate output. The small fluctuations of the pulse power in the case of high output
level are due to a not perfectly equalized input power. b) Gain recovery time of the SOA with and without the injection
of the counter-propagating pump. c) BER of the signals A and B back-to-back (BtoB), and of the reconfigurable logic
gate outputs.
In order to demonstrate the effectiveness of the proposed scheme, we have considered two particular bit
sequences for signals A and B, so that all possible cases were considered, as shown in Fig. 4-a) (left). The
corresponding output functions are also reported, using the scheme as XNOR, AND, NOR and NOT logic gate
respectively. Fig. 4-a) (right) reports the eye diagrams at the input and at the output of each logic port when PseudoRandom Bit Sequences (PRBSs) (231-1)-long are used at the input of the logic gate. The high quality of the eye
diagrams, free from pattern effects, demonstrates the effectiveness of the proposed reconfigurable logic gate. The
gain recovery dynamics of the SOA are reported in Fig. 4-b), obtained through a pump-probe measurement with and
without the counter-propagating CW pump. The slow dynamics due to carrier lifetime are strongly suppressed by
the injected pump, while the fast intra-band dynamics remains unchanged. The gain recovery time, measured at 1/e
of the dynamic range, is reduced from 21ps to <1ps, making the scheme suitable for ultra-fast applications. Finally,
Fig. 4-c) shows the BER curves at the output of each logic port, as a function of the pulse peak power. It can be
noticed that the introduced penalty at BER=10-9 is lower than 0.5dB with respect to the worst input signal, making
the proposed scheme suitable for cascaded configurations. Moreover the AND logic gate presents regenerative
behavior (negative power penalty) due to the SOA saturation effect that compresses the noise on the high level.
4. Conclusions
In conclusion, an ultra-fast reconfigurable all-optical logic gate based on simultaneous XGM and FWM effect in a
single SOA has been implemented using a simple, compact, integrable scheme. The proposed gate can produce
XNOR, AND, NOR, and NOT logic functions. The use of a counter-propagating CW pump has allowed to improve
the dynamics of the SOA, avoiding pattern effects and making the scheme suitable for high bit rates. Moreover,
BER measurements using 20ps-wide pulsed signals at 10Gbps have shown a penalty lower than 0.5dB for each logic
function, demonstrating the suitability of the scheme for cascaded configurations.
References
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79-81, 2003.
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