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EE 220/220L Circuits I
Final Examination Review Topics
 This is NOT a complete list. Use as a starting point.
Chapter 1 Basic Concepts
 Units & prefixes:
Prefix
Symbol
Multiplier
example
12
2 THz = 2 × 1012 Hz
Tera-
T
10
Giga-
G
109
2.4 GHz = 2.4 × 109 Hz
Mega-
M
106
101.9 MHz = 101.9 × 106 Hz
kilo-
k
103
1340 kHz = 1340 × 103 Hz
centi-
c
10-2
10 cm = 10 × 10-2 m
milli-
m
10-3
90 mH = 90 × 10-3 mH
micro-

10-6
47 F = 47 × 10-6 F
nano-
n
10-9
100 nH = 100 × 10-9 nH
pico-
p
10-12
150 pF = 150 × 10-12 F

Charge q   i dt (C)

Current i = dq/dt (A)

Voltage vab = dw/dq (V)

Work: w   p dt (J)

Power p = dw/dt = dw/dq dq/dt = v i (W)

Conservation of power :
 p0
circuit

Passive sign convention for power absorbed (see below)- p > 0  element absorbs power and
if p < 0  element supplies power
i
i
+
+
v
-
v
-
p = v (i )
Chapter 2 Basic Laws
 Ohm’s Law: v = i R
or
i
p = - (v )(i )
I
i=vG
R or G
Power & resistors: p = v i = i2 R = v2 /R = i2 /G = v2 G

branches (b), nodes (n), & meshes/independent loops (l): b = l + n - 1

Kirchoff’s Current Law (KCL) :
i
entering
 0 or
node

Kirchoff’s Voltage Law (KVL):
i
leaving
node
v
drops
-
+ V

 0 or
i
entering
node
  ileaving
node
0
loop
EE220 Circuits I
Dr. Thomas P. Montoya
ee220_final_review.doc
12/9/2015

2/7
Series resistors & voltage division: Req ,Series   Rn

Parallel resistors & current division: Req ,Parallel

Wye  Delta transformations
&
vn  v
1 1
  
 R1 R2
1 

RN 
Rn
Req , S
1
in  i
&
 Y
Rc
a
R1
b
R2
Rb
R3
Ra
c
Req , P
Rn
i
Gn
Geq , P
Y 
R1 
Rb Rc
Ra  Rb  Rc
Ra 
R1R2  R2 R3  R1R3
R1
R2 
Ra Rc
Ra  Rb  Rc
Rb 
R1R2  R2 R3  R1R3
R2
R3 
Ra Rb
Ra  Rb  Rc
Rc 
R1R2  R2 R3  R1R3
R3
Balanced   Y
Balanced Y  
When Ra  Rb  Rc  R ,
When R1  R2  R3  RY ,
RY  R 3
R  3RY
Chapter 3 Methods of Analysis
 Nodal Analysis
1) Designate reference node and label all other node voltages (e.g., V1, V2, …).
2) Apply KCL to all non-reference nodes, putting currents through resistors in terms of node
voltages using Ohm’s Law. Know how to deal with voltage sources (Case 1- Vnode = ±VS or
Case 2- auxiliary & supernode equations). Express dependent sources in terms of node
voltages.
3) Solve resulting set of equations for node voltages.

Mesh Analysis
1) Select direction and label all mesh currents (e.g., I1, I2, …).
2) Apply KVL around meshes, putting voltage drops across resistors in terms of mesh currents
using Ohm’s Law. Know how to deal with current sources (Case 1- Imesh = ±IS or Case 2auxiliary & supermesh equations). Express dependent sources in terms of mesh currents.
3) Solve resulting set of equations for mesh currents.

DC npn bipolar junction transistor (BJT )
IC
IB B
+
VBE
C
C
IC = IB
+
VBE
-
- E
circuit symbol
EE220 Circuits I
B IB
E
equivalent circuit model
Dr. Thomas P. Montoya
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Chapter 4 Circuit Theorems
 Superposition Principle
1) Set all independent sources to zero except one, i.e., VS = 0 (short) and IS = 0 (open). Leave
dependent sources in circuit. Determine contributions to current(s) &/or voltage(s) of
interest by this source using technique(s) of choice.
2) Repeat step 1) for all remaining independent sources.
3) Determine overall current(s) &/or voltage(s) by adding up contributions due to each of the
individual independent sources.
IS = VS /R
VS = IS R
R
↔

Source transformation

Thevenin’s and Norton’s Theorems. A linear two-terminal circuit can be replaced by a
Thevenin or Norton equivalent circuit. The Thevenin voltage VT is equal to the open circuit
voltage at the terminals. The Norton current IN is equal to the short circuit current between the
terminals. The Thevenin RT and Norton RN resistances are the equivalent resistances at the
terminals with independent sources turned off. Note: RT = RN = VT / IN = voc / isc
-
+
R
RT
Linear
2-terminal
circuit
a
+
voc
-
VT +-
b
a
Linear
2-terminal
circuit
a
Linear 2-term.
circuit w/ indep.
sources set to
zero
a
b
Req
Thevenin equivalent circuit
a
b
isc
IN
RN
b
b
Norton equivalent circuit

Maximum power transfer to load occurs when RL = RT (when using Thevenin equivalent
circuit), or RL = RN (when using Norton equivalent circuit)
RT
+
VT -
EE220 Circuits I
IL
IL
+
+
VL
-
RL = RT
Dr. Thomas P. Montoya
IN
RN
VL
-
RL = RN
ee220_final_review.doc
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Chapter 5 Operational Amplifiers
v1 - vd
v2 + +
v1
io
-
Ro
vd R
i
vo
+
v2
v1
- vd
vo
i2
non-ideal equivalent circuit model
io
vo
+ +
v2
io
+ Av
d
-
circuit symbol
i1
i1 = i2 = 0
vd = v2 - v1 = 0
ideal circuit model
 Non-ideal op-amp equivalent circuit model where Ri is input resistance, Ro is output resistance,
and A is open-loop voltage gain
 Know ideal op-amp circuit analysis both with single and multiple op-amps
 Know inverting, non-inverting, voltage follower, summing, difference, and instrumentation
amplifier circuits.
Chapter 6 Capacitors and Inductors
 Capacitor: q = Cv , i
dv
, v (t )
C
dt
1
C
1
C
t
i(t ) dt
1 2
Cv
2
t
v(t0 ) , w
i(t ) dt
t0
 Capacitor properties:
1) Key parameters- capacitance C in Farads (F) & rated voltage
q2
2C
C
i
+q -q
2) Open circuit at DC, i.e., i =0, v = ?.
+ v -
3) Voltage cannot change abruptly, but current can change quickly.
4) Ideal capacitors do not dissipate energy.
5) Parallel capacitors Ceq,parallel = C1 + C2 + … + CN .
1
C1
6) Series capacitors Ceq, series
 Inductor: v
L
di
, i (t )
dt
1
L
1
C2
1
L
t
v(t ) dt
1
CN
...
1
& voltage division vn
t
v(t ) dt
i (t0 ) , w
t0
1 2
Li
2
 Inductor properties:
1) Key parameters- inductance L in Henries (H) & rated current
v
i
Ceq, series
Cn
.
L
+ v
-
2) Short circuit at DC, i.e., v =0, i = ?.
3) Current cannot change abruptly.
4) Voltage can change quickly.
5) Ideal inductors do not dissipate energy.
6) Series inductor s Leq,series = L1 + L2 + … + LN .
7) Parallel inductors Leq, parallel
EE220 Circuits I
1
L1
1
L2
...
1
LN
Dr. Thomas P. Montoya
1
& current division in
i
Leq, parallel
Ln
.
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Chapter 7 First-Order Circuits
 Source-free RC circuit analysis: v(t ) V0 e t / t 0 where V0 is the initial voltage across the
capacitor and time constant  = RC. R is equivalent resistance ‘seen’ by C.
 Source-free RL circuit analysis: i(t ) I 0 e t / t 0 where I0 is the initial current through the
inductor and time constant  = L/R. R is equivalent resistance ‘seen’ by L.
 Step response RC circuit analysis: v(t )
VSS
V0
V0 VSS e
I SS
I0
I 0 I SS e
t/
t
t
0
where VSS = v(∞) is the
0
t
t
0
where ISS = i(∞) is the
0
steady-state voltage across the capacitor.
 Step response RL circuit analysis: i(t )
t/
steady-state current through the inductor.
 Singularity/switching functions. In particular, unit step function u(t )
0 t
1 t
0
.
0
Chapter 8 Second-Order Circuits
 Know how to determine initial & final conditions
 Source-free series RLC circuits: characteristic equation s2
 Source-free parallel RLC circuits: characteristic equation s2
R
s
L
1
LC
1
s
RC
0
1
LC
0
 Three solution forms for currents/voltages depending on roots of characteristic equation:
A1 e s1 t A2 e s2 t
overdamped (s1 & s2 are real, negative, & unequal)
A2 A1 t e t critically-damped (s1 s2
are real, negative, & equal)
t
e
A1 cos( d t ) A2 sin( d t ) underdamped (s1/2
j d are complex)
x (t )
 Step response parallel & series RLC circuits: current/voltage solution x(t) consists of a forced
response xf (t) = xSS = x(∞) (circuit at steady-state w/ source on) plus a natural response xn (t)
(circuit w/ sources set to 0)
x (t )
x f (t )
xn ( t )
xSS
xSS A1 e s1 t A2 e s2 t
overdamped
t
xSS
A2 A1 t e
critically-damped
t
e
A1 cos( d t ) A2 sin( d t ) underdamped
 General second-order circuits (not included in final)
Chapter 9 Sinusoids and Phasors
) X m sin( t
) - know what each of the components
 Sinusoids x(t ) X m cos( t
represents (e.g.,   2 f  2 / T ) and how to convert from sin() form to cos() form
 Phasors X X m - complex number based on cos() form of sinusoid. Phasors allow for
steady-state linear AC circuit analysis w/out need for difficult trigonometric identities.
EE220 Circuits I
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 Phasor/frequency domain X
↔ time-domain x(t )  Re X e j t   X m cos( t   ) ,
Xm
using Euler’s identity e j A  cos( A)  j sin( A)
1
j
, & Z L  j L

j C  C
1
1
j
 Admittance Y (S) for R, L, & C: YR   G , YC  j C , & YL 

R
j L  L
 Impedance Z () for R, L, & C: Z R  R , ZC 
 Phasor Ohm’s Law V  I Z or I  V Y
 Series equivalent impedances Zeq,S  Z1  Z 2
 Parallel equivalent impedances Z eq , P
 Z N & voltage division Vn  V
1
1
 
 Z1 Z 2
1 


ZN 
Zn
Z eq , S
1
Z eq , P
& current division I n  I
Zn
 Wye↔Delta impedance transformations
 Y
a
Z1
Z2
Zb
Za
Z3
c

b
Zc
Y 
Z1 
Zb Zc
Za  Zb  Zc
Za 
Z1Z 2  Z 2 Z 3  Z1Z 3
Z1
Z2 
Za Zc
Za  Zb  Zc
Zb 
Z1Z 2  Z 2 Z 3  Z1Z 3
Z2
Z3 
Za Zb
Za  Zb  Zc
Zc 
Z1Z 2  Z 2 Z 3  Z1Z 3
Z3
Balanced   Y
Balanced Y  
When Za  Zb  Zc  Z  ,
When Z1  Z2  Z3  Z Y ,
ZY  Z 3
Z   3Z Y
Kirchoff’s Current Law (KCL) in phasor domain:
I
in
 0,
node

Kirchoff’s Voltage Law (KVL) in phasor domain:
I
node
V
drops
out
 0 , or
I
in
  I out
node
node
0
loop
Chapter 10 Sinusoidal Steady-State Analysis
 Nodal Analysis w/ phasors- same process/procedure as for DC circuits (see Chapter 3)

Mesh Analysis w/ phasors- same process/procedure as for DC circuits (see Chapter 3)

Superposition Theorem - nearly same process/procedure as for DC circuits (see Chapter 4) with
caveat that all results found using phasors must be converted back into time-domain before
adding them up.

Source Transformation w/ phasors- same process/procedure as for DC circuits (see Chapter 4)

Thevenin and Norton Equivalent Circuits w/ phasors- same process/procedure as for DC
circuits (see Chapter 4)
EE220 Circuits I
Dr. Thomas P. Montoya
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Chapter 11 AC Power Analysis

Instantaneous Power p(t) = v(t) i(t) (W)

Effective/RMS values: X RMS 
1
T
t0 T
  x (t ) 
2
dt .
For a sinusoidal current or voltage
t0
x(t )  X m cos( t + )  X RMS  X m / 2

1
T
Time-average real power Pave
T
p(t ) dt (W) in general.
For sinusoidal steady-state
0
circuits:
Pave
0.5Vm I m cos(
0.5Re[V I *]
V
I
Vrms I rms cos(
V
I
)
*
Re[Vrms I rms
]
2
0.5 I Re Z

)
2
I rms
Re Z (W)
Maximum average power transfer occurs when Z L
ZT* where ZT is the Thevenin impedance
of the source

Apparent power S = Vrms Irms = 0.5 Vm Im (VA)

Power factor pf = Pave / S = cos(V - I) = cos(z) = cos(S) leading if z < 0 & lagging if z > 0

Complex power  S
S
s
Pave
jQ
*
(VA) where Pave  time-average
0.5 V I * Vrms I rms
real power = Re S (W) and Q  reactive power = Im S (VAR)

Power triangle
Resistive-inductive load
(lagging pf )
Resistive-inductive load
(leading pf )
Im
Im
S
S
Pave
S
Q>0
S
Re
Q<0
Re

Conservation of AC power

Power factor correction (not included in final)
EE220 Circuits I
Pave
Ssupplied
Sabsorbed
Dr. Thomas P. Montoya
ee220_final_review.doc