AD8560 16 V Rail-to-Rail Buffer Amplifier Data Sheet (REV. 0)

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a
IN A
1
IN B
2
9
OUT B
IN C
3
8
OUT C
IN D
4
7
OUT D
IN E
5
6
OUT E
GND
16-Lead LFCSP
(CP Suffix)
PIN 1
INDICATOR
IN A 1
IN B 2
IN C 3
IN D 4
AD8560
TOP VIEW
IN E 5
The AD8560 is specified over the –40°C to +85°C temperature
range. They are available on tape and reel in a 16-lead LFCSP.
16 V+
The AD8560 is a low cost, five-channel, single-supply buffer
amplifier with rail-to-rail input and output capability. The AD8560
is optimized for LCD monitor applications.
These LCD buffers have high slew rates, a 35 mA continuous
output drive, and high capacitive load drive capability. They have
wide supply range and offset voltages below 10 mV.
10 OUT A
12 OUT A
11 OUT B
10 OUT C
9 OUT D
OUT E 8
GENERAL DESCRIPTION
V+
15 NC
14 NC
13 GND
APPLICATIONS
LCD Reference Drivers
Portable Electronics
Communications Equipment
BLOCK DIAGRAM
NC 6
NC 7
FEATURES
Single-Supply Operation: 4.5 V to 16 V
Dual-Supply Capability from ⴞ2.25 V to ⴞ8 V
Input Capability Beyond the Rails
Rail-to-Rail Output Swing
Continuous Output Current: 35 mA
Peak Output Current: 250 mA
Offset Voltage: 10 mV Max
Slew Rate: 8 V/␮s
Stable with 1 ␮F Loads
Supply Current
16 V Rail-to-Rail
Buffer Amplifier
AD8560
NC = NO CONNECT
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2002
AD8560–SPECIFICATIONS
ELECTRICAL CHARACTERISTICS (4.5 V ≤ V ≤ 16 V, V
S
CM
= VS/2, TA = 25C, unless otherwise noted.)
Parameter
Symbol
Conditions
INPUT CHARACTERISTICS
Offset Voltage
Offset Voltage Drift
Input Bias Current
VOS
∆VOS/∆T
IB
–40°C ≤ TA ≤ +85°C
Input Voltage Range
Input Impedance
Input Capacitance
OUTPUT CHARACTERISTICS
Output Voltage High
Output Voltage Low
Continuous Output Current
Peak Output Current
TRANSFER CHARACTERISTICS
Gain
Gain Linearity
POWER SUPPLY
Supply Voltage
Power Supply Rejection Ratio
Supply Current/Amplifier
DYNAMIC PERFORMANCE
Slew Rate
Bandwidth
Phase Margin
Channel Separation
NOISE PERFORMANCE
Voltage Noise Density
Current Noise Density
Min
Typ
Max
Unit
2
5
80
10
mV
µV/°C
nA
nA
V
kΩ
pF
–40°C ≤ TA ≤ +85°C
–0.5
400
1
ZIN
CIN
VOH
VOL
IOUT
IPK
AVCL
NL
VS
PSRR
ISY
600
800
VS + 0.5
IL = 100 µA
VS = 16 V, IL = 5 mA
–40°C ≤ TA ≤ +85°C
VS = 4.5 V, IL = 5 mA
–40°C ≤ TA ≤ +85°C
IL = 100 µA
VS = 16 V, IL = 5 mA
–40°C ≤ TA ≤ +85°C
VS = 4.5 V, IL = 5 mA
–40°C ≤ TA ≤ +85°C
15.85
15.75
4.2
4.1
VS – 0.005
15.95
4.38
5
42
95
150
250
300
400
35
250
VS = 16 V
RL = 2 kΩ
–40°C ≤ TA ≤ +85°C
RL = 2 kΩ, VO = 0.5 to (VS – 0.5 V)
0.995
0.995
0.9985
0.9980
0.01
4.5
VS = 4 V to 17 V
–40°C ≤ TA ≤ +85°C
VO = VS/2, No Load
–40°C ≤ TA ≤ +85°C
SR
BW
Øo
RL = 10 kΩ, CL = 200 pF
–3 dB, RL = 10 kΩ, CL = 10 pF
RL = 10 kΩ, CL = 10 pF
en
en
in
f = 1 kHz
f = 10 kHz
f = 10 kHz
70
4.5
90
780
V
V
V
V
V
mV
mV
mV
mV
mV
mA
mA
1.005
1.005
V/V
V/V
%
16
V
1,000
1,200
dB
µA
µA
8
8
65
75
V/µs
MHz
Degrees
dB
27
25
0.8
nV/√Hz
nV/√Hz
pA/√Hz
Specifications subject to change without notice.
–2–
REV. 0
AD8560
ABSOLUTE MAXIMUM RATINGS*
Supply Voltage (VS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . –0.5 V to VS + 0.5 V
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . VS
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Operating Temperature Range . . . . . . . . . . . –40°C to +85°C
Junction Temperature Range . . . . . . . . . . . . –65°C to +150°C
Lead Temperature Range (Soldering, 60 sec) . . . . . . . . 300°C
ESD Tolerance (HBM) . . . . . . . . . . . . . . . . . . . . . . . . . 1.5 kV
ESD Tolerance (CDM) . . . . . . . . . . . . . . . . . . . . . . . . . . 1 kV
Package Type
JA1
16-Lead LFCSP (CP)
35
JC
JB2
Unit
13
°C/W
NOTES
1
θJA is specified for worst-case conditions, i.e., θJA is specified for device soldered
onto a circuit board for surface-mount packages.
2
⌿JB is applied for calculating the junction temperature by reference to the board
temperature.
*Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
ORDERING GUIDE
Model
Temperature
Range
Package
Description
Package
Option
AD8560ACP
–40°C to +85°C
16-Lead LFCSP
CP-16
Available in reels only.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the AD8560 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
REV. 0
–3–
WARNING!
ESD SENSITIVE DEVICE
AD8560 –Typical Performance Characteristics
100
90
0
TA = 25C
4.5V < VS < 16V
VCM = VS/2
50
INPUT BIAS CURRENT – nA
QUANTITY – Amplifiers
80
70
60
50
40
30
VS = 16V
100
150
VS = 4.5V
200
250
20
300
10
0
12
9
0
3
6
6
3
INPUT OFFSET VOLTAGE – mV
9
350
12
+25
TEMPERATURE – C
+85
TPC 4. Input Bias Current vs. Temperature
TPC 1. Input Offset Voltage Distribution
5
300
4.5V < VS < 16V
4
INPUT OFFSET CURRENT – nA
250
QUANTITY – Amplifiers
40
200
150
100
50
3
2
1
VS = 4.5V
0
VS = 16V
1
2
3
4
0
0
10
20
30
40
50
60
TCVOS – V/C
70
80
90
5
100
TPC 2. Input Offset Voltage Drift Distribution
+85
4.46
15.96
ILOAD = 5mA
VCM = VS/2
4.45
15.95
VS = 16V
0.25
OUTPUT VOLTAGE – V
INPUT OFFSET VOLTAGE – mV
+25
TEMPERATURE – C
TPC 5. Input Offset Current vs. Temperature
0
0.50
VS = 16V
0.75
1.00
VS = 4.5V
1.25
1.50
40
40
15.94
4.44
15.93
4.43
15.92
4.42
15.91
4.41
15.90
4.40
15.89
4.38
15.87
4.37
15.86
+25
TEMPERATURE – C
+85
TPC 3. Input Offset Voltage vs. Temperature
4.39
VS = 4.5V
15.88
40
4.36
+25
TEMPERATURE – C
+85
TPC 6. Output Voltage Swing vs. Temperature
–4–
REV. 0
AD8560
150
0.85
ILOAD = 5mA
VCM = VS/2
SUPPLY CURRENT/AMPLIFIER – mA
135
OUTPUT VOLTAGE – mV
120
105
90
VS = 4.5V
75
60
45
VS = 16V
30
0.80
VS = 16V
0.75
0.70
0.65
VS = 4.5V
0.60
15
0
40
+25
TEMPERATURE – C
0.55
+85
TPC 7. Output Voltage Swing vs. Temperature
+25
TEMPERATURE – C
+85
TPC 10. Supply Current/Amplifier vs. Temperature
0.9999
8
RL = 10k
CL = 200pF
4.5V < VS < 16V
VOUT = 0.5V TO 15V
7
SLEW RATE – V/s
RL = 2k
GAIN ERROR – V/V
40
0.9997
VS = 16V
6
VS = 4.5V
5
4
3
2
RL = 600
0.9995
40
+25
TEMPERATURE – C
1
+85
TPC 8. Voltage Gain vs. Temperature
+25
TEMPERATURE – C
+85
TPC 11. Slew Rate vs. Temperature
1k
1.1
TA = 25C
100
VS = 4.5V
10
TA = 25C
AV = 1
VO = VS /2
1.0
SUPPLY CURRENT/AMPLIFIER – mA
OUTPUT VOLTAGE – mV
40
VS = 16V
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.001
0.01
0.1
1
LOAD CURRENT – mA
10
0.1
100
2
4
6
8
10
12
SUPPLY VOLTAGE – V
14
16
18
TPC 12. Supply Current/Amplifier vs. Supply Voltage
TPC 9. Output Voltage to Supply Rail vs. Load Current
REV. 0
0
–5–
AD8560
10
18
5
10k
15
20
TA = 25C
VS = 8V
VIN = 50mV rms
CL = 40pF
AV = 1
560
150
25
8
6
35
2
0
1M
10
100M
10M
FREQUENCY – Hz
15
10
1k
10k
100k
1M
10M
TPC 16. Closed-Loop Output Swing vs. Frequency
160
TA = 25C
VS = 8V
VIN = 50mV rms
RL = 10k
AV = 1
5
50pF
0
5
10
1040pF
100pF
15
540pF
20
25
100k
1M
120
100
80
+PSRR
60
40
0
20
100M
10M
FREQUENCY – Hz
140
POWER SUPPLY REJECTION – dB
160
450
400
350
VS = 4.5V
250
200
150
100
50
10k
100k
FREQUENCY – Hz
1M
10k
100k
FREQUENCY – Hz
1M
10M
TA = 25C
VS = 4.5V
120
100
+PSRR
80
60
PSRR
40
20
0
20
VS = 16V
1k
1k
TPC 17. Power Supply Rejection Ratio vs. Frequency
500
300
PSRR
20
40
100
TPC 14. Frequency Response vs. Capacitive Loading
0
100
TA = 25C
VS = 16V
140
POWER SUPPLY REJECTION – dB
20
100
FREQUENCY – Hz
25
GAIN – dB
10
4
TPC 13. Frequency Response vs. Resistive Loading
IMPEDANCE – 12
30
40
100k
TA = 25C
VS = 16V
AV = 1
RL = 10k
DISTORTION < 1%
14
OUTPUT SWING – Vp-p
GAIN – dB
5
10
16
1k
0
40
100
10M
TPC 15. Closed-Loop Output Impedance vs. Frequency
1k
10k
100k
FREQUENCY – Hz
1M
10M
TPC 18. Power Supply Rejection Ratio vs. Frequency
–6–
REV. 0
AD8560
1,000
100
VOLTAGE NOISE DENSITY – nV/ Hz
TA = 25C
4.5V VS
16V
TA = 25C
VS = 4.5V
VCM = 2.25V
VIN = 100mV p-p
AV = 1
RL = 10k
90
80
70
OVERSHOOT – %
100
10
60
50
40
OS
30
+OS
20
10
1
10
1k
100
FREQUENCY – Hz
0
10
10k
20
15
TA = 25C
4.5V < VS < 16V
OUTPUT SWING FROM 0V TO V
CHANNEL SEPARATION – dB
1k
TPC 22. Small Signal Overshoot vs. Load Capacitance
TPC 19. Voltage Noise Density vs. Frequency
0
100
LOAD CAPACITANCE – pF
20
40
60
80
100
120
140
TA = 25C
VS = 8V
RL = 10k
10
5
OVERSHOOT SETTLING TO 0.1%
0
5
UNDERSHOOT SETTLING TO 0.1%
10
160
180
100
1k
10k
100k
1M
FREQUENCY – Hz
10M
15
100M
0
TPC 20. Channel Separation vs. Frequency
OVERSHOOT – %
70
0
50
40
OS
0
0
0
10
100
LOAD CAPACITANCE – pF
0
0
1k
0
0
0
0
0
TIME – 2s/DIV
0
0
TPC 24. Large Signal Transient Response
TPC 21. Small Signal Overshoot vs. Load Capacitance
REV. 0
0
0
+OS
20
0
10
TA = 25C
VS = 16V
AV = 1
RL = 10k
CL = 300pF
0
60
30
2.0
1.5
0
TA = 25C
VS = 16V
VCM = 8V
VIN = 100mV p-p
AV = 1
RL = 10k
VOLTAGE – 2V/DIV
80
1.0
SETTLING TIME – s
TPC 23. Settling Time vs. Step Size
100
90
0.5
–7–
0
AD8560
0
0
TA = 25C
VS = 4.5V
AV = 1
RL = 10k
CL = 300pF
VOLTAGE – 1V/DIV
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TIME – 2s/DIV
0
0
0
0
0
TPC 25. Large Signal Transient Response
0
0
0
0
TIME – 1s/DIV
0
0
0
0
TA = 25C
VS = 16V
AV = 1
RL = 10k
CL = 100pF
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TIME – 1s/DIV
0
0
TA = 25C
VS = 16V
AV = 1
RL = 10k
0
VOLTAGE – 3V/DIV
0
0
0
0
TPC 27. Small Signal Transient Response
0
VOLTAGE – 50mV/DIV
0
0
0
0
TA = 25C
VS = 4.5V
AV = 1
RL = 10k
CL = 100pF
0
VOLTAGE – 50mV/DIV
0
0
0
0
TPC 26. Small Signal Transient Response
0
0
0
0
0
TIME – 40s/DIV
0
0
0
TPC 28. No Phase Reversal
–8–
REV. 0
AD8560
APPLICATIONS
Theory of Operation
Short Circuit Output Conditions
These buffers are designed to drive large capacitive loads in LCD
applications. Each has a high output current drive and rail-torail input/output operation and can be powered from a single 16
V supply. They are also intended for other applications where low
distortion and high output current drive are needed.
Input Overvoltage Protection
As with any semiconductor device, whenever the input exceeds
either supply voltage, attention needs to be paid to the input
overvoltage characteristics. As an overvoltage occurs, the amplifier
could be damaged depending on the voltage level and the magnitude
of the fault current. When the input voltage exceeds either supply
by more than 0.6 V, internal pin junctions will allow current to
flow from the input to the supplies.
This input current is not inherently damaging to the device as
long as it is limited to 5 mA or less. If a condition exists using
the buffers where the input exceeds the supply by more than 0.6 V,
a series external resistor should be added. The size of the resistor
can be calculated by using the maximum overvoltage divided by
5 mA. This resistance should be placed in series with the input
exposed to an overvoltage.
Output Phase Reversal
The buffer family is immune to phase reversal. Although the device’s
output will not change phase, large currents due to input overvoltage
could damage the device. In applications where the possibility exists
of an input voltage exceeding the supply voltage, overvoltage protection should be used as described in the previous section.
The buffer family does not have internal short circuit protection
circuitry. As a precautionary measure, do not short the output
directly to the positive power supply or to the ground.
It is not recommended to operate the AD8560 with more than
35 mA of continuous output current. The output current can be
limited by placing a series resistor at the output of the amplifier
whose value can be derived using the following equation:
RX ≥
VS
35 mA
For a 5 V single-supply operation, RX should have a minimum
value of 143 Ω.
Recommended Land Pattern for the AD8560
Figure 2 is a recommended land pattern for the AD8560 PCB
design. The recommended thermal pad size for the PCB design
matches the dimensions of the exposed pad on the bottom of
the package. The solder mask design for improved thermal pad
contact to the exposed pad and reliability uses a stencil pattern
for approximately 85% solder coverage. A minimum clearance
of 0.25 mm is maintained on the PCB between the outer edges
of the thermal pad and the inner edges of the pattern for the
land to avoid shorting. For better thermal performance, thermal
vias should also be used. Since the AD8560 is relatively a low
power part, just soldering the exposed package pad to the PCB
thermal pad should provide sufficient electrical performance.
SYMM CL
Total Harmonic Distortion (THD+N)
0.28 0.75
TYP 16 PL
The buffer family features low total harmonic distortion. The total
harmonic distortion plus noise for the buffer over the entire
supply range is below 0.08%. When the device is powered from
a 16 V supply, the THD + N stays below 0.03%. Figure 1 shows
the AD8560’s THD + N versus the frequency performance.
0.9
0.4
2.1 1.95 0.65
SYMM CL
10
0.05
0.1
THD + N – %
1
0.875
0.20
0.1
VS = 2.5V
0.25
SOLDER MASK
VS = 8V
BOARD METALLIZATION
Figure 2. 16-Lead 4 x 4 Land Pattern
0.01
20
100
1k
FREQUENCY – Hz
10k
30k
Figure 1. THD + N vs. Frequency
REV. 0
–9–
AD8560
OUTLINE DIMENSIONS
16-Lead Lead Frame Chip Scale Package [LFCSP]
4 mm 4 mm Body
(CP-16)
Dimensions shown in millimeters
4.0
BSC SQ
PIN 1
INDICATOR
0.60 MAX
0.65 BSC
13
12
3.75
BSC SQ
TOP
VIEW
0.75
0.60
0.50
12 MAX
PIN 1
INDICATOR
0.60 MAX
16
1
BOTTOM
VIEW
4
9
8
5
2.25
2.10 SQ
1.95
1.95 BSC
0.80 MAX
0.65 NOM
0.05 MAX
0.02 NOM
1.00
0.90
0.80
SEATING
PLANE
0.35
0.28
0.25
0.20 REF
COPLANARITY
0.08
COMPLIANT TO JEDEC STANDARDS MO-220-VGGC
–10–
REV. 0
–11–
–12–
C03016–0–3/03(0)
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