Shri Vishnu engineering College for Women:: Bhimavaram
Department of Electronics & communication Engineering
LINEAR IC APPLICATIONS
Assignment -1
1. (a) Derive the output voltage of an op - amp based differential amplifier.
(b) List out electrical characteristics of an op - amp.
2. (a) List out the AC characteristics of an op-amp and discuss about them?
(b) For an op-amp, PSRR=70dB(min), CMRR=105, differential mode gain, Ad=105. The
output voltage changes by 20v in 4 microseconds. Calculate
i. numerical value of PSRR
ii. Common mode gain
iii. Slew rate of the op - amp.
3. (a) Explain how an op - amp can be used as summing amplifier? Draw the diagram of a four
input summer and obtain the expression for the output.
(b) The circuit of a inverting summing amplifier is designed with R1 = R’ =1Kohm, and R2 =
2R1, R3 = 2R2,?Rn = 2Rn-1, the input voltages v1,v2,?vn can be 0 to 10V.
i. For n = 4, what is the smallest output voltage if at least one input is non zero?
ii. For n = 4, what is the maximum output voltage?
4. (a) Design a logarithmic amplifier for positive input voltages in the range 5mV to 50V.
(b) With suitable circuit diagram explain the operation of a triangular wave generator using a
comparator and a integrator.
5. (a) Define Bessel, Butterworth and Chebysher filters, and compare their frequency response.
(b) Sketch the circuit diagram of band elimination filter and design a wide band- reject having
fH=200Hz and fL=1KHz. Assume necessary data.
6. (a) Give the functional block diagram of NE 565 PLL (DIP) and for the given components
values. C1 = 390PF, C2 = 680PF and R1 = 10k, Vcc = ±6V Find
i. The free running frequency
ii. The lock range and capture range
Where C1 is capacitor connected between pin number 9 and -Vcc, C2 is the capacitor
connected between +Vcc and ouput pin 7, and R1 is connected between
pin number 8 and +Vcc.
(b) Give the functional block diagram of VCO NE 565 and explain its working and necessary
expression for free running or center frequency.
7. (a) What are the basic blocks preceding an Analog to Digital converter in a typical application
like digital audio recording?
(b) Draw the circuit of weighted resistor DAC and derive expression for output analog voltage
Vo.
(c) Compare merits and demerits of A/D converters.
8. (a) What are the different types of multiplexers? Explain logic diagram and truth table of Dual
4 to 1 line multiplexer.
(b) Explain the operation of balanced modulator using neat sketch.
Assignment -2
1. (a) Explain cascade connection of differential amplifier for active load.
(b) Write the properties of different configurations of differential amplifier.
2. (a) Compute the maximum possible total output voltages in the amplifier circuits
shown in figure 2. The op - amp is the MC1536 with the following specifications:
Vio = 7.5mV maximum; Iio = 50nA maximum; IB = 250 nA maximum at TA= 250C.
(b) Explain the difference between the slew rate and the transient response.
(c) Briefly explain the need for compensating networks in op - amps.
3. (a) Find V0 for the circuit shown in figure 3
(b) Find R1 and Rf in the practical integrator (lossy integrator), so that the peak
gain is 20 dB and the gain is 3 dB down from its peak when ω = 10,000
rad/sec. Use a capacitance of 0.01µF.
4. Design and explain a saw tooth waveform generator using operational amplifier and plot the
waveforms for the given specifications frequency = 5kHz, Vsat = ±12 Volts.
5. (a) Design a fourth order Butterworth low pass filter whose bandwidth is 1kHz. Select all
capacitors equal to 1000nF.
(b) Explain the operation of narrow band pass filter and obtain the frequency response.
6. (a) Draw the block schematic of a PLL describing the function of each block briefly.
(b) What is the purpose of low pass filter in a phase locked loop? Describe different types of low
pass filters used in PLL.
7. (a) What are the basic blocks preceding an Analog to Digital converter in a typical application
like digital audio recording?
(b) Draw the circuit of weighted resistor DAC and derive expression for output analog voltage
Vo.
(c) Compare merits and demerits of A/D converters.
8. What are all basic blocks of analog multiplexer? Explain how the data selections process is
performed it.
Assignment-3
1. (a) List out different configurations of differential amplifier. Explain any one of them in detail.
(b) Determine the emitter current in transistor Q3 of figure 1. If VBE = 0.7V and β = 100.
2. (a) Explain the effect of slew rate on both open loop and closed loop op – amp circuits.
(b) What is the major difference between the power supply requirements of linear and digital Ics.
(c) Draw and explain an ideal voltage transfer curve for an op - amp.
3. (a) What is a summer? Design a summer to add 4 input voltages in inverting configuration.
(b) What are the differences between the inverting and non-inverting terminals? What do you
mean by the term “virtual ground”.
(c) Briefly explain about the buffers used in amplifier circuits.
4. (a) Design a logarithmic amplifier for positive input voltages in the range 5mV to 50V.
(b) With suitable circuit diagram explain the operation of a triangular wave generator using a
omparator and a integrator.
5. (a) Derive the expression for the transfer function of 2nd order Low pass filter.
(b) Give the functional block diagram of VCO NE 566 and explain its working and necessary
expression for free running or center frequency.
6. Explain an application in which the 555 timer can be used as Astable Multivibrator.
7. (a) What are the basic blocks preceding an Analog to Digital converter in a typical application
like digital audio recording?
(b) With the help of a neat circuit diagram and waveforms, explain the operation of a dual slope
ADC. What are its special features?
8. What are all basic blocks of analog multiplexer? Explain how the data selections process is
performed in it.
Assignment -4
1. (a) Why is it necessary to use an external offset voltage compensating network with practical
op amp circuits.
(b) Compare and contrast an ideal op - amp and practical op amp.
(c) Explain the precautions that can be taken to minimize the effect of noise on an op - amp
circuit.
(d) Calculate the effect of variation in power supply voltages on the output-offset voltage for an
inverting amplifier circuit.
2. (a) Compare and contrast an ideal operational amplifier and practical operational amplifier.
(b) Give the design procedure of a compensating network for an op amp that uses ± 10 V supply
voltages. Assume necessary data.
3. (a) Design a differentiator to differentiate an input signal that varies in frequency from 10 Hz
to about 1KHz. If a sine wave of 1V peak at 1000 Hz is applied to this differentiator draw the
output waveforms.
(b) Why active differentiator circuits are not used in analog computer to solve differential
equations.
4. (a) Distinguish between Astable, Bistable and Monostable multivibrators.
(b) Determine VTH and VTL (TL: Lower threshold, TH: upper threshold) and hysteresis of the
inverting comparator shown in figure4
5. (a) Draw a band - pass filter circuit with its frequency response curve. Explain its working.
(b) Design a first order wide band reject filter with a higher cutoff frequency of 100Hz and a
lower cutoff frequency of 1kHz. Calculate the Q of the filter.
6. (a) Draw the dc voltage versus phase difference characteristic of balanced modulator phase
detector of a PLL indicating all important regions.
(b) Draw the dc output voltage of VCO versus frequency characteristic of a PLL indicating the
capture and lock range clearly.
(c) State the relationship between lock range and capture range through a mathematical
expression.
7. (a) Sketch and explain the transfer characteristic of a DAC with necessary equations.
(b) LSB of a 9 - bit DAC is represented by 19.6mv. If an input of 9 zero bits is represented by 0
volts.
i. Find the output of the DAC for an input 10110 1101 and 01101 1011.
ii. What is the Full scale reading (FSR) of this DAC?
8. (a) What are the different types of multiplexers? Explain logic diagram and truth table of Dual
4 to 1 line multiplexer.
(b) Explain the operation of balanced modulator using neat sketch.