M 20222
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Reg. No.:
Name : ................
ncl ud i n g Part-Time)
Degree Examination, November 2011
(2006 and Earlier Admn.)
gA
tlEClEEl CE/M E/CSfl T2 K 501 : SOFTWA R E E N G I N E E R I N G
PTE HPTM UPTC
V Semester B.Tech. (Reg./Su p./l mp.)
(!
Max. Marks: 100
Time: 3 Hours
lnstruction : Answer all questions.
PART _ A
1. a)
Explain why programs which are developed using evolutionary development are
likely to be difficult to
maintain.
5
b) Suggest who might be stakeholders
in university student record system. Explain why
it is almost inevitable that requirements of different stake holders willconflict in some
ways.
c)
5
Explain why it is important to define sub systems interfaces in a precise way and
why algebraic specification is particularly appropriate for sub-system interface
specification
?
d) Write a note on abstract machine model"
e) Explain why ensuring system reliability is not a guarantee
5
safety.
f) With the help of a neat block diagram. Explain defect testing process.
g)
h)
5
of system
5
5
Explain why intangibility of software systems poses special problem for software
project management.
5
What are the advantages of cohesive group
5
?
PART _ B
2. a) i)
Explain Boehm's spiral modei of development there by describing each sector in
detail with the help of a neat
diagram.
ii) Write a note on the metrics for specifying non-functional
b) i)
ii)
reiuirements"
5
OR
A medical practitioner wishes to automate diagnosis, meciication and accounting
in his hospital. Draw different level of data flow diagrams for the
software.
How would you implement the above
?
10
10
5
P.T.O.
M20222'
3. a) i)
ii)
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Explain in detail the incremental development process of software prototyping
with a figure.
Explain how are concurrent objects implemented.
7
I
OR
b)
i) Explain the several stages considered
ii)
4.
a)
in realtime software design.
What are the benefits of software reuse ?
i) Explain equivalence
ii)
partitioning with the help of an example.
Explain the legacy system structure with the help of a neat diagram.
8
7
I
7
OR
b)
i) Explain any four reliability metric.
ii) Write a note on automated static analysis.
5. a) i)
ii)
Explain the general structure of a project plan.
with a neat block diagram explain the risk management process.
8
7
7
8
OR
b)
i) Describe with a neat block diagram the sEl process maturity model.
ii) Cost estimates are inherently risky irrespective
of estimation technique used.
suggest four ways in which the risk in a cost estimate can be reduced.
10
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M 20223
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Reg. No. : ...............
Name: ...............
V Semester B.Tech. (Reg./Sup.llmp.) (lncluding Part-Time) Degree Examination,
November
24fi
(2006 and Earlier Admn.)
PTEC zKlE C 2K502: ELECTROMAGNETIC FIELD THEORY
Max. Marks : 100
Time:3 Hours
lnstruction : Answer all questions.
I
a) State and explain divergence
b)
theorem.
Write a note on electric scalar potential.
c) What is magnetic torque ? Explain.
d)
Explain Faraday's law of electromagnetic induction.
e)
Explain current continuity equation.
0
Write a note on dielectric hysteresis.
g)
Explain brewster angle.
h) Compare phase velocity
and group velocity.
ll. a) State and prove Strokes theorem.
b) Derive
Gauss' law in point form.
(8x5=40)
7
B
OR
c)
d)
lll"
Derive Poisson's and Laplace's equation for electrostatic field.
Derive an expression for capacitance of a co-axial cable.
a) State and prove Ampere's
b)
critical law in point form.
Write a note on magnetization.
7
8
10
5
OR
c) Derive
the magnetic conditions between two magnetic materials.
d) What is mutual inductance ? Explain"
B
7
P.T.O.
M 20223
'lV.
a) What
b)
r
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is displacement current ? Derive the expression for Same.
State and prove Poynting theorem'
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OR
c) Derive wave equations for conducting medium.
d) Write a note on wave Polarization.
V.
a) Discuss the propagation of a wave in perfect dielectric medium.
b) What is Smith chart ? What are its uses ?
10
5
10
5
OR
c) Derive an expression to determine characteristic impedance of a medium.
B
d) What is standing wave ratio ? Explain.
7
1m1111111111 M 20224
Reg. No. : ................................. Name: ..................................... V Semester B.Tech. (Reg.lSupJlmp.) (Including Part-Time) Degree Examination, November 2011 (2006 and Earlier Admn.) PTEC2K1EC2K 503: ANALOG COMMUNICATIONS Time: 3 Hours Max. Marks: 100
Instruction:
Answer all questions.
1. a) Explain stationary and non stationary process. b) Define Gaussian process. List out the properties of Gaussian process. c) Write a short note on white noise. d) Calculate the ems noise voltage and thermal noise power appearing across a 20 k Q
resistor at 25° C temperature with an effective noise band width of 10 KHz. Given
k = 1.38 x 10- 23 J/ Ok.
e) With the help of a neat circuit diagram and waveforms. Explain the working of an
envelope detector.
f) An AM broadcast transmitter radiates20 kW when the modulation percentage is 75.
How much of this is carrier power? Also calculate the power of each side bonds.
g) Explain the generation of phase modulated wave by using a frequency modulator.
h) An FM wave is defined by s (t)
frequency of s (t).
=cos (10 1tt + sin (41tt») calculated the instantaneous
(8x5=40)
2. a) Explain correlation theory for WSS random process.
b) Explain proportion of power spiritual density of a stationary process.
10
5
OR
3. a) State and prove Wiener - Khinchin - Einstein theorem.
b) Explain the properties of Gaussian process.
10
5
4. a) White Gaussian noise of zero mean and PSD NO/2 is passed through an ideal Band
pass filter having center frequency fc Hz and band width 2B. With necessary equations
and sketches, explain PSD, autocorrelation function and PSD of inphase and
quadrature components of the filter output noise.
12
b) Prove that the inphase and quadrature component of narrow band noise n(t) have
zero mean.
OR
3
P.T.O.
In••11II1111 M20224" 5. a) What is noise figure? Obtain the expression for noise figure of a linear tWo part
network interl1)s of SNR, give necessary explanations.
b) Suppose amplifier 1 has a noise figure of 9 dB and power gain of 15 dB is connected
in cascade to the other amplifier 2 with noise figure of 20 dB. Calculate the overall
noise figure for this cascade connection.
8
7
6. a) Let Su (t) denote an SSB wave in w_hich only upper side band is retained
i) Determine the transfer function Hu (f)
ii) Complex envelopes of the equivalent low pass filer corresponding to Hu (f)
iii) Derive the expression for Su (t) sketch necessary diagrams.
9
b) Explain the working of frequency discriminator used to generate SSB modulated
wave.
6
OR
7. a) Show that the figure of merit of a DSBSC receiver using coherent detector is unity.
12
Sketch necessary PSD's.
b) Show that for a single tone AM maximum efficiency umax = 33.33% at J..l
k
= 1.
3
8. a) Explain pree1'r1phasis and de-emphasis used in FM and"OOtain the expression for
improvement factor.
b) Write a short note on FM threshold effects.
10
5
OR
9. a)
Derive and plot the spectrum of a single tone wide band FM wave.
b) Define and explain 99% bandwidth of an FM signal.
10
5
"mlallaUIIIIII M 20225
Reg. No. : ................................. Name: ..................................... V Semester B.Tech. (RegJSupJlmp.) (Including Part-Time) Degree Examination, November 2011 (2006 and Earlier Admn.) PT EC 2K1EC 2K 504 : LINEAR INTEGRATED CIRCUITS Time: 3 Hours Max. Marks: 100
Instruction,' Answer aI/ questions. Missing data can be assumed.
I. a) Common mode ilp to a certain differential amplifier, having differential gain of 125 is
4 sin 2001t tV. Determine the common mode olp if CMRR is 60 dB.
5
b) Define the following op-amp parameters. (i) CMRR (ii) Slew rate (iii) Power supply
rejection ratio (iv) Offset current (v) Unity gain bandwidth.
5
c) For the circuit show in fig. below draw the small signal model. Determine the effective
impedance looking into the source of M3 .
5
, ;;­
d) Write the circuit diagram of source cross coupled pair. Write the expressions for
v1 ,ID
. ,1V '
1
1
x
5
e) Determine the i/p impedance and olp voltage for the circuit shown in fig. below.
5
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P.T.O.
M20225 -2-
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With neat ckt diagram explain the working of voltage to current converter.
5
g) With neat ckt diagram explain the working of all pas,s filter and show that.
5
f)
H=1-j(f/fo)
1+ j(f/fo)
t
=
0
1
21tRC
h) Write the circuit diagram of unity gain salten-key LPF. Derive the expression for
transfer function of the filter.
5
II. 1) a) Find the tail current IT' the two emitter currents, and the two collector to ground voltages in the circuit shown below. Assume 2 transistors are closely matched. ~1= P2 = 100. 8
-
o r­
- lo-v
b) Derive the expressions for phase changes produced by individual lead and lag
networks.
7
OR
2) With neat circuit diagram carry out the DC analysis of dual Vp, balanced olp differential
amplifier with emitter resistance RE. For the same circuit carry out the ac analysis by
replacing the transistors by its simplified re model derive the expressions for
(i) voltage gain (ii) differential ilp resistance (iii) olp resistance.
15
III. 1) a) With neat circuit diagram explain the working of current differential amplifier.
7
b) With neat ckt diagram explain the working of Rail-to-rail differential amplifier.
8
OR
2) a) With neat ckt diagram explain source coupled pair differential amplifier.
b) With neat ckt diagram explain the working of differential amplifier with current
source.
8
7
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M 20225
IV. 1) With neat ckt diagram explain the working of astable and monostable multivibrator
using op.amp.
15
OR
2) Explain with neat ckt diagram 4 quadrant multipliers.
15
V. 1) Design a wide band reject filter using first order high pass and low pass filters having
fL =2 kHz and fH =400 Hz respectively, pass band gain =4. Also draw an approximate
15
freq. response plot for the filter.
OR
2) For the ckt shown in fig. below show that
In the above ckt specify the suitable component values to achieve a band pass
response with a gain of 20 dB over audio range 20 Hz :::;; f :::;; 20 KHz.
\
~2..
15
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M 20226
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Reg. No. : .............".
Name : ................
V Semester B.Tech. (Reg./Supple.llmp.)
(lncluding Part-Time)
Degree Examination, Novembet 2411
(2006 and Earlier Admn')
PTEC2K/EC2KSOS : COMPUTER ORGANIZATION AND ARCHITECTURE
Time:3
Hours
Max' Marks: 1oo
lnstruction : Answer all questions.
PART
1. a) Construct
*A
a 5x32 decoder out of minimum number of 3x8 and 2x4
decoders. (8x5=40)
b)
Explain anY 5 features of HDL.
c)
Explain in brief Resource encoding.
d)
Draw a block diagram of data path of a 2's complement sequential multiplier.
e)
Explain NRZ and NRZI recording techniques.
f) Write a note on disk file organization.
g)
Explain in brief system performance and system cost'
h)
Write a note on MIMD sYstem'
PART _ B
2. a)
Give the complete RTL structure of a BCD to 7 segment decoder/driver. Write the
truth table and the logic circuit for the
segment'e'.
15
OR
b) What
is counter ? Give the complete RTL structure
of
15
i) 4-bit synchronous modulo 16 ripple/parallel carry counter
ii)
A decade countei
iii) 3-bit up/down synchronous counter.
P.T.O.
ilffiilI
M 20226
3. a)
Explain bus arbitration using
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:
15
i) Poling scheme
ii) lndePendent request scheme
iii) Daisy chaining scheme.
OR
b)
Explain selector channel multiplexer channel with block
4. a)
Explain in detail associative memory
diagrams.
organization'
15
15
OR
b)
Find a method of encoding the micro instructions so that minimum number of control bits
are used and the maximum parallelism among the microoperations is
preserved.
15
Micro instructions Control signals
l,
' l2
13
14
15
16
17
18
5. a)
c
,,c?
c3' c4' cs, c6
c1' ca, c4' c6
c2' c5' c6
c4' c5' c8
c7' c8
cl'
c8' cs
ca, c4' c8
cl, c2' ce
Explain in detail instruction pipelining with load delay slot filling and branch delay
slot filling method.
15
OR
b)
Explain parallel processing systems based on SIMD model.
15
Reg. No. : .............".
Name : ................
V Semester B.Tech. (Reg./Sup./lmp.)
(lncluding Part - Time) Degree
Examination, November 201 1
(2006 and earlier Admn')
EC2 K 506 (B) : POWER ELECTRONICS
Hours
Time :3
Max' Marks: 1oo
lnstruction : Answer all questions
1. a) By makinE use of the two transistor analogy,
explain the V-1 characteristics of
an SCR.
b) With necessary
waveforms. Explain the turn on characteristics of a power BJT.
c)
With neat circuit diagram and waveforms explain single phase bridge inverter.
d)
With the help of waveforms explain single pulse width modulation control used for
single phase inverter.
e)
Compare unidirectional and bidirectional ac voltage,controller with resitive load.
0
Distinguish between ON-OFF and phase control of ac voltage controllers.
g) Write a short note on UPS'
h)
Z. a)
b)
Explain the operation of a basic single transistor flyback
SMPS.
Explain the basic structure, working principle and static characteristics of an
Discuss relative merits and demerits of
(8x5=40)
IGBT. 10
IGBT.
5
OR
g. a) With the help of a neat circuit diagram and waveforms explain the operation
of a resonant pulse commutation and hence derive the expression for circuit turn off
time
b)
to,,.
What are the main drawbacks of self commutation technique ?
12
3
P.T.O.
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M2A228
4. a) What is controlled rectifier ? How does the SCR turn off takes
place in controlled
rectifier.
neat circuit diagram and current voltage waveforms explain the operation ol
a basic SCR rules inverter.
b) With
OR
With the help of a neat circuit diagram, explain the operation of a single phase
semiconverterwith RL load, assume continuous current operation. Derive the expression
for V,,,.,. and Vdc. Give necessary waveforms. How it is different from full converter ?
6.
a) With neat circuit diagram
15
and waveforms explain the principle of step up chopper
operation.
diagram and waveforms explain the operation of a single phase
AC voltage controller with R load.
b) With neat circuit
OR
7.
a) W1h neat circuit diagram,
explain the operation of center tapped transformer based
1$ to 1 {l cyclo converter.
b) With the help of a neat circuit diagram
and waveforms explain chopper control of
D.C. series motor.
B,
With neat circuit diagram and waveforms explain the operation of a boost regulator
and derive the necessary expressions.
15
OR
9. a) With neat circuit diagram explain the operation
b) Explain any two configurations used for UPS'
of a full bridge SMPS.
7
I