JOURNAL OF AUTOMATIC CONTROL, UNIVERSITY OF BELGRADE, VOL. 19:7-12, 2009© An Improved AC-amplifier for Electrophysiology Nikola Jorgovanović, Dubravka Bojanić, Vojin Ilić and Darko Stanišić Abstract— We present the design, simulation and test results of a new AC amplifier for electrophysiological measurements based on a three op-amp instrumentation amplifier (IA). The design target was to increase the common mode rejection ratio (CMRR), thereby improving the quality of the recorded physiological signals in a noisy environment. The new amplifier actively suppresses the DC component of the differential signal and actively reduces the common mode signal in the first stage of the IA. These functions increase the dynamic range of the amplifier’s first stage of the differential signal. The next step was the realization of the amplifier in a single chip technology. The design and tests of the new AC amplifier with a differential gain of 79.2 dB, a CMRR of 130 dB at 50 Hz, a high-pass cutoff frequency at 0.01 Hz and common mode reduction in the first stage of the 49.8 dB are presented in this paper. Index Terms — AC-amplifier; electrophysiological signals; CMRR; DC offset suppression T I. INTRODUCTION HE non-invasive recordings of electrophysiological signals are of great importance for assessing the function of peripheral nerves, muscles, cortical activity and the heart. The signals of interest are very small when compared to the noise (e.g., power line interference), the base line drift and instability, different artifacts and electrode impedance variability [1], [2], [3] and [4]. The standard DC three op-amp instrumentation amplifier (IA) circuit is one of the most popular basic configurations used for electrophysiological amplifiers. This topology provides high input impedance and a high common mode rejection ratio (CMRR). High CMRR can be obtained by high gain at the first stage of the IA and well-matched resistors in the second stage of the IA [5]. The gain at the first stage of the DC IA needs to be limited to prevent saturation caused by offset potentials of electrodes. The use of an AC amplifier instead of the DC IA eliminates the offset. An AC amplifier based on wellknown modifications to the classic three op-amp IA topology is achievable by various techniques [6], [7], [8], [9] and [10]. However, the techniques suggested reduce the performance of the DC IA. N. Jorgovanović is with University of Novi Sad, Faculty of Engineering, Novi Sad, Serbia, Fax: +381 21 458873, Phone: +381 21 4852452, e-mail: nikolaj@uns.ac.rs D. Bojanić is with University of Novi Sad, Faculty of Engineering, Novi Sad, Serbia Fax: +381 21 458873, Phone: +381 21 4852446, email: dbojanic@uns.ac.rs V. Ilić is with University of Novi Sad, Faculty of Engineering, Novi Sad, Serbia, Fax: +381 21 458873 , Phone: +381 21 4852446, e-mail: vojin@uns.ac.rs D. Stanišić is with University of Novi Sad, Faculty of Engineering, Novi Sad, Serbia, Fax: +381 21 458873, Phone: +381 21 4852452 , email: darkos@uns.ac.rs DOI: 10.2298/JAC0901007J Most new electrophysiological amplifier designs use active DC suppression. This technique relates to subtraction of the integrated IA output (amplified DC component of the input signal) from the original input signal (sum of the signal of interest and undesirable DC component). Subtraction of these two signals should not degrade the amplifier’s balanced structure or its CMRR. The optimal solution to using this concept needs to addresses how and when to perform the subtraction. Some solutions for using the subtraction method are suggested elsewhere, [11], [12], [13], [14], [15] and [16], indicating excellent DC component suppression. A rarely discussed factor that limits the first stage gain of the IA and global CMRR is the dynamic range occupied by the common mode signal. An available dynamic range is extremely important for battery-powered devices with low voltage power supplies. The useful dynamic range of the first stage could be increased by additional attenuation of the common mode signal. We suggest a new subtraction method for the input and the integrated output signals. Subtraction is performed in the first stage of the IA to preserve high input impedance and to ensure high first stage gain and high CMRR. This new technique reduces the common mode signal in the first stage of the amplifier to an insignificant level, thereby practically providing full dynamic range of the amplifier’s first stage. Moreover, common mode reduction is performed locally in the first stage of the amplifier without involvement of the third electrode. Therefore, the new design can be applied with only two electrodes in the configuration [17]. II. CIRCUIT DESIGN AND SIMULATION OF ELECTROPHYSIOLOGICAL AMPLIFIER A. The Novelty of the New AC Amplifier Active suppression of the common mode signal and the DC component of the differential signal in the first stage of the three op-amp DC IA are obtained by two feedback loops, shown in Figure 1. The first feedback loop returns the IA output signal via the integrator K1 and controlled voltage sources V1 and V2. The transfer function for the differential signal is given by Vo ( s ) AD 0 s , (1) = A= D (s) Vd ( s ) ( s + 2 K1 AD 0 ) where AD0 is the band pass gain of the designed AC amplifier, 2R R (2) AD 0= 1 + 2 4 , R1 R3 and a lower cut-off frequency is given by K (3) f c = 1 AD 0 . π 8 JORGOVANOVIĆ N, ET AL. AN IMPROVED AC-AMPLIFIER FOR ELECTROPHYSIOLOGY The second feedback loop returns the extracted common mode signal from the output of the first stage of the IA VC1 via amplifier K2 and the controlled voltage source V3. If the value of the voltage V3 is given by R (4) V3 Vcm 1 + 1 , = R2 2 then the common mode voltage signal is completely removed from the outputs of the first stage. In the proposed circuit voltage source, V3 is controlled by the second feedback loop (with amplifier K2). Therefore, the expression for common mode suppression in the first stage is Vc1 R1 + 2 R2 1 (5) = ≈ for R2 >> R1 . Vcm R1 + 2 K 2 R2 K 2 Figure 1: Block diagram of the designed IA As shown, the voltage sources V1 and V2 in the IA input loop do not need to be "truly" floating. Instead of true floating sources, it is satisfactory to provide two controlled voltage sources referenced to the amplifiers with voltages V3+V1 and V3-V2; this can be accomplished by using ordinary op-amps, which will be described later. U6 (R11, R13 and R15) (voltage V3-V2). The second feedback loop returns the common mode signal (Vc1) from the output of the first stage of the IA, formed at the middle point of the series connection of the two equal resistors R5 and R6. The Vc1 signal is buffered by op-amp U8 and amplified by an inverting amplifier based on op-amp U9, resistors R25 and R26 and compensation capacitor C2 (voltage -V3). Gain of the inverting amplifier is set to 60 dB at DC. Due to frequency compensation, the low pass cut-off frequency of the inverting amplifier is 15.9 Hz. Therefore, amplification of the inverting amplifier is reduced to 49.8 dB at 50 Hz. The output voltages of amplifiers U6 and U7 are fed into the IA input loop via the resistive network R17 - R18 - R19. This ensures attenuation of the voltage difference V1-V2 by 53.5 dB and no attenuation of voltage V3. The resistive network R17 - R18 R19 affects the low cutoff frequency through the constant K1 from expression (3). The constant K1 also depends on the integrator’s constant and the voltage divider R20-R21 (6): R19 R21 1 . (6) K1 = R20 + R21 R22 C1 R17 + R18 + R19 For the values of the components shown in Figure 2, the constant K1 is equal to 6.49·10-6, which ensures a low cutoff frequency of 0.01 Hz. The maximum DC signal value that can be suppressed is limited by the maximum output voltage of the integrator Vimax (defined by the power supply voltage and op-amp output characteristics) and the attenuation of the resistive network R17 - R18 - R19. Additionally, Vimax is transformed into a voltage difference between the outputs of the two adders, attenuated through the resistive networks and subtracted from the input differential voltage. Maximum DC suppression can be described as R19 . (7) Vin ( DC ) = Vi max R17 + R18 + R19 For the components shown in Figure 2, with a power supply of ±12 V, DC component suppression is 25 mV, B. Circuit Design of the AC Amplifier For testing purposes, an AC amplifier, shown in Figure which is sufficient for the recordings. The suppression can 2, was designed. The characteristics of the designed be increased with lower attenuation in the resistive amplifier are the following: 1) a differential gain of 79.2 network R17 - R18 - R19. dB and 2) a low cut-off frequency (0.01 Hz) and common As we have already stated, the resistive network R17 - R18 mode attenuation at the first stage of the IA (49.8 dB at 50 R19 ensures attenuation of the differential signal, but should Hz). To achieve a CMRR that is as high as possible, a gain have no influence on the common mode. Expression (8) of 59.2 dB is concentrated at the first stage. Therefore, the shows a relationship between the voltage on resistor R19 gain of the first stage and the gain-bandwidth product of (V19) and the common mode voltage Vc1: R R the op-amps define the upper cut-off frequency. The (8) = V19 K 2 K DS ( 11 − 12 )Vc1 , design was based on and tested with a frequently used opR15 R16 amp (OP27) so that an upper cut-off frequency of 8.8 kHz where K is the amplification of the common mode voltage 2 is achieved. The higher cut-off frequency, if required, V by amplifier U , c1 9 could be achieved with higher gain-bandwidth op-amps. R25 1 . (9) K2 = A standard three op-amp IA is based on op-amps U1, U2 R26 sC2 R25 + 1 and U3 and resistors R1, R2, R3, R4, R7, R8, R9, R10 and R19. Feedback signals, linear combinations of the voltages KDS is the attenuation of the resistive network R17 - R18 V3+V1 and V3-V2, are defined by two adders: U6 (R11, R13 R19: and R15) and U7 (R12, R14 and R16). The first feedback loop R19 . (10) K DS = returns output voltages from the IA via two branches: 1) R17 + R18 + R19 attenuator R20-R21; integrator U4-R22-C1; and adder U7 (R12, R14 and R16) (voltage V3+V1) and 2) attenuator R20-R21; If the ratio R11/R15 is equal to R12/R16, the voltage on R19 integrator U4-R22-C1; inverter U5 (R23 and R24); and adder is zero and the common mode signal will not be JOURNAL OF AUTOMATIC CONTROL, UNIVERSITY OF BELGRADE, VOL 19, 2009. Figure 2: Circuit diagram of designed AC amplifier transformed into a differential signal. To achieve equality between R11/R15 and R12/R16, we used trimmer P1 that has an influence on CMRR only. A mismatch in the resistor values in the differential amplifier (U3, R7, R8, R9 and R10) has moderate influence on CMRR because common mode signals at the input are already attenuated by 49.8 dB at 50 Hz. C. Simulation of the New AC Amplifier The circuit’s stability and frequency analysis was performed using Matlab and Simulink. According to the schematic diagram in Figure 2, two Simulink models were formed. One model describes the transfer function for the differential mode signal of the whole amplifier (DM model) and the other describes the transfer function for the common mode signal for the first stage of the IA (CM model). Bode frequency characteristics of the differential gain are presented in Figure 3. 9 The differential gain is 79.2 dB, with a low cut-off frequency of 10 mHz and a high cut-off frequency of 8.8 kHz. The low cutoff frequency is the result of an integrator present in the feedback loop and does not depend on the op-amp's characteristics. Moreover, the high cutoff frequency depends on the op-amp's band-pass characteristics. This can only be increased by using an opamp with a wider band-pass or by decreasing the gain at the first stage of the IA. Figure 4: Bode frequency characteristics of common-mode attenuation in the first stage of the amplifier Figure 3: Bode frequency characteristics of differential gain Figure 4 shows the Bode frequency characteristics of the common mode gain. The CM model describes the common mode attenuation from the amplifier's input to output for the first stage of the IA. The common mode signal attenuation at the output of the first stage is 49.2 dB at 50 Hz. The open loop gain analysis shows that the system is stable with a gain margin of 49.8 dB at 3.39 MHz; the phase margin is infinity. 10 JORGOVANOVIĆ N, ET AL. AN IMPROVED AC-AMPLIFIER FOR ELECTROPHYSIOLOGY III. TESTING OF THE AC AMPLIFIER To test the new topology with two feedback loops, we built a prototype without optimizing the power consumption, the size of the prototype’s PCB area and the circuit complexity. The reasons for skipping optimization are the plans for integration of the amplifier into the single chip. Two types of prototype verification were performed: 1) verification of the amplifier’s characteristics based on test signals and 2) clinical verification by EMG recording in a noisy environment. Data acquisition included a Tektronix TDS3012 digital scope with a Tektronix differential voltage probe ADA400A. A test signal was generated by an Agilent 33220A signal generator. A DC signal suppression test was performed by using the sine wave input differential signal with an amplitude of 0.4 mVp-p, a frequency of 1 kHz and a DC offset of 0.8 mV. The common mode signal on the input was set to zero in this test. The result of the test is shown in Figure 5. The upper waveform (Ch1) shows the differential signal at the input of the amplifier. The bottom waveform (Ch2) represents the output of the amplifier with a sine wave signal with an amplitude of 4 Vp-p, a frequency of 1 kHz and a DC offset equal to zero. Test results confirm calculations and simulations and they were similar to the other amplifiers with active DC signal suppression. Testing of the common mode signal reduction in the first stage of the amplifier was performed with a high amplitude common mode input signal. We used a sine wave test signal with an amplitude of 15.8 Vp-p and a frequency of 50 Hz; the differential mode signal at the input was set to zero. The results of the CMRR test are presented in Figure 6a. The upper waveform (Ch1) shows the common mode signal at the input of the amplifier. The bottom waveform (Ch2) represents the common mode signal at the output of the first stage of the amplifier. According to the measured results, the common mode signal attenuation in the first stage of the amplifier is 49.8 dB at 50 Hz. This result is a significant improvement compared to the other amplifiers that had no common mode reduction in the first stage. To confirm the high total CMRR of the amplifier, the output signal of the amplifier was recorded and the results are shown in Figure 6b. The upper waveform (Ch1) shows the common mode signal at the input of the amplifier. The bottom waveform (Ch2) represents the common mode signal at the output of the amplifier. According to the measured results, the CMRR is 130 dB at 50 Hz. Figure 5: Verification of the differential gain and DC-offset suppression. Ch1 shows the input signal waveform to the amplifier. Ch2 shows the output signal waveform. The experimental verification of the amplifier on real signals is demonstrated by the EMG recording in an intentionally made, extremely noisy environment. The tested amplifier was located very close to three switch mode power supplies and GSM phones, also it was tested without EMI filters, shielding, or a driven right leg circuit. We recorded EMG signals by using two Neuroline electrodes positioned over the Flexor Digitorum m., following the positioning instructions defined in the SENIAM project [18]. The neutral (i.e., ground) electrode over the Ulnar nerve was connected directly to the common electrode of the amplifier. The recordings from the contracted muscle of an able-bodied individual are presented in Figure 7a with the time scale set to 10 ms per division. Figure 7b shows three consecutive contractions (weak, medium and strong) from the same muscle. The time scale (horizontal axes) is 1 second per division. Figure 6: Verification of the common-mode rejection in the first stage of the amplifier (left). Ch1: common-mode signal at the input of the amplifier; Ch2: common-mode signal at the output of the first stage of the amplifier; Verification of the total common-mode rejection (right). Ch1: commonmode signal at the input of the amplifier; Ch2: common-mode signal at the output of the amplifier JOURNAL OF AUTOMATIC CONTROL, UNIVERSITY OF BELGRADE, VOL 19, 2009. 11 Figure 7 Short-time contraction of the Flexor Digitorum Muscle (left). Amplification of the amplifier is 79.2dB. Amplitude of the recorded signal is 2.2mVp-p; EMG signal of Flexor Digitorum Muscle (right). Amplification of the amplifier is 79.2dB. Amplitude of the low contraction is 0.6mVp-p, amplitude of the medium contraction is 1mVp-p and amplitude of the high contraction is 2mVp-p The upper waveform (Ch1) in Figure 8 shows the same EMG signal with a different time scale setting (i.e., 400 ms per division). The bottom waveform represents the frequency spectrum of the signal. As a result, almost the entire dynamic range of the amplifier’s first stage is available for a useful component of the input signal. The active DC offset suppression allows DC coupling between the electrodes and the amplifier, providing extremely high input impedance for the designed amplifier. The entire design of the novel AC amplifier, with simulations and test results, were presented in this paper. A high CMRR of 130 dB at 50 Hz, a differential gain of 79.2 dB, a cutoff frequency at 0.01 Hz, a bandwidth of 8.8 KHz and, in particular, a common mode reduction of 49.8 dB in the first stage of the amplifier were achieved. Major characteristics of the amplifier were confirmed by the test results. With these characteristics, this amplifier can be used to record EMG and other electrophysiological signals. The described circuit is now under clinical testing as part of our virtual EMG system [19] and [20]. REFERENCES [1] Figure 8: EMG signal of the Flexor Digitorum Muscle and its frequency spectrum The tests verify that the realized amplifier matches the calculations and simulation results. IV. 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