Chapter 9. Controller Design
9.1. Introduction
9.2. Effect of negative feedback on the network transfer
functions
9.2.1. Feedback reduces the transfer function from disturbances
to the output
9.2.2. Feedback causes the transfer function from the reference
input to the output to be insensitive to variations in the gains
in the forward path of the loop
9.3. Construction of the important quantities 1/(1+T) and
T/(1+T) and the closed-loop transfer functions
Fundamentals of Power Electronics
1
Chapter 9: Controller design
Controller design
9.4. Stability
9.4.1. The phase margin test
9.4.2. The relation between phase margin and closed-loop
damping factor
9.4.3. Transient response vs. damping factor
9.5. Regulator design
9.5.1.
9.5.2.
9.5.3.
9.5.4.
Lead (PD) compensator
Lag (PI) compensator
Combined (PID) compensator
Design example
Fundamentals of Power Electronics
2
Chapter 9: Controller design
Controller design
9.6. Measurement of loop gains
9.6.1. Voltage injection
9.6.2. Current injection
9.6.3. Measurement of unstable systems
9.7. Summary of key points
Fundamentals of Power Electronics
3
Chapter 9: Controller design
9.1. Introduction
Switching converter
Load
+
vg(t) +
Ð
iload(t)
v(t)
Output voltage of a
switching converter
depends on duty cycle
d, input voltage vg, and
load current iload.
Ð
transistor
gate driver
d(t)
d(t)
dTs Ts
switching converter
pulse-width vc(t)
modulator
vg(t)
t
iload(t)
d(t)
Fundamentals of Power Electronics
4
v(t) = f(vg, iload, d)
}
disturbances
v(t)
} control input
Chapter 9: Controller design
The dc regulator application
switching converter
Objective: maintain constant
output voltage v(t) = V, in spite
of disturbances in vg(t) and
iload(t).
vg(t)
iload(t)
Typical variation in vg(t): 100Hz
or 120Hz ripple, produced by
rectifier circuit.
d(t)
v(t) = f(vg, iload, d)
}
disturbances
v(t)
} control input
Load current variations: a significant step-change in load current, such
as from 50% to 100% of rated value, may be applied.
A typical output voltage regulation specification: 5V ± 0.1V.
Circuit elements are constructed to some specified tolerance. In high
volume manufacturing of converters, all output voltages must meet
specifications.
Fundamentals of Power Electronics
5
Chapter 9: Controller design
The dc regulator application
So we cannot expect to set the duty cycle to a single value, and obtain
a given constant output voltage under all conditions.
Negative feedback: build a circuit that automatically adjusts the duty
cycle as necessary, to obtain the specified output voltage with high
accuracy, regardless of disturbances or component tolerances.
Fundamentals of Power Electronics
6
Chapter 9: Controller design
Negative feedback:
a switching regulator system
Power
input
Switching converter
Load
+
vg
+
Ð
iload
v
H(s)
Ð
transistor
gate driver
pulse-width vc G (s)
c
modulator
compensator
Ð+
d
error
signal
ve
sensor
gain
Hv
reference
vref
input
Fundamentals of Power Electronics
7
Chapter 9: Controller design
Negative feedback
switching converter
vg(t)
vref
reference
input
+Ð
error
signal
ve(t)
compensator
iload(t)
vc pulse-width d(t)
modulator
v(t) = f(vg, iload, d)
}
disturbances
v(t)
} control input
sensor
gain
Fundamentals of Power Electronics
8
Chapter 9: Controller design
9.2. Effect of negative feedback on the
network transfer functions
Small signal model: open-loop converter
e(s) d(s)
1 : M(D)
Le
+
Ð
vg(s)
+
Ð
+
v(s)
C
j(s) d(s)
i load(s)
R
Ð
Output voltage can be expressed as
v(s) = Gvd(s) d(s) + Gvg(s) vg(s) ± Z out(s) i load(s)
where
Gvd(s) =
v(s)
d(s)
vg = 0
Gvg(s) =
v(s)
vg(s)
i load = 0
Fundamentals of Power Electronics
9
Z out(s) = ±
d=0
i load = 0
v(s)
i load(s)
d=0
vg = 0
Chapter 9: Controller design
Voltage regulator system small-signal model
e(s) d(s)
¥ Perturb and
linearize remainder
of feedback loop:
vg(s)
+
Ð
etc.
+
C
j(s) d(s)
v(s)
R
i load(s)
Ð
vref (t) = Vref + vref (t)
ve(t) = Ve + ve(t)
Le
1 : M(D)
+
Ð
¥ Use small-signal
converter model
vref (s)
reference
input
+Ð
error
signal
ve(s)
d(s)
Gc(s)
compensator
vc(s)
1
VM
pulse-width
modulator
H(s) v(s)
H(s)
sensor
gain
Fundamentals of Power Electronics
10
Chapter 9: Controller design
Regulator system small-signal block diagram
i load(s) load current
variation
vg(s)
ac line
variation
vref (s)
reference
input
+Ð
compensator
ve(s)
vc(s)
Gc(s)
error
signal
pulse-width
modulator
d(s)
1
VM
duty cycle
variation
Zout(s)
Gvg(s)
+
Gvd(s)
Ð
+
v(s)
output voltage
variation
converter power stage
H(s) v(s)
H(s)
sensor
gain
Fundamentals of Power Electronics
11
Chapter 9: Controller design
Solution of block diagram
Manipulate block diagram to solve for v(s) . Result is
v = vref
Gvg
GcGvd / VM
Z out
+ vg
± i load
1 + HGcGvd / VM
1 + HGcGvd / VM
1 + HGcGvd / VM
which is of the form
Gvg
Z
v = vref 1 T + vg
± i load out
H 1+T
1+T
1+T
with T(s) = H(s) Gc(s) Gvd(s) / VM = "loop gain"
Loop gain T(s) = products of the gains around the negative
feedback loop.
Fundamentals of Power Electronics
12
Chapter 9: Controller design
9.2.1. Feedback reduces the transfer functions
from disturbances to the output
Original (open-loop) line-to-output transfer function:
Gvg(s) =
v(s)
vg(s)
d=0
i load = 0
With addition of negative feedback, the line-to-output transfer function
becomes:
v(s)
vg(s)
vref = 0
=
Gvg(s)
1 + T(s)
i load = 0
Feedback reduces the line-to-output transfer function by a factor of
1
1 + T(s)
If T(s) is large in magnitude, then the line-to-output transfer function
becomes small.
Fundamentals of Power Electronics
13
Chapter 9: Controller design
Closed-loop output impedance
Original (open-loop) output impedance:
Z out(s) = ±
v(s)
i load(s)
d=0
vg = 0
With addition of negative feedback, the output impedance becomes:
v(s)
± i load(s)
=
vref = 0
vg = 0
Z out(s)
1 + T(s)
Feedback reduces the output impedance by a factor of
1
1 + T(s)
If T(s) is large in magnitude, then the output impedance is greatly
reduced in magnitude.
Fundamentals of Power Electronics
14
Chapter 9: Controller design
9.2.2. Feedback causes the transfer function from the
reference input to the output to be insensitive to
variations in the gains in the forward path of the loop
Closed-loop transfer function from vref to v(s) is:
v(s)
vref (s)
vg = 0
=
T(s)
1
H(s) 1 + T(s)
i load = 0
If the loop gain is large in magnitude, i.e., || T || >> 1, then (1+T) » T and
T/(1+T) » T/T = 1. The transfer function then becomes
v(s)
» 1
vref (s) H(s)
which is independent of the gains in the forward path of the loop.
This result applies equally well to dc values:
T(0)
V = 1
» 1
Vref H(0) 1 + T(0) H(0)
Fundamentals of Power Electronics
15
Chapter 9: Controller design
9.3. Construction of the important quantities
1/(1+T) and T/(1+T)
Example
1 + ws
z
80dB
T(s) = T0
|| T ||
QdB
| T0 |dB
60dB
1+
s + s
w p1
Qw p1
2
1 + ws
p2
fp1
40dB
Ð 40dB/dec
20dB
fz
Ð 20dB/dec
0dB
fp2
fc
crossover
frequency
Ð20dB
Ð 40dB/dec
Ð40dB
1Hz
10Hz
100Hz
10kHz
100kHz
f
At the crossover frequency fc, || T || = 1
Fundamentals of Power Electronics
1kHz
16
Chapter 9: Controller design
Approximating 1/(1+T) and T/(1+T)
T » 1
T
1+T
1 »
1+T(s)
Fundamentals of Power Electronics
for || T || >> 1
for || T || << 1
1
T(s)
for || T || >> 1
1
for || T || << 1
17
Chapter 9: Controller design
Example: construction of T/(1+T)
80 dB
T » 1
T
1+T
60 dB
fp1
40 dB
20 dB
Ð20 dB
Ð40 dB
1 Hz
|| T ||
Crossover
frequency
fz
Ð 20 dB/decade
0 dB
fc
fp2
T
1+T
10 Hz
for || T || >> 1
for || T || << 1
Ð 40 dB/decade
100 Hz
1 kHz
10 kHz
100 kHz
f
Fundamentals of Power Electronics
18
Chapter 9: Controller design
Example: analytical expressions for approximate
reference to output transfer function
At frequencies sufficiently less that the crossover frequency, the loop
gain T(s) has large magnitude. The transfer function from the
reference to the output becomes
v(s)
T(s)
= 1
» 1
vref (s) H(s) 1 + T(s) H(s)
This is the desired behavior: the output follows the reference
according to the ideal gain 1/H(s). The feedback loop works well at
frequencies where the loop gain T(s) has large magnitude.
At frequencies above the crossover frequency, || T || < 1. The quantity
T/(1+T) then has magnitude approximately equal to 1, and we obtain
T(s) Gc(s)Gvd (s)
v(s)
T(s)
= 1
»
=
VM
vref (s) H(s) 1 + T(s) H(s)
This coincides with the open-loop transfer function from the reference
to the output. At frequencies where || T || < 1, the loop has essentially
no effect on the transfer function from the reference to the output.
Fundamentals of Power Electronics
19
Chapter 9: Controller design
Same example: construction of 1/(1+T)
80 dB
60 dB
QdB
| T0 |dB
fp1
40 dB
1 »
1+T(s)
1
T(s)
for || T || >> 1
1
for || T || << 1
|| T ||
Ð 40 dB/decade
20 dB
fz
Ð 20 dB/decade
0 dB
+ 20 dB/decade
fz
Ð20 dB
Ð | T0 |dB
Ð60 dB
Ð80 dB
1 Hz
fp2
Crossover
frequency
+ 40 dB/decade
Ð40 dB
fc
Ð 40 dB/decade
1
1+T
fp1
QdB
10 Hz
100 Hz
1 kHz
10 kHz
100 kHz
f
Fundamentals of Power Electronics
20
Chapter 9: Controller design
Interpretation: how the loop rejects disturbances
Below the crossover frequency: f < fc
and || T || > 1
Then 1/(1+T) » 1/T, and
disturbances are reduced in
magnitude by 1/|| T ||
1 »
1+T(s)
1
T(s)
for || T || >> 1
1
for || T || << 1
Above the crossover frequency: f > fc
and || T || < 1
Then 1/(1+T) » 1, and the
feedback loop has essentially
no effect on disturbances
Fundamentals of Power Electronics
21
Chapter 9: Controller design
Terminology: open-loop vs. closed-loop
Original transfer functions, before introduction of feedback (Òopen-loop
transfer functionsÓ):
Gvd(s)
Gvg(s)
Z out(s)
Upon introduction of feedback, these transfer functions become
(Òclosed-loop transfer functionsÓ):
T(s)
1
H(s) 1 + T(s)
Gvg(s)
1 + T(s)
Z out(s)
1 + T(s)
The loop gain:
T(s)
Fundamentals of Power Electronics
22
Chapter 9: Controller design
9.4. Stability
Even though the original open-loop system is stable, the closed-loop
transfer functions can be unstable and contain right half-plane poles. Even
when the closed-loop system is stable, the transient response can exhibit
undesirable ringing and overshoot, due to the high Q -factor of the closedloop poles in the vicinity of the crossover frequency.
When feedback destabilizes the system, the denominator (1+T(s)) terms in
the closed-loop transfer functions contain roots in the right half-plane (i.e.,
with positive real parts). If T(s) is a rational fraction of the form N(s) / D(s),
where N(s) and D(s) are polynomials, then we can write
N(s)
¥ Could evaluate stability by
T(s)
D(s)
N(s)
=
=
evaluating N(s) + D(s), then
1 + T(s)
N(s) N(s) + D(s)
1+
factoring to evaluate roots.
D(s)
D(s)
This is a lot of work, and is
1
1
=
=
1 + T(s)
N(s) N(s) + D(s)
not very illuminating.
1+
D(s)
Fundamentals of Power Electronics
23
Chapter 9: Controller design
Determination of stability directly from T(s)
¥ Nyquist stability theorem: general result.
¥ A special case of the Nyquist stability theorem: the phase margin test
Allows determination of closed-loop stability (i.e., whether 1/(1+T(s))
contains RHP poles) directly from the magnitude and phase of T(s).
A good design tool: yields insight into how T(s) should be shaped, to
obtain good performance in transfer functions containing 1/(1+T(s))
terms.
Fundamentals of Power Electronics
24
Chapter 9: Controller design
9.4.1. The phase margin test
A test on T(s), to determine whether 1/(1+T(s)) contains RHP poles.
The crossover frequency fc is defined as the frequency where
|| T(j2pfc) || = 1 Þ 0dB
The phase margin jm is determined from the phase of T(s) at fc , as
follows:
jm = 180û + ÐT(j2pfc)
If there is exactly one crossover frequency, and if T(s) contains no
RHP poles, then
the quantities T(s)/(1+T(s)) and 1/(1+T(s)) contain no RHP poles
whenever the phase margin jm is positive.
Fundamentals of Power Electronics
25
Chapter 9: Controller design
Example: a loop gain leading to
a stable closed-loop system
60dB
|| T ||
ÐT
|| T ||
40dB
fp1
fz
20dB
crossover
frequency
fc
ÐT
0dB
0û
Ð90û
Ð20dB
jm
Ð40dB
Ð180û
Ð270û
1Hz
10Hz
100Hz
1kHz
10kHz
100kHz
f
ÐT(j2pfc) = Ð112û
jm = 180û Ð 112û = +68û
Fundamentals of Power Electronics
26
Chapter 9: Controller design
Example: a loop gain leading to
an unstable closed-loop system
60dB
|| T ||
ÐT
|| T ||
40dB
fp1
fp2
20dB
crossover
frequency
fc
ÐT
0dB
0û
Ð20dB
Ð90û
Ð40dB
Ð180û
jm (< 0)
Ð270û
1Hz
10Hz
100Hz
1kHz
10kHz
100kHz
f
ÐT(j2pfc) = Ð230û
jm = 180û Ð 230û = Ð50û
Fundamentals of Power Electronics
27
Chapter 9: Controller design
9.4.2. The relation between phase margin
and closed-loop damping factor
How much phase margin is required?
A small positive phase margin leads to a stable closed-loop system
having complex poles near the crossover frequency with high Q. The
transient response exhibits overshoot and ringing.
Increasing the phase margin reduces the Q. Obtaining real poles, with
no overshoot and ringing, requires a large phase margin.
The relation between phase margin and closed-loop Q is quantified in
this section.
Fundamentals of Power Electronics
28
Chapter 9: Controller design
A simple second-order system
40dB
|| T ||
f0
f
|| T ||
20dB
Consider the
case where T(s)
can be wellapproximated in
the vicinity of the
crossover
frequency as
T(s) =
s
w0
Ð 20dB/decade
f0
0dB
f2
Ð20dB
Ð40dB
ÐT
f0 f2
f2
Ð 40dB/decade
f2 / 10
Ð 90û
0û
Ð90û
f2
jm
Ð180û
1
1 + ws
2
Fundamentals of Power Electronics
ÐT
10 f2
Ð270û
f
29
Chapter 9: Controller design
Closed-loop response
If
T(s) =
s
w0
1
1 + ws
2
Then
T(s)
1
1
=
=
1 + T(s)
s + s2
1+ 1
1
+
w 0 w 0w 2
T(s)
or,
T(s)
1
=
1 + T(s)
1 + s + ws
Qwc
c
where
wc = w0w2 = 2p fc
Fundamentals of Power Electronics
2
w
Q = w0 =
c
30
w0
w2
Chapter 9: Controller design
Low-Q case
w
Q = w0 =
c
40dB
20dB
0dB
Ð20dB
w0
w2
low-Q approximation:
|| T ||
wc
= w2
Q
f0
f
Ð 20dB/decade
T
1+T
Q wc = w0
fc =
f0 f2
Q = f0 / fc
f0
f2
Ð40dB
f0 f2
f2
Ð 40dB/decade
f
Fundamentals of Power Electronics
31
Chapter 9: Controller design
High-Q case
w
Q = w0 =
c
wc = w0w2 = 2p fc
60dB
|| T ||
w0
w2
f0
f
40dB
Ð 20dB/decade
f2
20dB
0dB
Ð20dB
Q = f0 / fc
T
1+T
fc =
f0 f2
f0 f2
f2
Ð40dB
f0
Ð 40dB/decade
f
Fundamentals of Power Electronics
32
Chapter 9: Controller design
Q vs. jm
Solve for exact crossover frequency, evaluate phase margin, express
as function of jm. Result is:
Q=
cos j m
sin j m
j m = tan -1
Fundamentals of Power Electronics
1+
33
1 + 4Q 4
2Q 4
Chapter 9: Controller design
Q vs. jm
20dB
Q
15dB
10dB
5dB
Q = 1 Þ 0dB
0dB
jm = 52û
-5dB
Q = 0.5 Þ Ð6dB
jm = 76û
-10dB
-15dB
-20dB
0°
10°
20°
30°
40°
50°
60°
70°
80°
90°
jm
Fundamentals of Power Electronics
34
Chapter 9: Controller design
9.4.3. Transient response vs. damping factor
Unit-step response of second-order system T(s)/(1+T(s))
2Q e -wct/2Q
v(t) = 1 +
sin
4Q 2 ± 1
4Q 2 ± 1
wc t + tan -1
2Q
w
w
v(t) = 1 ± w ±2w e ±w1t ± w ±1w e ±w2t
2
1
1
2
w 1, w 2 =
4Q 2 ± 1
Q > 0.5
Q < 0.5
wc
1 ± 1 ± 4Q 2
2Q
For Q > 0.5 , the peak value is
peak v(t) = 1 + e ± p /
Fundamentals of Power Electronics
4Q 2 ± 1
35
Chapter 9: Controller design
Transient response vs. damping factor
2
Q=50
v(t)
Q=10
Q=4
1.5
Q=2
Q=1
1
Q=0.75
Q=0.5
Q=0.3
Q=0.2
0.5
Q=0.1
Q=0.05
Q=0.01
0
0
5
10
15
wct, radians
Fundamentals of Power Electronics
36
Chapter 9: Controller design
9.5. Regulator design
Typical specifications:
¥ Effect of load current variations on output voltage regulation
This is a limit on the maximum allowable output impedance
¥ Effect of input voltage variations on the output voltage
regulation
This limits the maximum allowable line-to-output transfer
function
¥ Transient response time
This requires a sufficiently high crossover frequency
¥ Overshoot and ringing
An adequate phase margin must be obtained
The regulator design problem: add compensator network Gc(s) to
modify T(s) such that all specifications are met.
Fundamentals of Power Electronics
37
Chapter 9: Controller design
9.5.1. Lead (PD) compensator
Gc(s) = Gc0
1 + ws
z
1 + ws
p
fp
fz
Gc0
|| Gc ||
Gc0
fz
Improves phase
margin
fp
fjmax
= fz fp
fp/10
+ 45û/decade
fz/10
0û
10fz
Ð 45û/decade
Ð Gc
f
Fundamentals of Power Electronics
38
Chapter 9: Controller design
Lead compensator: maximum phase lead
maximum 90û
phase lead
fjmax =
75û
60û
Ð Gc( fjmax) = tan -1
45û
fz fp
fp
±
fz
2
30û
fp 1 + sin q
=
fz 1 ± sin q
15û
0û
1
10
100
1000
fp / fz
Fundamentals of Power Electronics
39
Chapter 9: Controller design
fz
fp
Lead compensator design
To optimally obtain a compensator phase lead of q at frequency fc, the
pole and zero frequencies should be chosen as follows:
fz = fc
fp = fc
1 ± sin q
1 + sin q
1 + sin q
|| Gc ||
Gc0
1 ± sin q
fz
If it is desired that the magnitude
of the compensator gain at fc be
unity, then Gc0 should be chosen
as
fz
Gc0 =
fp
Fundamentals of Power Electronics
fp
fz
Gc0
fp
fjmax
= fz fp
fp/10
0û
+ 45û/decade
fz/10
10fz
Ð 45û/decade
Ð Gc
f
40
Chapter 9: Controller design
Example: lead compensation
60dB
T0
40dB
|| T ||
T0 Gc0
|| T ||
original gain
20dB
ÐT
f0
compensated gain
fz
0dB
fc
fp
Ð20dB
Ð40dB
0û
compensated phase asymptotes
0û
ÐT
original phase asymptotes
Ð90û
jm
Ð180û
Ð270û
f
Fundamentals of Power Electronics
41
Chapter 9: Controller design
9.5.2. Lag (PI) compensation
w
Gc(s) = Gc¥ 1 + sL
Improves lowfrequency loop gain
and regulation
|| Gc ||
Ð 20dB /decade
Gc¥
fL
10fL
Ð Gc
0û
+ 45û/decade
Ð 90û
fL/10
f
Fundamentals of Power Electronics
42
Chapter 9: Controller design
Example: lag compensation
original
(uncompensated)
loop gain is
Tu0
Tu(s) =
1 + ws
0
compensator:
w
Gc(s) = Gc¥ 1 + sL
40dB
|| T ||
Gc¥Tu0
20dB
fL
Tu0
|| Tu ||
f0
fc
0dB
f0
Ð20dB
Ð40dB
90û
Ð Tu
0û
10 fL
Design strategy:
choose
ÐT
10 f0
Ð90û
jm
Ð180û
Gc¥ to obtain desired
crossover frequency
wL sufficiently low to
maintain adequate
phase margin
Fundamentals of Power Electronics
1Hz
10Hz
100Hz
1kHz
10kHz
100kHz
f
43
Chapter 9: Controller design
Example, continued
Construction of 1/(1+T), lag compensator example:
40dB
|| T ||
Gc¥Tu0
20dB
fL
f0
fc
0dB
fL
Ð20dB
Ð40dB
1Hz
f0
1
1
1+T
10Hz
G c¥ T u0
100Hz
1kHz
10kHz
100kHz
f
Fundamentals of Power Electronics
44
Chapter 9: Controller design
9.5.3. Combined (PID) compensator
Gc(s) = Gcm
w
1 + sL
1 + ws
p1
1 + ws
z
1 + ws
p2
40dB
|| Gc ||
20dB
|| Gc ||
Gcm
0dB
fc
fL
fz
Ð20dB
45û/dec
Ð40dB
90û/dec
Ð 90û
Ð Gc
fp2
fp1
fL/10
Ð Gc
fp1/10
10fL
90û
10fz f /10
p2
0û
Ð 90û/dec
10fp1
fz/10
Ð90û
Ð180û
f
Fundamentals of Power Electronics
45
Chapter 9: Controller design
9.5.4. Design example
L
50mH
+
vg(t)
28V
C
500mF
+
Ð
iload
v(t)
R
3W
H(s)
Ð
d
Fundamentals of Power Electronics
error
signal
ve
pulse-width vc G (s)
c
modulator
compensator
VM = 4V
46
Ð+
transistor
gate driver
fs = 100kHz
sensor
gain
Hv
vref
5V
Chapter 9: Controller design
Quiescent operating point
Input voltage
Vg = 28V
Output
V = 15V, Iload = 5A, R = 3W
Quiescent duty cycle
D = 15/28 = 0.536
Reference voltage
Vref = 5V
Quiescent value of control voltage Vc = DVM = 2.14V
Gain H(s)
Fundamentals of Power Electronics
H = Vref/V = 5/15 = 1/3
47
Chapter 9: Controller design
Small-signal model
V d
D2
1:D
L
+
Ð
vg(s)
+
Ð
+
V d
R
C
v(s)
R
i load(s)
Ð
vref ( = 0) +
Ð
error
signal
ve(s)
d(s)
Gc(s)
compensator
vc(s)
1
VM
VM = 4V
T(s)
H(s) v(s)
H(s)
H=1
3
Fundamentals of Power Electronics
48
Chapter 9: Controller design
Open-loop control-to-output transfer function Gvd(s)
60dBV
Ð Gvd
|| Gvd ||
40dBV
1
Gvd(s) = V
D 1 + s L + s 2LC
R
f0
20dBV
0dBV
standard form:
Gvd(s) = Gd0
Q0 = 9.5 Þ 19.5dB
|| Gvd || G = 28V Þ 29dBV
d0
10 ±1 / 2Q 0 f0 = 900Hz
Ð Gvd
0û
Ð90û
Ð20dBV
1
1 + s + ws
Q 0 w0
0
2
Ð180û
Ð40dBV
10
1 / 2Q 0
f0 = 1.1kHz
Ð270û
salient features:
Gd0 = V = 28V
D
w0
1
f0 =
=
= 1kHz
2p 2p LC
C = 9.5 Þ 19.5dB
Q0 = R
L
Fundamentals of Power Electronics
1Hz
10Hz
100Hz
1kHz
10kHz
100kHz
f
49
Chapter 9: Controller design
Open-loop line-to-output transfer function
and output impedance
Gvg(s) = D
1
1 + s L + s 2LC
R
Ñsame poles as control-to-output transfer function
standard form:
Gvg(s) = Gg0
1
1+
s + s
w0
Q 0 w0
2
Output impedance:
sL
Z out(s) = R || 1 || sL =
sC
1 + s L + s 2LC
R
Fundamentals of Power Electronics
50
Chapter 9: Controller design
System block diagram
T(s) = Gc(s)
1 G (s) H(s)
vd
VM
Gc(s) H(s) V
T(s) =
D 1+
VM
i load(s) load current
variation
1
s + s
w0
Q 0 w0
2
vg(s)
ac line
variation
vref ( = 0) +
Ð
ve(s)
Gc(s)
T(s)
vc(s)
VM = 4V
1
VM
d(s)
duty cycle
variation
Zout(s)
Gvg(s)
+
Gvd(s)
Ð
v(s)
+
converter power stage
H=1
3
H(s)
Fundamentals of Power Electronics
51
Chapter 9: Controller design
Uncompensated loop gain (with Gc = 1)
40dB
Ð Tu
|| Tu ||
20dB
|| Tu ||
Q0 = 9.5 Þ 19.5dB
Tu0 2.33 Þ 7.4dB
f0
0dB
1kHz
Ð20dB
With Gc = 1, the
loop gain is
Tu(s) = Tu0
Ð40dB
1
1 + s + ws
Q 0 w0
0
± 1
10 2Q
0û
Ð 40 dB/decade
f0 = 900Hz
0û
Ð Tu
Ð90û
2
Tu0 = H V = 2.33 Þ 7.4dB
D VM
Ð180û
1
10 2Q
1Hz
10Hz
100Hz
f0 = 1.1kHz
1kHz
10kHz
Ð270û
100kHz
f
fc = 1.8kHz, jm = 5û
Fundamentals of Power Electronics
52
Chapter 9: Controller design
Lead compensator design
¥ Obtain a crossover frequency of 5kHz, with phase margin of 52û
¥ Tu has phase of approximately -180û at 5kHz, hence lead (PD)
compensator is needed to increase phase margin.
¥ Lead compensator should have phase of +52û at 5kHz
¥ Tu has magnitude of -20.6dB at 5kHz
¥ Lead compensator gain should have magnitude of +20.6dB at 5kHz
¥ Lead compensator pole and zero frequencies should be
fz = (5kHz)
fp = (5kHz)
1 ± sin (52°)
= 1.7kHz
1 + sin (52°)
1 + sin (52°)
= 14.5kHz
1 ± sin (52°)
fc
G
=
¥ Compensator dc gain should be c0
f0
Fundamentals of Power Electronics
53
2
1
Tu0
fz
= 3.7 Þ 11.3dB
fp
Chapter 9: Controller design
Lead compensator Bode plot
40dB
|| Gc ||
fp
fz
Gc0
20dB
|| Gc ||
Gc0
Ð20dB
Ð40dB
fc
= fz fp
fz
0dB
0û
fp/10
fz/10
fp
Ð Gc
10fz
90û
0û
Ð Gc
Ð90û
Ð180û
1Hz
10Hz
100Hz
1kHz
10kHz
100kHz
f
Fundamentals of Power Electronics
54
Chapter 9: Controller design
Loop gain, with lead compensator
T(s) = Tu0 Gc0
1 + ws
z
1 + ws
p
s + s
w0
Q 0 w0
1+
2
40dB
|| T ||
20dB
|| T ||
Q0 = 9.5 Þ 19.5dB
T0 = 8.6 Þ 18.7dB
ÐT
f0
1kHz fz
1.7kHz fc
5kHz fp
900Hz
14kHz
0dB
Ð20dB
Ð40dB
0û
ÐT
0û
170Hz
1.4kHz
1.1kHz
1Hz
10Hz
100Hz
1kHz
17kHz
jm=52û
10kHz
Ð90û
Ð180û
Ð270û
100kHz
f
Fundamentals of Power Electronics
55
Chapter 9: Controller design
1/(1+T), with lead compensator
¥ need more
low-frequency
loop gain
40dB
20dB
|| T ||
Q0 = 9.5 Þ 19.5dB
T0 = 8.6 Þ 18.7dB
f0
0dB
Ð20dB
1
1+T
fz
¥ hence, add
inverted zero
(PID controller)
fc
1 / T0 = 0.12 Þ Ð 18.7dB
Q0
fp
Ð40dB
1Hz
10Hz
100Hz
1kHz
10kHz
100kHz
f
Fundamentals of Power Electronics
56
Chapter 9: Controller design
Improved compensator (PID)
Gc(s) = Gcm
w
1 + sL
1 + ws
p
1 + ws
z
40dB
|| Gc ||
|| Gc ||
fp
20dB
Gcm
0dB
fc
fL
fz
Ð20dB
45û/dec
Ð40dB
Ð Gc
Ð Gc
90û/dec
Ð 90û
fL/10
10fL
10fz
90û
Ð 45û/dec
0û
fp/10
Ð90û
fz/10
Ð180û
1Hz
10Hz
100Hz
1kHz
10kHz
100kHz
¥ add inverted
zero to PD
compensator,
without
changing dc
gain or corner
frequencies
¥ choose fL to be
fc/10, so that
phase margin
is unchanged
f
Fundamentals of Power Electronics
57
Chapter 9: Controller design
T(s) and 1/(1+T(s)), with PID compensator
60dB
40dB
|| T ||
Q0
20dB
fL f0
0dB
fz
fc
Ð20dB
Ð40dB
Q0
1
1+T
fp
Ð60dB
Ð80dB
1Hz
10Hz
100Hz
1kHz
10kHz
100kHz
f
Fundamentals of Power Electronics
58
Chapter 9: Controller design
Line-to-output transfer function
v
vg
20dB
Q0
Gvg(0) = D
0dB
open-loop || Gvg ||
Ð20dB
f0
D
T u0G cm
fL
Ð40dB
fz
fc
20dB/dec
Ð60dB
Ð 40dB/dec
G vg
closed-loop
1+T
Ð80dB
Ð100dB
1Hz
10Hz
100Hz
1kHz
10kHz
100kHz
f
Fundamentals of Power Electronics
59
Chapter 9: Controller design
9.6. Measurement of loop gains
Block 1
Block 2
A
Z1(s)
vref (s)
+Ð
ve(s)
+
G 1(s) ve(s) +
Ð
vx(s)
Z2(s)
G 2(s) vx(s) = v(s)
Ð
T(s)
H(s)
Objective: experimentally determine loop gain T(s), by making
measurements at point A
Correct result is
Z 2(s)
T(s) = G1(s)
G2(s) H(s)
Z 1(s) + Z 2(s)
Fundamentals of Power Electronics
60
Chapter 9: Controller design
Conventional approach: break loop,
measure T(s) as conventional transfer function
VCC
Block 1
Z1(s)
0
vref (s)
+Ð
ve(s)
Block 2
dc bias
G 1(s) ve(s) +
Ð
Ð
+
vy(s)
vx(s)
Z2(s)
G 2(s) vx(s) = v(s)
vz
Ð
+
Tm(s)
H(s)
measured gain is
Tm(s) =
vy(s)
vx(s)
vref = 0
vg = 0
Fundamentals of Power Electronics
Tm(s) = G1(s) G2(s) H(s)
61
Chapter 9: Controller design
Measured vs. actual loop gain
Actual loop gain:
T(s) = G1(s)
Z 2(s)
G2(s) H(s)
Z 1(s) + Z 2(s)
Measured loop gain:
Tm(s) = G1(s) G2(s) H(s)
Express Tm as function of T:
Tm(s) = T(s) 1 +
Tm(s) » T(s)
Fundamentals of Power Electronics
Z 1(s)
Z 2(s)
provided that
62
Z 2 >> Z 1
Chapter 9: Controller design
Discussion
¥ Breaking the loop disrupts the loading of block 2 on block 1.
A suitable injection point must be found, where loading is not
significant.
¥ Breaking the loop disrupts the dc biasing and quiescent operating
point.
A potentiometer must be used, to correctly bias the input to block 2.
In the common case where the dc loop gain is large, it is very
difficult to correctly set the dc bias.
¥ It would be desirable to avoid breaking the loop, such that the biasing
circuits of the system itself set the quiescent operating point.
Fundamentals of Power Electronics
63
Chapter 9: Controller design
9.6.1. Voltage injection
Block 1
Ð
vz
Block 2
+
i(s)
Z1(s)
0
vref (s)
+Ð
ve(s)
G 1(s) ve(s) +
Ð
Zs(s)
Ð
+
vy(s)
vx(s)
+
Ð
Z2(s)
G 2(s) vx(s) = v(s)
Tv(s)
H(s)
¥ Ac injection source vz is connected between blocks 1 and 2
¥ Dc bias is determined by biasing circuits of the system itself
¥ Injection source does modify loading of block 2 on block 1
Fundamentals of Power Electronics
64
Chapter 9: Controller design
Voltage injection: measured transfer function Tv(s)
Block 1
Network analyzer
measures
Tv(s) =
vy(s)
vx(s)
Ð
vz
Block 2
+
i(s)
Z1(s)
0
vref (s)
+Ð
ve(s)
G 1(s) ve(s) +
Ð
vref = 0
vg = 0
Zs(s)
Ð
+
vy(s)
vx(s)
+
Ð
Z2(s)
G 2(s) vx(s) = v(s)
Tv(s)
Solve block diagram:
H(s)
ve(s) = ± H(s) G2(s) vx(s)
Substitute:
± vy(s) = G1(s) ve(s) ± i(s) Z 1(s)
vy(s) = vx(s) G1(s) G2(s) H(s) +
Hence
± vy(s) = ± vx(s) G2(s) H(s) G1(s) ± i(s) Z 1(s)
with
i(s) =
vx(s)
Z 2(s)
Fundamentals of Power Electronics
65
Z 1(s)
Z 2(s)
which leads to the measured gain
Z (s)
Tv(s) = G1(s) G2(s) H(s) + 1
Z 2(s)
Chapter 9: Controller design
Comparison of Tv(s) with T(s)
Actual loop gain is
T(s) = G1(s)
Z 2(s)
G2(s) H(s)
Z 1(s) + Z 2(s)
Gain measured via voltage
injection:
Z (s)
Tv(s) = G1(s) G2(s) H(s) + 1
Z 2(s)
Express Tv(s) in terms of T(s):
Tv(s) = T(s) 1 +
Z 1(s)
Z (s)
+ 1
Z 2(s)
Z 2(s)
Condition for accurate measurement:
Tv(s) » T(s) provided (i)
Z 1(s) << Z 2(s) , and
(ii) T(s) >>
Fundamentals of Power Electronics
66
Z 1(s)
Z 2(s)
Chapter 9: Controller design
Example: voltage injection
Block 1
Block 2
vz
50W
+
Ð
+
Ð
Ð
+
vy(s)
vx(s)
+
Ð
1+
Z 1(s)
= 1.1 Þ 0.83dB
Z 2(s)
10 4
suppose actual T(s) =
1+
Fundamentals of Power Electronics
500W
Z 1(s) = 50W
Z 2(s) = 500W
Z 1(s)
= 0.1 Þ ± 20dB
Z 2(s)
s
2p 10Hz
67
1+
s
2p 100kHz
Chapter 9: Controller design
Example: measured Tv(s) and actual T(s)
100dB
Tv(s) = T(s) 1 +
80dB
Z 1(s)
Z (s)
+ 1
Z 2(s)
Z 2(s)
|| Tv ||
60dB
|| T ||
40dB
20dB
0dB
Ð20dB
Ð40dB
10Hz
Z1
Þ ± 20dB
Z2
|| Tv ||
|| T ||
100Hz
1kHz
10kHz
100kHz
1MHz
f
Fundamentals of Power Electronics
68
Chapter 9: Controller design
9.6.2. Current injection
Ti(s) =
i y(s)
i x(s)
vref = 0
vg = 0
Block 1
Z1(s)
0
vref (s)
Block 2
+Ð
ve(s)
iy
ix
iz
G 1(s) ve(s) +
Ð
Zs(s)
Z2(s)
G 2(s) vx(s) = v(s)
Ti(s)
H(s)
Fundamentals of Power Electronics
69
Chapter 9: Controller design
Current injection
Injection source impedance Zs
is irrelevant. We could inject
using a Thevenin-equivalent
voltage source:
It can be shown that
Ti(s) = T(s) 1 +
Z 2(s)
Z (s)
+ 2
Z 1(s)
Z 1(s)
(i)
Fundamentals of Power Electronics
ix
Cb
Rs
Z 2(s) << Z 1(s) , and
(ii) T(s) >>
iz
iy
Conditions for obtaining accurate
measurement:
Z 2(s)
Z 1(s)
vz
70
Chapter 9: Controller design
9.6.3. Measurement of unstable systems
¥ Original (unstable) loop gain is
measured (not including Zs ),
while circuit operates stabily
¥ Injection source impedance Zs
does not affect measurement
¥ Increasing Zs reduces loop
gain of circuit, tending to
stabilize system
Z1(s)
0
vref (s)
+Ð
ve(s)
vz
Ð
Block 1
Rext
Ð
Zs(s)
+
Block 2
+
Lext
G 1(s) ve(s) +
Ð
vy(s)
vx(s)
+
Ð
Z2(s)
G 2(s) vx(s) = v(s)
Tv(s)
H(s)
Fundamentals of Power Electronics
71
Chapter 9: Controller design
9.7. Summary of key points
1. Negative feedback causes the system output to closely follow the
reference input, according to the gain 1 / H(s). The influence on the
output of disturbances and variation of gains in the forward path is
reduced.
2. The loop gain T(s) is equal to the products of the gains in the
forward and feedback paths. The loop gain is a measure of how well
the feedback system works: a large loop gain leads to better
regulation of the output. The crossover frequency fc is the frequency
at which the loop gain T has unity magnitude, and is a measure of
the bandwidth of the control system.
Fundamentals of Power Electronics
72
Chapter 9: Controller design
Summary of key points
3. The introduction of feedback causes the transfer functions from
disturbances to the output to be multiplied by the factor 1/(1+T(s)). At
frequencies where T is large in magnitude (i.e., below the crossover
frequency), this factor is approximately equal to 1/T(s). Hence, the
influence of low-frequency disturbances on the output is reduced by a
factor of 1/T(s). At frequencies where T is small in magnitude (i.e.,
above the crossover frequency), the factor is approximately equal to 1.
The feedback loop then has no effect. Closed-loop disturbance-tooutput transfer functions, such as the line-to-output transfer function or
the output impedance, can easily be constructed using the algebra-onthe-graph method.
4. Stability can be assessed using the phase margin test. The phase of T
is evaluated at the crossover frequency, and the stability of the
important closed-loop quantities T/(1+T) and 1/(1+T) is then deduced.
Inadequate phase margin leads to ringing and overshoot in the system
transient response, and peaking in the closed-loop transfer functions.
Fundamentals of Power Electronics
73
Chapter 9: Controller design
Summary of key points
5. Compensators are added in the forward paths of feedback loops to
shape the loop gain, such that desired performance is obtained.
Lead compensators, or PD controllers, are added to improve the
phase margin and extend the control system bandwidth. PI
controllers are used to increase the low-frequency loop gain, to
improve the rejection of low-frequency disturbances and reduce the
steady-state error.
6. Loop gains can be experimentally measured by use of voltage or
current injection. This approach avoids the problem of establishing
the correct quiescent operating conditions in the system, a common
difficulty in systems having a large dc loop gain. An injection point
must be found where interstage loading is not significant. Unstable
loop gains can also be measured.
Fundamentals of Power Electronics
74
Chapter 9: Controller design