A Non-Charge-Sheet Analytic Theory for Undoped Symmetric Double-Gate
MOSFETs from the Exact Solution of Poisson’s Equation using SPP Approach
Jin He, Xuemei Xi, Chung-Hsun Lin, Mansun Chan*, Ali Niknejad, and Chenming Hu
jinhe@eecs.berkeley.edu
Department of EECS, University of California at Berkeley, CA, 94720
Department of EEE, HKUST, Clear Water Bay, Kowloon, Hong Kong
*
ABSTRACT
A non-charge-sheet based analytic theory for
undoped symmetric double-gate MOSFETs is presented in
this paper. The formulation is based on the exact solution
of the Poisson’s equation to solve for electron concentration
directly rather than relying on the surface potential alone.
Therefore, carrier distribution in the channel away from the
surface is also taken care, giving a non-charge-sheet model
compatible with the classical Pao-Sah model.
The
formulated model has an analytic form that does not need to
solve for the transcendent equation as in the conventional
surface potentials or Pao-Sah formulation. The validity of
the model has also been demonstrated by extensive
comparison with AMD double-gate MOSFET’s data
Keywords: Double-gate, MOSFETs, Compact modeling.
1
INTRODUCTION
As CMOS scaling continue to beyond the 50nm node,
undoped (or lightly-doped) double-gate MOSFETs have
become the most promise candidate device structure due to
a number of unique features such as ideal 60 mV/decade
subthreshold slope, volume inversion, free-dopantassociated fluctuation effects and so on . Compact modeling
of this structure has been extensively studied. Most of these
models, however, have to rely on the charge-sheet
approximation. For thick film devices, carrier distribution
with near a zero-thickness sheet can capture the essential
part of double-gate MOSFET’s characteristics. For an
ultra-thin double gate MOSFET, the charge-sheet
approximation cannot be used because the inversion layer
thickness is comparable with silicon film thickness and a
number of results from the charge-sheet approximation
become invalid.
In a recent work, a one-dimensional (1-D) PoissonBoltzamnn equation was solved for the double-gate
MOSFET to derive analytical solution for surface potential
and inversion charge density by Prof.Taur’s group. This
result can serve as a core foundation for developing noncharge-sheet-based model. Due to the numerical complexity
and the need to solve a number of transcendental equations,
the model is difficult to be implemented in circuit
simulator. A simpler and yet equally accurate model is thus
desired, not only for efficiency of simulation, but also to
provide insight into the operation of the double-gate
MOSFETs.
In this work, we have derived a non-charge-sheet based
analytic theory for undoped symmetric double-gate
MOSFETs by solving the exact carrier concentration based
on both the surface potential and the quasi-Fermi potential
in the channel to account for the vertical potential profile
and distribution of the carrier. We referred this approach as
surface potential plus (SPP), which is compatible with the
Pao-Sah formulation. The analytical model has also been
verified by AMD double-gate MOSFET’s data.
2
ANALYTICAL SOLUTION
Fig. 1 shows the coordinate and energy level
distribution diagrams of a symmetric double-gate
MOSFET. We assume that the same voltage is applied to
the two gates having the same work function. The
formulation starts with the 1-D Poisson's equation along to
the vertical direction of the silicon channel considering only
the mobile charge (electron) density for the undoped body.
d 2φ
qn
(1)
=
dx
ε
2
si
where q is the electronic charge, εSi is the permittivity of
silicon, and n is the intrinsic carrier density. According to
Boltzmann statistics, the mobile electron concentration can
be expressed in term of potential
§ q (φ − v ch ·
§ q ( φ 0 − v ch · (2)
n = n i exp ¨
©
kT
¸ n 0 = n i exp ¨
¹
©
kT
¸
¹
The spatial derivatives of the electron from (2) are
dφ
kT dn
=
dx
qn dx
d 2φ
kT d 2 n
kT § dn ·
=
−
¨
¸
dx 2
qn dx 2
qn 2 © dx ¹
(3)
2
(4)
Substitution (4) into (1) gives an equation for electron
concentration
2
d 2 n 1 § dn ·
q 2n 2
(5)
=
+
¨
¸
dx 2
n © dx ¹
ε kT
This normal differential equation has two mathematical
solutions, one is a trigonometric function and another is a
hyperbolic function.
(6)
n( x ) =
c0
c0
n( x ) =
1/ 2
ª§ q 2 c ·1 / 2 º
ª
º
§ q 2c0 ·
0
¸¸ x»
¸¸ x »
cos 2 «¨¨
cosh 2 «¨¨
«¬© 2εkT ¹
«¬© 2εkT ¹
»¼
»¼
Based on a physically reasonable consideration, the former
124
NSTI-Nanotech 2004, www.nsti.org, ISBN 0-9728422-8-4
Vol. 2, 2004
solution is taken. We choose the reference coordinate point
as x = 0 and n( x ) = no , (6) is further simplified into
(7)
n (x
n0
)=
ª§ q 2n
0
« ¨¨
«¬ © 2 ε kT
2
cos
·
¸¸
¹
1 / 2
º
x»
»¼
Substitution of (7) into (1) gives the corresponding
electrical field and potential distributions in silicon film as
1/ 2
ª 2
º
(8)
kT
−2 § q n0 ·
φ (x ) − φ 0 =
¸
« ¨¨
2ε kT ¸¹
¬« ©
ln cos
q
ª 2 n 0 kT º
E (x ) − E ( x 0 ) = «
»
¬ ε
¼
1/ 2
x»
¼»
ª§ q 2n
0
tan « ¨¨
«¬ © 2 ε kT
·
¸¸
¹
1/ 2
º
x»
»¼
(9)
The symmetry boundary condition of a symmetric double
gate MOSFET set the electric field in the center of the
silicon film to be zero. Thus, the reference coordinate takes
the center of the film as the point of x = 0. The surface
potential and the surface electric field are then given by
φ s = v ch +
ªn
kT
ln « 0 cos
q
« ni
¬
ª 2 n 0 kT º
Es = «
»
¬ ε
¼
1/ 2
−2
ª§ q 2 n
0
tan « ¨¨
«¬ © 2 ε kT
If we define Q = q
in
ª§ q 2 n
0
Ǭ
«¬ ¨© 2 ε kT
·
¸¸
¹
1/ 2
·
¸
¸
¹
1/ 2
T si º º
»»
2 »»
¼¼
T si º
»
2 »
¼
(10)
(11)
³
n(x )dx as half of the total inversion
charge, it can be expressed
]1 / 2
ª§ q 2 n
0
tan « ¨¨
«¬ © 2 ε kT
·
¸
¸
¹
1/ 2
T si º
»
2 »
¼
(12)
ε ox
Substituting the surface potential and inversion charge into
(13) results gives
1/ 2
1/ 2
ª§ q2n ·1/ 2 T º (14)
kT ªn0 −2 ª§ q2n0 · Tsi ºº εsi ª2n0kTº
0
si
¸
ln« cos «¨¨
q «ni
«¬© 2εkT¸¹
¬
¸
»» + tox
tan«¨¨
2 »» εox «¬ ε »¼
«¬© 2εkT¸¹
¼¼
»
2»
¼
Eq.(14) is the exact closed form expression for
electron concentration at the center of the channel silicon
(n0) as a function of gate voltage, channel voltage, and
silicon film. This expression is useful because of its
exactness, but too complex to be implemented in compact
model due to the transcendental equation. We will next
simplify Eq. (14) to a more manageable form. The
inversion charge expression given in Eq. (12) can be also be
expressed as
(15)
ª§ q n · T º
2
ª§ q 2 n ·
0
Q = 2ε si n0 kT tan «¨¨
¸¸
«¬© 2εkT ¹
1/ 2
2
in
2
2
1/ 2
0
sin 2 «¨¨
¸¸
«¬© 2ε si kT ¹
2
2
0
si
in
si
¸ si ≈
»≈¨
exp( f )
2 » ¨© 2ε si kT ¸¹ 4 2ε si kT 2
¼
This approximation works well for ultra-thin
silicon case, leading to a negligible error. In fact, we will
find in the following expression that this sine function term
comes into effect in the sub-threshold region. In order to
compensate the error leaded by this approximation, we use
a dimensionless correction factor f . This factor should be
a step function of the gate voltage, e.g. equal to unit below
the threshold point and zero above the threshold point. An
exact approximate solution of this factor is written as
2
(17b)
ª tanh (v G − ∆ φ i ) º
f = «
¬
v
G
− ∆ φ
»
¼
i
via comparison with the numerical result and 2-D
simulation. In this case, we have
1/2
(17c)
2
ª
·
T º
qQ
T
2 § q n
sin
0
« ¨¨
¸¸
«¬ © 2 ε si kT ¹
si
in
» =
2 »
2 ε si kT
¼
si
2
exp
(f )
Making use of this approximation, (16) is written as
The surface potential, field and carrier concentration are
controlled by the applied gate voltage. According to
Gauss’s law, the gate voltage is
Q
(13)
VG − ∆ψ i = φS + Eox tox = φ s + in tox
VG −∆ψi −vch =
On the other hand, since a tangent function of the
inversion charge expression is mainly determined by cosine
function, an popular approximation is used to substitute
sine function that can be combined with Eq. (16).
(17a)
ª§ q n · T º § q n · T
qQ T
T si / 2
0
Q in = [2 ε n 0 kT
region where the potential profile in the vertical direction is
almost flat and resulting in volume inversion. In the subthreshold region case, the entire channel region contributes
to conduction, and the inversion charge is almost
proportional to the silicon film thickness. Therefore, we
can express the inversion charge as
(16)
Q in = qn 0 T si / 2
1/ 2
0
si
»
sin 2 «¨¨
¸¸
«¬© 2ε si kT ¹ 2 »¼
Tsi º
» = 2ε si n0 kT
1/ 2
ª§ q 2 n · T º
2»
¼
0
si
¸¸
»
cos 2 «¨¨
«¬© 2ε si kT ¹ 2 »¼
We will use the inversion charge expression to
eliminate the surface potential term in Eq.(13). This surface
potential term comes into effect only in the sub-threshold
Qin =
(18)
qn0Tsi / 2 exp( f )
ª§ q 2 n · 1 / 2 T º
0
si
¸
»
cos 2 «¨¨
2εkT ¸¹
2»
¼
¬«©
Substitution of (18) into (13) and replacing the surface
potential gives
fkT
kT
Qin
(19)
VG − ∆ψ i − vch +
q
ln(qniTsi / 2) =
q
ln Qin +
ε ox / tox
This inversion charge equation is similar to that
given by the bulk SPP model, except the sub-threshold
slope n is replaced with by 60mV at room temperature.
Thus, a similar approach as in the SPP can be used to obtain
a consistent I-V and C-V characteristics
To simplify subsequent derivation, all voltages are
normalized by kT / q and inversion charge is normalized by
Cox kT / q . (19) becomes after simplification
§ q 2 niTsitox ·
¸¸ = ln qin + qin
vG − ∆φi − vch + f ln¨¨
© 2kTε ox ¹
(20)
The inversion charge in (20) is solved explicitly in
terms of the Lambert W function to yield the following
exact expression.
ª §
§ q 2niTsitox · ·º
(21)
¸¸ ¸»
qin = W0 «exp¨¨ vG − ∆φi − vch + f ln¨¨
¸
2
kT
ε
ox ¹ ¹ ¼
»
©
¬« ©
NSTI-Nanotech 2004, www.nsti.org, ISBN 0-9728422-8-4
Vol. 2, 2004
125
where W0 stands for the usual short-hand notation used for
the principal branch of the ‘‘Lambert-W’’ function.
The exact solution that we propose makes use of
the principal branch of the Lambert W function which is
defined as the solution to the equation Wew = x . The
Lambert W function is a popular function in numerous
physics applications. It has also been used to provide
solutions to previously unsolved basic diode and bipolar
transistor circuit analysis. Once the inversion charge is
obtained, the I-V and C-V characteristics of undoped
double gate MOSFET can be directly formulated.
We next proceed to describe the modeling of the
IV characteristics. According to Pao-Sah model, the current
including the diffusion and drift component is written as
2
dv ch
§ kT ·
(22)
¸¸ q in
I ds = µ wC ox ¨¨
q
dy
©
¹
For constant gate voltage, the differential of (20) can be
written as
dv ch = dq in / q in + dq in
(23)
here we neglect the derivative contribution of f factor since
it is a step function. Substitution of (23) into (22) gives
I ds
§ kT
= µ wC ox ¨¨
© q
2
·
¸¸ ( q in dq in + dq in )
¹
(24)
As a result, an analytical current expression is obtained.
2
º
§ kT · ª q s2 − q d2
µw
(25)
¸
+ (q − q )
C ¨
I =
ds
ox
L
¨ q ¸ «
¹ ¬
©
2
s
d
»
¼
As the charge formulation only accounts for half of the
channel, the final current of a double-gate MOSFET should
be doubled.
Note that the final current expression is similar to
that of the SPP derived by the bulk model. Thus, a unified
framework can be used for bulk and the undoped symmetric
double-gate MOSFETs. This results in simple methodology
to obtain both the I-V and C-V characteristics with already
formulated such as gate tunneling current, short channel
effect, QME and non-uniform lateral body doping [19]. In
addition, the unified approach to treat the different device
structures significantly simplify the study of the relative
advantages of different device structure to be used to extend
the CMOS scaling roadmap to the nanometer regime. .
3
RESULTS AND DISCUSSION
3.1 Electron and potential in the silicon film
Fig.2 illustrates the electron concentration and
electrical potential distribution in the silicon film predicted
by the analytical model for three different effective gate
voltages. In low gate voltage or the subthreshold region, the
electron distribution is almost constant along the vertical
direction of the film as predicted by Qin = qn0Tsi / 2 . With
the increase of the effective gate voltage, the device goes
into the strong inversion region where the surface electron
concentration shows several order higher than that of the
silicon film center. In this case, device behaves like a
126
surface channel bulk MOSFET and the surface electron
concentration dominates the inversion charge density.
3.2 Surface potential and inversion charge dependence
on the bias
Fig.3 shows the carrier charge per unit area in the
channel versus the applied gate voltage, as calculated with
(20), for three values of channel voltage. There are two
distinct regions of operation in the undoped symmetric
double-gate MOSFET, just like in a conventional MOSFET
as shown in Fig.3(b). One significant result is the relation
between the inversion charge density and the channel
voltage. In contrast to the gate voltage, Fig.3 indicates that
the channel voltage increases the inversion charge
correspondingly decreases. One interesting observation is
that the equivalent dielectric thickness has a slight effect on
the surface potential in strong inversion region and has
almost no effect on the sub-threshold region in the undoped
bulk MOSFETs, as shown in Fig.4. This physical picture is
in different from that of a conventional bulk MOSFETs
where the sub-threshold region slope has a strong
dependence on the oxide thickness.
3.3 Volume inversion
Fig.5 demonstrates the effect of the silicon film
thickness on the inversion charge versus gate voltage
characteristics. The silicon film thickness affects the
amount of sub-threshold inversion charge but has no effect
on the strong inversion charge density. This verified the
existence of the volume inversion and implies that decrease
of the silicon thickness can effectively control the subthreshold region leakage current. It illustrates a potential
weakness in the used of undoped symmetric double
MOSFETs for nano-CMOS application. To optimize the
device performance, the silicon film thickness should be
reduced to suppress the off current.
3.4 I-V characteristics
In order to verify the validity of the analytical
model, we use this model to simulate a well-temped
undoped double-gate MOSFET with the channel length of
10µm and gate oxide thickness of 3nm. A long channel
device is used to avoid the complicated short channel effect
to hinder the detail picture of 1-D analysis in the vertical
direction of the channel. Short channel effects will be
considered in future work. Fig.6 and Fig.7 show the DG
MOSFET current voltage characteristics predicted by the
derived analytical model with the constant mobility of
400 cm 2 / V .s . The model is continuous from the sub to the
strong inversion region at all drain bias conditions, as
shown in Fig.6. One observation is that the drain voltage
has no effect on the sub-threshold current but increases the
strong inversion current. The saturation characteristics
given by the model is also observed from Fig.7. Fig. 8
shows this model fitting for AMD double-gate MOSFET’s
data by using SPP modules on SCE, DIBL, QME, ect. In
DG model. A good agreement is found between both.
NSTI-Nanotech 2004, www.nsti.org, ISBN 0-9728422-8-4
Vol. 2, 2004
CONCLUSION
1
Tox=2nm
-3
10
20
-5
10
10
-7
10
-9
10
0.0
0.3
0.6
0.9
Normalized inversion charge
30
-1
10
VGate=1V, Tox=2nm
Normalized inversion charge
Normalized inversion charge
In this paper, we have developed a non-chargesheet based analytical theory for undoped symmetric
double-gate MOSFET.
We have derived the exact
analytical solution of the electron concentration and density
as an explicit function of the gate voltage and silicon film,
thickness valid for all device operation regions. The result
agrees well with the Pao-Sah current formulation and
physically accurate. The presented model works with a
more generic SPP framework that can be used to model a
wide range of devices to be used in nano-CMOS
technology and been verified by AMD double-gate data.
15
-2
10
Tsi=10nm
Tsi=25nm
Tsi=35nm
-5
10
10
5
-8
10
0
-11
0
1.5
1.2
20
10
40
Tsi=6nm
Tsi=25nm
Tsi=35nm
1
10
10
0.0
0.2
Gate voltage [ V ]
0.4
0.6
0.8
1.0
1.2
channel voltage [ V ]
Fig.5 The mobile carrier density as a function of gate
voltage and channel voltage with the different silicon
thickness for undoped DG MOSFETs.
10
-4
-5
8.0x10
Vds=0.8V
Vds=0.8V
Vds=0.5V
Drain
10
-5
10
-6
10
-7
Vds=0.1V
-5
6.0x10
Drain current [ mA ]
Drain current (mA)
Gate
Oxide
Source
Normalized inversion charge
4
Oxide
-5
4.0x10
Vds=0.5V
-5
2.0x10
Gate
-0.2
0.0
0.2
0.4
0.6
0.8
Vds=0.1V
1.0
0.0
-0.2
Fig.1. Diagrams of the structure and energy levels of
undoped double-gate MOSFETs.
10
18
10
17
VG − ∆ψ
V
V
10
G
G
− ∆ ψ
i
− ∆ψ
i
-6
-4
-2
0
10
19
10
18
10
17
10
16
= 0 . 5 7 4V
i
= 0 . 4 8 2 1V
= 0 .4 0 9 4V
16
-8
10
2
4
6
8
0.5
0.4
0.3
-8
-6
-4
-2
0
2
4
6
1 .2 x 1 0
-4
1 .0 x 1 0
-4
8 .0 x 1 0
-5
6 .0 x 1 0
-5
4 .0 x 1 0
-5
2 .0 x 1 0
-5
V g = 1 .2 V
I
V g = 0 .9 V
V g = 0 .6 V
0 .0
0 .0
0 .5
1 .0
ds
2 .0
2 .5
[ V ]
T ox =2nm, T si=30nm
1
25
Vch=0.5V
Fig.7. The drain current versus the drain voltage with the
different gate voltage for a 10um DG undoped MOSFETs.
V ch=0.5V
Vch=0.3V
Qin/CoxVt
Qin/CoxVt
1 .5
V
30
0
1.0
8
Position in silicon film , x [um ]
Fig.2. The mobile electron and potential distribution as a
function of the silicon film thickness for undoped
MOSFETs with symmetric double-gate structure.
10
0.8
V g = 1 .5 V
VG −∆ψi = 0.4094V
Position in silicon film, x [ um ]
10
0.6
VG −∆ψi =0.574V
VG −∆ψi =0.4821V
(mA)
19
0.4
Fig.6. The drain current versus the gate voltage with the
different drain voltage for a 10um undoped MOSFETs with
symmetric double-gate structure.
T si=16nm , T ox=2nm
0.6
0.2
Vg [ V ]
ds
10
20
Electric potential [ V ]
10
-3
Electron concentration [ cm ]
T si=16nm, T OX=2nm
20
0.0
Vg [ V ]
Vch=0.1V
20
V ch=0.3V
15
V ch=0.1V
Tox=2nm, Tsi=30nm
10
0.6
0.9
1.2
1.5
0.3
Vg [ V ]
0.6
0.9
Vg [ V ]
1.2
10
-5
10
-6
10
-7
10
-8
0.6
Surface potential [ V ]
Vch=1.5 V
2.0
Vch=1.0 V
1.5
Vch=0.5 V
1.0
Vch= 0.0 V
0.5
10
-4
L g=55nm Tsi= 26nm
Lg=80nm Tsi= 26nm
Tox=1nm
Tox=2nm
Tox=5nm
10
-9
10
-5
10
-6
10
-7
0.0
0.5
1.0
0.4
-5
10
-6
10
-7
10
V D=0.1V Data
V D=1.2V Data
MDE simulation results
-8
Gate Voltage (V)
0.5
10
V D=0.1V Data
V D=1.2V Data
MDE simulation results
V D=0.1V Data
V D=1.2V Data
MDE simulation results
0.7
2.5
-4
1.5
Fig.3. The mobile carrier density as a function of gate
voltage with the different channel voltage for DG undoped
MOSFETs.
Surface potential [ V ]
10
Drain Current (A)
0.3
-4
Lg=105nm Tsi= 26nm
0
0.0
Drain Current (A)
0.0
10
5
Drain Current (A)
-1
10
0.0
0.5
1.0
Gate Voltage (V)
10
-8
0.0
0.5
Gate Voltage (V)
Fig.8 Comparison between the analytical model and AMD
double-gate data.
0.3
0.2
0.1
0.0
0.0
0.5
1.0
1.5
Vg [ V ]
2.0
2.5
3.0
0.0
0.0
0.3
0.6
0.9
Vg [V]
1.2
1.5
Fig.4 Surface potential versus gate voltage with the
different oxide thickness and channel voltage for DG
undoped MOSFETs.
Acknowledgement: This work was supported by SRC
under the contract number 2002-NJ-1001 and partially
supported by a grant from RGC of Hong Kong under the
number HKUST6111/03E. We also thank AMD
Corporation for providing experimental data and Prof. Taur
from UC of San Diego for useful discussion.
NSTI-Nanotech 2004, www.nsti.org, ISBN 0-9728422-8-4
Vol. 2, 2004
127
1.0