Floorplanning Based on Particle Swarm Optimization Tsung-Ying Sun, Member, IEEE, Sheng-Ta Hsieh, Student Member, IEEE, Hsiang-Min Wang and Cheng-Wei Lin Department of Electrical Engineering National Dong Hwa University Hualien, Taiwan, R.O.C. E-mail: sunty@mail.ndhu.edu.tw Abstract This paper presents a floorplanning method based on particle swarm optimization (PSO). We adopted the B*-tree floorplan structure to generate an initial stage with overlap free for placement and utilized PSO to find out the potential optimal placement solution. Unlike other related research, our method can avoid the solution from falling into the local minimal and has ability of more efficiency and robustness for explored solution space. Experiments employing MCNC and GSRC benchmarks show that the performance of our method for placement by the ability of exploring better solutions. The proposed approach exhibited rapidly convergence and led to more optimal solutions than other related approach. 1. Introduction Floorplanning has been an important stage in VLSI design as a means to manage circuit complexity and deep-submicron effects. Floorplanning in VLSI design is to arrange the modules on a chip under the constraint that no two modules are overlap while controlling the area, wire length, and other performance indices to be optimal. Today, automatic floorplanning is encouraged by the growing adoption of embedded memories and IP blocks in System on Chips (SoCs) deigns. The physical placement of circuits in VLSI chips or SoCs has been given sustained attention in the recent years. Early research on the placement problem applied force to reduce the overlap betweens cells [1]. [2-4] shows the generation of overlap free placements, and [5] compare various floorplan representations which cooperate with simulated annealing (SA). Adopting a floorplan representations could easily apply to different applications and various requirements through modify objective functions. The drawback of adopting SA is that the system must be close to equilibrium throughout the process, which demands a careful adjustment of the annealing schedule parameters. [6-7] shows the generated layouts with cell overlaps. While allowing overlaps during the process of placement was shown to obtain a better floorplanning solution, this process could not guarantee the entire elimination of overlaps. [8] introduced an integer linear programming (ILP) formula for finding the optimal module orientations in macrocell placement. The proposed method handles multi-terminal nets based on the Manhattan metric of the minimum bounding box of the pin positions which is more accurate than some earlier approaches which can only adapt to two-terminal nets based on the Euclidean metric for wire length estimation. As opposed to these previously mentioned methods, we adopt a non-slicing structure of representation B*tree with particle swarm optimization (PSO) algorithm in this paper. PSO is a swarm intelligence method that roughly models the social behavior of swarms. The consequence of modeling this social behavior is that the search process allows particles to stochastically return toward previously successful regions in the search space. It has proved to be efficient on many problems in science and engineering. Our method can reduce much of computational time, obtains rapid convergence and better solutions. Furthermore, our floorplanner can widely explore the solution space and prevent the solution from falling into the local minimal We divided this paper into five sections. Section II describes the original PSO methodology. Section III presents B*-tree representation and our proposed methods for floorplanning. Section IV exhibits the experiment results. Finally, the conclusion is in section V. Proceedings of the 2006 Emerging VLSI Technologies and Architectures (ISVLSI’06) 0-7695-2533-4/06 $20.00 © 2006 IEEE 2. Particle swarm optimization 3. PSO for floorplanning The PSO is a population based optimization technique that was proposed by Kennedy and Eberhart [9] in 1995, which the population is referred to as a swarm. The particles express the ability of fast convergence to local and/or global optimal position(s) over a small number of generations. A swarm in PSO consists of a number of particles. Each particle represents a potential solution of the optimization task. All of the particles iteratively discover the probable solution. Each particle generates a position according to the new velocity and the previous positions of the cell, and is compared with the best position which is generated by previous particles in the cost function and keeps the best one; i.e., each particle accelerates the directions not only the local best solution but also the global best position. If a particle discovers a new probable solution, other particles will move closer to it so as to explore the region more completely in the process [10]. Let s denote the swarm numbers. In general, there are three attributes, current position xi, current velocity vi and local best position yi, for particles in the search space to present their features. Each particle in the swarm is iteratively updated according to the aforementioned attributes. Assuming that the function f is to be minimized so that the dimension consists of n particles and the new velocity of every particle is updated by (1). 3.1. The B*-tree representation vi , j (t + 1) = wvi , j (t ) + c1 r1,i, j (t )[ yi, j (t ) − xi , j (t )] + c2 r2,i, j (t )[ yˆ j (t ) − xi , j (t )] In this paper, we adopted the B*-tree representation to model a floorplan [4]. A B*-tree is an ordered binary tree for modeling non-slicing floorplans. Figure 1 shows a packing of floorplan and its corresponding B*tree, where the tree nodes ni are directly mapping to the placement blocks bi . The root of B*-tree which denotes as n0 is corresponding to the block b0 on the bottom-left corner of the placement. The construction of a B*-tree is starting from the root, and then the first recursively create the left subtree, finally is the right subtree. Let Ri be the set of blocks located on the right-hand side and adjacent to bi. The left child of the node ni corresponds to the lowest, unvisited block in Ri. The right child of ni represents the lowest block located above and with its x-coordinate equal to that of bi and its y-coordinate less than that of the top boundary of the module on the left-hand side and adjacent to bi. n0 b5 b7 n2 n1 b4 b2 b3 b0 b1 (1) (a) n3 b6 n5 n4 n7 n6 (b) where vi , j is the velocity of the ith particle of the jth swarm for all j ∈1... s , w is the inertia weight of velocity, c1 and c2 denote the acceleration coefficients, r1 and r2 are elements from two uniform random sequences in the range (0, 1), and t is the number of generations. The new position of the ith particle is calculated as follows: xi (t + 1) = xi (t ) + vi (t + 1) Figure 1. A packing represented by B*-tree Each nodes combination of B*-tree corresponds to a floorplan. Therefore, the solution space consists of all B*-trees with the given nodes (blocks). In order to find a next better solution, the B*-tree is disturbed by following operations to get another nodes combination: (2) The local best position of each particle could be updated by (3), and the global best position ŷ was found from all particles by (4). if f (xi (t + 1)) ≥ f ( yi (t )) ⎧ yi (t ), yi (t + 1) = ⎨ ⎩ xi (t + 1), if f (xi (t + 1)) < f ( yi (t )) yˆ (t + 1) = arg min f ( yi (t + 1)), 1 ≤ i ≤ n (3) (4) yi Proceedings of the 2006 Emerging VLSI Technologies and Architectures (ISVLSI’06) 0-7695-2533-4/06 $20.00 © 2006 IEEE 1. Node movement This operation will delete a node and insert it into other place of the tree. 2. Nodes (blocks) swap This operation will swap two blocks of the tree. 3. Block rotation This operation just rotate blocks without change the tree structure. 3.2. Handling Floorplanning Using Particle Swarm Optimization Create and initiate a B*-tree and an N-dimensional PSO: P Repeat: Execute PSO to update P by (1) and (2) Perturb the B*-tree for each particle i ∈ [1... m] if f ( xi ) < f ( yi ) or f ( xi ) is acceptable At the beginning move, each particle move will random pick up one operation that mentioned above, after that, the particles movement will inherit the pervious experience, i.e. past best solution and global best solution to guide them to select a suitable operation for finding a better solution. In the searching space, each particle move will lead the solution toward global best solution. Figure 2 illustrates the particle movement behavior for getting a better solution. then yi = xi if f ( yi ) < f ( yˆ ) then yˆ = yi endfor Until Termination condition reached Figure 3. Pseudo code Circuit : Particles : Optimal solution Figure 2. Particle movement behavior Adopting more than one particle will explore more potential better solutions and each particle would provide its experience for other particles to prevent any particle’s solution from trapping into local minimal and jump out to find better solution. The amount of particles would not influence the computation time directly. Due to more amounts of particles will find more solution in current generation and spend more time on computation. Therefore, it would spend less generation for getting an acceptable solution. On the contrary, in case of adopting small quantity particles will reverse the result. After a number of generations, each module will get closer, i.e. the chip size is gets smaller. The requirement of minimized chip area is estimated by the objective function f. The amount of particles in the swarm is defined as 1 ≤ i ≤ m . The xi represents the particle’s current position in solution space and the initial states of vi,j, yi and ŷ were set as 0. As soon as particles moved following (1) and (2), the new local best position and the global best position would be updated by (3) and (4) respectively. The particle would keep moving to find a better solution until it reached the goal or met the termination condition [11][12]. The pseudo code of our method is presented in Figure 3. apte xerox hp ami33 ami49 n_30 n_50 4. Experiments result The experiments in this study employed GSRC and MCNC benchmarks [13] for the proposed floorplanner and compare with [4]. All the cells were set as hard IP modules. The simulation programs were written in MATLAB [14], and the results were obtained on a Pentium 4 1.7 GHz with 512MB RAM. The PSO experiments with w, c1 and c2 initializations were 1, 0.1 and 0.1, respectively. The particle number is set as five. We ran the both floorplanner 10 times and calculated their average outcomes of chip area and run time. The experiment results of both floorplanner are shown in Table 1. Compare with [4], our method can find a better placement solution in even less computation time. Under the same tree structure, that is to say, our method has more efficiency and solution searching ability for floorplan. Although the SA in [4] Proceedings of the 2006 Emerging VLSI Technologies and Architectures (ISVLSI’06) 0-7695-2533-4/06 $20.00 © 2006 IEEE TABLE 1 EXPERIMENTAL RESULTS SA with B*-tree Our method # of [4] modules Time Area Time Area (mm2) (sec) (mm2) (sec) 9 47.30 58 46.92 23 10 20.47 69 19.55 6 11 9.57 213 9.22 87 33 1.36 1821 1.28 614 49 43.34 5762 41.01 3710 30 0.247 178 0.238 101 50 0.243 769 0.233 154 adopted three the same operations that mentioned above, but it would randomly pick up the operation (somewhat like a kind of trial and error strategy) but not following the previous experience while trying to find another better solution. This will result in the floorplanner waste too much time on trapping the solution into local minimal and harder to get a better solution. Our method can overcome these drawbacks. Thus, the acceptable solution can find out in shorter computational time. The convergence curves of both methods are shown in Figure 4. Relative to both methods, our method possesses more robustness to prevent the solution from falling into local minimal. It would be beneficial to find a better solution in shorter time. Figures 5-7 show three benchmark results of hard modules packing for n50, ami33 and xerox. Figure 6. Placement result in GSRC ami33 Figure 7. Placement result in GSRC xerox Figure 4. Convergence curves 5. Conclusion In this paper, we proposed a floorplanner based on the PSO with B*-tree structure for placing blocks. PSO exhibits the ability of searching the solution space more efficiency than SA, Furthermore, PSO can save more computation time for finding an acceptable solution. The experiment results proved that the proposed PSO method can lead to a more optimal and reasonable solutions on the hard IP modules placement problem. 6. Future works Our future works will focus on finding ways to apply to different representations for enhancing the efficiency of the floorplanning, and dealing with soft IP modules placement problem. Figure 5. Placement result in MCNC n50 Proceedings of the 2006 Emerging VLSI Technologies and Architectures (ISVLSI’06) 0-7695-2533-4/06 $20.00 © 2006 IEEE 7. References [1] N. Quinn, and M. Breuer, “A forced directed component placement procedure for printed circuit boards,” IEEE Trans. on Circuits and Systems, vol. 26, pp. 377-388, June 1979. [2] H. Murata, K. Fujiyoshi, S. Nakatake, and Y. Kajitani, “VLSI module placement based on rectangle-packing by the sequence-pair,” IEEE Trans. on Computer Aided Design, vol. 15, pp. 1518-1524, Dec. 1996. [3] P.N. Guo, T. Takahashi, C. K. Cheng, and T. Yoshimura, “Floorplanning using a tree representation,” IEEE Trans. on Computer-Aided Design, vol. 20, pp. 281-289, Feb. 2001. [4] Y. C. Chang, Y. W. Chang, G. M. Wu, and S. W. Wu, “B*-Trees: A new representation for nonslicing floorplans,” Design Automation Conference, pp. 458463. 2000. [5] B. Yao et al., “Floorplan Representations: Complexity and Connections,” ACM Trans. on Design Automation. of Electronic Systems 8(1), pp. 55-80, 2003. [6] G. Sigl, K. Doll, and F. M. Johannes, “Analytical placement: A linear or a quadratic objective function,” Design Automation Conference, pp. 427-432, 1991. [7] F. Mo, A. Tabbara, and R. K. Brayton, “A forcedirected macro-cell place,” Computer-Aided Design Conference, pp. 177-180, 2000. [8] J. C. Jeong and C. M. Kyung, “Finding optimal module orientations in macrocell placement,” Electronics Letters, vol. 27, pp. 804-805, May 1991. [9] R. C. Eberhart and J. Kennedy, “A new optimizer using particle swarm theory,” in Proc. 6th Int. Symp. Micro Machine and Human Science, Nagoya, Japan, pp. 3943, 1995. [10] V. G. Gudise and G. K. Venayagamoorthy, “Comparison of Particle Swarm Optimization and Backpropagation as Training Algorithms for Neural Networks.” IEEE Swarm Intelligence Symposium, pp. 110-117, Apr. 2003. [11] S. T. Hsieh, C. W. Lin and T. Y. Sun, “Particle Swarm Optimization for Macrocell Overlap Removal and Placement,” in Proc. of IEEE Swarm Intelligence Symposium (SIS’05), pp. 177-180, June 2005 [12] T. Y. Sun, S. T. Hsieh and C. W. Lin “Particle Swarm Optimization Incorporated with Disturbance for Improving the Efficiency of Macrocell Overlap Removal and Placement,” in Proc. of The 2005 International Conference on Artificial Intelligence (ICAI’05), pp. 122-125, June 2005 [13] http://www.cse.ucsc.edu/research/surf/GSRC/progress.h tml [14] http://www.mathworks.com/ Proceedings of the 2006 Emerging VLSI Technologies and Architectures (ISVLSI’06) 0-7695-2533-4/06 $20.00 © 2006 IEEE