DG2032
Vishay Siliconix
New Product
High-Bandwidth, Low Voltage, Dual SPDT Analog Switch
FEATURES
BENEFITS
D Single Supply (1.8 V to 5.5 V)
D Low On-Resistance - rON: 2.4 W
D Crosstalk and Off Isolation: -81 dB @
1 MHz
D QFN-12 (3 x 3 mm) Package
D
D
D
D
D
APPLICATIONS
Reduced Power Consumption
High Accuracy
Reduce Board Space
Low-Voltage Logic Compatible
High Bandwidth
D
D
D
D
D
D
Cellular Phones
Speaker Headset Switching
Audio and Video Signal Routing
PCMCIA Cards
Low-Voltage Data Acquisition
ATE
DESCRIPTION
The DG2032 is a monolithic CMOS dual single-pole/
double-throw (SPDT) analog switch. It is specifically designed
for low-voltage, high bandwidth applications.
The DG2032’s on-resistance (3 W @ 2.7 V), matching and
flatness are guaranteed over the entire analog voltage range.
Wide dynamic performance is achieved with better than
–80 dB for both cross-talk and off-isolation at 1 MHz.
Both SPDT’s operate with independent control logic, conduct
equally well in both directions and block signals up to the
power supply
guaranteed.
level
when off. Break-before-make is
With fast switching speeds, low on-resistance, high
bandwidth, and low charge injection, the DG2032 is ideally
suited for audio and video switching with high linearity.
Built on Vishay Siliconix’s low voltage CMOS technology, the
DG2032 contains an epitaxial layer which prevents latch-up.
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
DG2032
12-Pin QFN (3 X 3 mm)
IN1
COM1
NC
12
11
10
TRUTH TABLE
Logic
NO1
1
9
NC1
GND
2
8
V+
NO2
3
7
NC2
4
IN2
5
6
COM2
NC
NC1 and NC2
NO1 and NO2
0
ON
OFF
1
OFF
ON
ORDERING INFORMATION
Temp Range
Package
Part Number
-40 to 85°C
12-Pin QFN (3 x 3 mm)
DG2032DN
Top View
Document Number: 72387
S-31650—Rev. A, 18-Aug-03
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DG2032
Vishay Siliconix
New Product
ABSOLUTE MAXIMUM RATINGS
Reference to GND
V+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to +6 V
IN, COM, NC, NOa . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to (V+ + 0.3 V)
Continuous Current (Any terminal) . . . . . . . . . . . . . . . . . . . . . . . . . . . "50 mA
Peak Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . "200 mA
(Pulsed at 1 ms, 10% duty cycle)
Storage Temperature (D Suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . -65 to 150°C
Power Dissipation (Packages)b
12-Pin QFN (3 x 3) c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1295 mW
Package Solder Reflow Conditionsd
12-Pin QFN (3 x 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 240°C
Notes:
a. Signals on NC, NO, or COM or IN exceeding V+ will be clamped by internal diodes. Limit forward diode current to maximum current ratings.
b. All leads welded or soldered to PC Board.
c. Derate 16.2 mW/_C above 70_C
d. Manual soldering with an iron is not recommended for leadless components. The QFN is a leadless package. The end of the lead terminal is
exposed copper (not plated) as a result of the singulation process in
manufacturing. A solder fillet at the exposed copper lip cannot be guaranteed and is not required to ensure adequate bottom side solder interconnection.
SPECIFICATIONS (V+ = 3 V)
Limits
Test Conditions
Otherwise Unless Specified
Parameter
Symbol
V+ = 3 V, "10%, VIN = 0.4 or 2.0 Ve
- 40 to 85_C
Tempa
Minb
Full
0
Typc
Maxb
Unit
V+
V
Analog Switch
Analog Signal Ranged
On-Resistance
rON Flatness
rON Match Between Channels
Switch Off Leakage Current
VNO, VNC,
VCOM
rON
rON
Flatness
DrON
INO(off),
INC(off)
ICOM(off)
Channel-On Leakage Current
ICOM(on)
V+ = 2.7 V, VCOM = 0.2 V/1.5 V
INO, INC = 10 mA
Room
Full
V+ = 2.7 V
VCOM = 0 to V+
V+, INO, INC = 10 mA
Room
V+ = 3.3 V, VNO, VNC = 0.3 V/3 V
VCOM = 3 V/0.3 V
V+ = 3.3 V, VNO, VNC = VCOM = 0.3 V/3 V
3.0
5
6.5
1.6
Room
W
0.4
Room
Full
-1
- 10
0.01
1
10
Room
Full
-1
- 10
0.01
1
10
Room
Full
-1
- 10
0.01
1
10
2.0
nA
Digital Control
Input High Voltage
VINH
Full
Input Low Voltage
VINL
Full
Input Capacitance
Input Current
Full
Cin
IINL or IINH
0.4
VIN = 0 or V+
Full
5
1
V
pF
1
mA
Dynamic Characteristics
Turn-On Time
tON
Turn-Off Time
tOFF
VNO or VNC = 2.0
2 0 V,
V RL = 50 W,
W CL = 35 pF
Break-Before-Make Time
Room
Full
28
53
59
Room
Full
13
38
38
td
VNO or VNC = 2.0 V, RL = 50 W, CL = 35 pF
Full
Charge Injectiond
QINJ
CL = 1 nF, VGEN = 0 V, RGEN = 0 W
Room
38
Off-Isolationd
OIRR
Room
- 78
Crosstalkd
XTALK
Room
- 82
CNO(off)
Room
15
CNC(off)
Room
15
Room
49
Room
45
Full
0.01
NO, NC Off Capacitanced
Channel On Capacitanced
Channel-On
CNO(on)
RL = 50 W,
W CL = 5 pF,
pF f = 1 MHz
VIN = 0 or V+,
V+ f = 1 MHz
CNC(on)
ns
1
pC
dB
pF
Power Supply
Power Supply Current
I+
VIN = 0 or V+
1.0
mA
Notes:
a. Room = 25°C, Full = as determined by the operating suffix.
b. Typical values are for design aid only, not guaranteed nor subject to production testing.
c. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
d. Guarantee by design, nor subjected to production test.
e. VIN = input voltage to perform proper function.
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Document Number: 72387
S-31650—Rev. A, 18-Aug-03
DG2032
Vishay Siliconix
New Product
TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)
rON vs. VCOM and Supply Voltage
rON vs. Analog Voltage and Temperature
5
8
T = 25_C
IS = 10 mA
7
4
r ON - On-Resistance ( W )
r ON - On-Resistance ( W )
6
5
4
V+ = 3.0 V,
V+ = 5.0 V,
3
2
V+ = 3 V
85_C
25_C
- 40_C
3
2
V+ = 5 V
85_C
1
25_C
- 40_C
1
0
0
0
1
2
3
4
5
0
1
2
VCOM - Analog Voltage (V)
Supply Current vs. Temperature
4
5
Supply Current vs. Input Switching Frequency
10000
10 mA
V+ = 5 V
1 mA
1000
100
I+ - Supply Current (A)
I+ - Supply Current (nA)
3
VCOM - Analog Voltage (V)
V+ = 5 V
VIN = 0 V
V+ = 3 V
VIN = 0 V
10
100 mA
10 mA
1 mA
100 nA
1
- 60
10 nA
- 40
- 20
0
20
40
60
80
100
10
100
Temperature (_C)
1K
100 K
1M
10 M
Input Switching Frequency (Hz)
Leakage Current vs. Temperature
Leakage vs. Analog Voltage
10000
100
V+ = 5 V
75
ICOM(off)
100
Leakage Current (pA)
INO(off), IINC(off)
1000
Leakage Current (pA)
10 K
ICOM(on)
10
V+ = 5 V
50
25
ICOM(on)
ICOM(off)
0
INO(off), IINC(off)
- 25
- 50
- 75
1
- 60
- 40
- 20
0
20
40
Temperature (_C)
Document Number: 72387
S-31650—Rev. A, 18-Aug-03
60
80
100
- 100
0
1
2
3
4
5
VCOM, VNO, VNC - Analog Voltage (V)
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DG2032
Vishay Siliconix
New Product
TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)
Insertion Loss, Off-Isolation
Crosstalk vs. Frequency
Switching Time vs. Temperature
60
10
RL = 50 W
LOSS
- 10
Loss, OIRR, X TALK (dB)
t ON / t OFF - Switching Time (m s)
50
40
tON V+ = 3 V
30
tON V+ = 5 V
20
tOFF V+ = 3 V
10
- 30
- 50
XTALK
OIRR
V+ = 5 V
RL = 50 W
- 70
tOFF V+ = 5 V
0
- 60
- 90
- 40
- 20
0
20
40
60
80
100
100 K
1M
Charge Injection vs. Analog Voltage
80
60
Q - Charge Injection (pC)
2.5
- Switching Threshold (V)
1G
Frequency (Hz)
Switching Threshold vs. Supply Voltage
3.0
100 M
10 M
Temperature (_C)
2.0
1.5
VT
1.0
0.5
40
20
V+ = 5 V
0
- 20
V+ = 3 V
- 40
- 60
0.0
- 80
0
1
2
3
4
5
6
0
7
1
V+ - Supply Voltage (V)
2
3
4
5
VCOM - Analog Voltage (V)
TEST CIRCUITS
V+
Logic
Input
V+
Switch
Input
NO or NC
VOUT
IN
Logic
Input
RL
50 W
GND
CL
35 pF
0V
tON
RL
tOFF
Logic “1” = Switch On
Logic input waveforms inverted for switches that have
the opposite logic sense.
CL (includes fixture and stray capacitance)
ǒ
tr t 5 ns
tf t 5 ns
0.9 x VOUT
Switch
Output
0V
VOUT + VCOM
50%
VINL
Switch Output
COM
VINH
Ǔ
R L ) R ON
FIGURE 1. Switching Time
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Document Number: 72387
S-31650—Rev. A, 18-Aug-03
DG2032
Vishay Siliconix
New Product
TEST CIRCUITS
V+
Logic
Input
V+
COM
NO
VNO
VINH
tr <5 ns
tf <5 ns
VINL
VO
NC
VNC
RL
50 W
IN
CL
35 pF
GND
VNC = VNO
VO
90%
Switch
0V
Output
tD
tD
CL (includes fixture and stray capacitance)
FIGURE 5. Break-Before-Make Interval
V+
V+
Rgen
NC or NO
+
COM
IN
Vgen
VOUT
IN
CL = 1 nF
VIN = 0 - V+
DVOUT
VOUT
On
Off
On
GND
Q = DVOUT x CL
IN depends on switch configuration: input polarity
determined by sense of switch.
FIGURE 2. Charge Injection
V+
V+
10 nF
10 nF
V+
V+
NC or NO
IN
COM
COM
RL
Analyzer
COM
0V, 2.4 V
Meter
0 V, 2.4 V
GND
IN
NC or NO
HP4192A
Impedance
Analyzer
or Equivalent
GND
f = 1 MHz
VCOM
Off Isolation + 20 log V
NOńNC
FIGURE 3. Off-Isolation
Document Number: 72387
S-31650—Rev. A, 18-Aug-03
FIGURE 4. Channel Off/On Capacitance
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Legal Disclaimer Notice
Vishay
Disclaimer
All product specifications and data are subject to change without notice.
Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf
(collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein
or in any other disclosure relating to any product.
Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any
information provided herein to the maximum extent permitted by law. The product specifications do not expand or
otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed
therein, which apply to these products.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this
document or by any conduct of Vishay.
The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless
otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such
applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting
from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding
products designed for such applications.
Product names and markings noted herein may be trademarks of their respective owners.
Document Number: 91000
Revision: 18-Jul-08
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