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Comparison of Contactless Measurement and Testing
Techniques to a New All-Silicon Optical Test and
Characterization Method
Selahattin Sayil, Member, IEEE, David. V. Kerns, Jr., Fellow, IEEE, and Sherra E. Kerns, Fellow, IEEE
Abstract—The rapid improvement in performance and increased density of electronic devices in integrated circuits have
provided a strong motivation for the development of contactless
testing and diagnostic measurement methods. This paper first
reviews existing contactless test methodologies and then compares
these with an all-silicon contactless testing approach that has been
recently developed and demonstrated. This cost-effective approach
utilizes silicon-generated optical signals and has the advantages
of easy test setup, low equipment cost, and noninvasiveness over
existing contactless test and measurement methods.
Index Terms—All-silicon testing, contactless measurement and
testing, integrated circuit testing, optical testing.
I. INTRODUCTION
W
ITH device miniaturization and increasing chip densities, conventional mechanical probing for internal fault
detection and functional circuit testing faces increasing challenges. Mechanical probes have limitations because of their relatively large size and their inherent parasitic effects. The SIA
National Technology Roadmap for Semiconductors (1997) predicts that the application-specific integrated circuits (ASICs)
will need over 3000 input/output (I/O) pads in the first years of
the new century, with a peripheral pitch distance of 50 m [1].
Such large I/O counts challenge testing reliability in numerous
ways; for example, assuring reliable ohmic contact to all test
pads during repeated die tests becomes a significant concern.
Design for testability approaches are valuable techniques for
helping solve the growing test problem. However, they alone do
not offer a solution as the Roadmap suggests.
Contactless testing may resolve many of the challenges associated with conventional mechanical wafer testing. A number of
contactless techniques have been investigated especially since
the 1980s, but none have yet found acceptance as a routine
testing or measurement tool. Electron-beam testing has been
used in a variety of ways for many years, and techniques such
as photoemissive probing, electrooptic sampling, charge density
probing, and photoexcitation techniques have also been investigated. These techniques have been developed to address the
increasing demands for internal access of the logic state of a
node within a “chip under test.”
Manuscript received June 4, 2004; revised January 10, 2005.
S. Sayil is with the Electrical Engineering Department, Lamar University,
Beaumont, TX 77713 USA (e-mail: sayilsx@hal.lamar.edu).
D. V. Kerns, Jr. and S. E. Kerns are with the Franklin W. Olin College
of Engineering, Needham, MA 02492 USA (e-mail: david.kerns@olin.edu;
sherra.kerns@olin.edu).
Digital Object Identifier 10.1109/TIM.2005.854253
In this paper, first, existing contactless technologies are reviewed and explained. Then, a new test methodology, a fully
optical contactless testing technique, is introduced. The results
demonstrate the feasibility of this new technique and show the
advantages of this method over other contactless schemes. Finally, a comparison to other contactless methodologies is made,
and results are presended in a tabular form.
II. EXISTING CONTACTLESS APPROACHES
A. Electron-Beam Method
Electron beam testing (EBT) is based on scanning electron
microscope (SEM) technology. SEM techniques use an electron
beam to stimulate secondary electron emission from metallized
surfaces. The primary beam is focused onto a test point on
the surface of the IC with a certain voltage. When the beam
impinges on the test point, low-energy secondary electrons
are released from the surface. The energy distribution of the
released secondary electrons is a function of the voltage at the
test point. High-frequency electron-beam testing is achieved
by sampling the test signal with short electron pulses [2], [3].
In application, a blanking system produces primary electron
pulses with repetition rates equal to the frequency of the applied
driving voltage. Fehr and Kubalek [4] report measurements up
to 24 GHz for repetitive waveforms using a sampling technique.
Real-time logic state analysis can be realized with a continuous
electron beam [5]. Menzel reported that logic analysis can be
performed up to frequencies of 4 MHz [6].
The electron beam technique requires free metal lines which
implies the need to uncover nodes. A significant problem arises
with multilevel interconnect [7], since only the top level of metal
can be accessed. The most important limitation of this method
is the requirement of an evacuated measurement chamber. This
requires numerous vacuum feedthroughs, and, hence, increases
the complexity and cost of this method.
B. Photoemissive Probing
The photoemissive probe uses a pulsed optical beam of a certain minimum energy to probe a signal on a metal line of any
substrate. The optical beam causes photoelectrons to be emitted
from the top layer of a metal from which the waveform of the
signal is derived (Fig. 1).
To reach picosecond time resolution, a stroboscopic sampling
technique has been used, as in the electron beam method, to
achieve a reported measurement bandwidth up to 20 GHz. Logic
signal detection requires a “real-time” measurement, and in the
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SAYIL et al.: COMPARISON OF CONTACTLESS MEASUREMENT AND TESTING TECHNIQUES
Fig. 1. Operating principle of the photoemissive method.
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Fig. 2. External electrooptic probing.
“real-time” mode, the incident beam of primary particles is continuous. Clauberg indicates that the bandwidth in this case is
about 1–2 MHz [8]. The limitation is generally due to the reaction time of the electron detector.
As in electron beam testing, an evacuated measurement
chamber is required with numerous feedthroughs. This technique is limited to the topmost layer, and problems exist with
multilevel interconnect [9]. This is the major drawback and
also increases the cost of testing and characterization.
C. Electrooptic Probing
Electrooptic (e-o) sampling is based on the Pockels-effect.
The refractive index of a crystal changes according to the applied
electric field across it. By shining the light through the crystal,
and measuring its change of polarization, the amplitude of the
applied electric signal can be determined. If short optical pulses
are used, repetitive electric signals can be sampled with a temporal resolution limited only by the optical pulse duration [10].
There are two general techniques for electrooptic sampling,
termed external and internal electrooptic sampling. The external
electrooptic sampling technique uses a small electrooptic crystal
as the electrooptic medium which is positioned close to the test
point on the circuit (Fig. 2). Internal electrooptic probing uses
the circuit substrate itself as the electrooptic medium (Fig. 3).
External electrooptic probing can be used with circuits having
almost any type of substrate material. The external electrooptic
sampling technique requires an electrooptic crystal that must be
positioned adjacent to the test point. Therefore, there is a risk of
device under test (DUT) damage. In waveform measurements,
multilevel wiring or metallization may pose a serious problem.
This measurement technique is confined to the topmost metallization layer, and the potential of crosstalk from neighboring
lines is an important deficiency of external e-o probing [11].
Internal probing has the advantage of not requiring any hard
probe near the circuit. However, special materials are required,
and the surfaces must be of optical quality since the sampling
light must penetrate the backside of the circuit. The substrate
itself serves as the e-o crystal. The polishing of the substrate
backside and metallization reflectivity must be considered. The
main disadvantage of internal electrooptic probing is that it can
only be used on circuits whose substrates are electrooptic including GaAs or InP, but excluding silicon, and others.
Fig. 3. Internal electrooptic probing.
The measurement bandwidth for logic signals has been reported to be as high as 14 GHz [12]. For repetitive signals such
as clock signals, a bandwidth above 1 THz has been obtained
using electrooptic sampling systems.
D. Charge Density Probing
Electrical signals in an integrated circuit cause charge-density modulations within devices and parasitic p-n junctions. The
charge density modulations change the local refractive index. In
charge density or plasma-optical probing, the refractive index
variations are interferometrically sensed from the backside of
an IC, and are related to either a current or a voltage change
in the circuit through the charge-signal relationship of a specific
device [13], [14]. Since this technique relies on free carriers, it’s
applicable to integrated circuits fabricated in any semiconductor
material. However, in this method, the absolute voltage information is not easily obtained; the entity measured is only the
charge density. Charge densities are complicated functions of
many parameters, and have a device and geometry dependency
[15]. The charge density information is not readily applicable
to design verification and failure analysis. Another drawback of
charge density probing technique is the requirement of a precise alignment of beams. The system, therefore, is not easily
implemented.
E. Photo-Excitation Probe Techniques
This method is based on the photoelectric effect generated
by laser beam/silicon interaction [16], [17]. A laser illumination photoexcites carriers near an active device in an IC. The
photo carriers are collected by the device and disturb the power
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Fig. 4. Electric force tester.
supply current to the circuit. The power supply current change
is directly related to the logic level of the node being probed.
Photo-excitation probing is invasive. The introduced photocurrent could be internally amplified and can cause latch-up
problems in CMOS circuits. The photo-current must be measured between the VDD and VSS terminals, between which a
high capacitance exists [18]. The temporal resolution of this
method, therefore, suffers from this capacitance and, therefore, the measurement bandwidth is very limited. Henley [19]
reported that the method was capable of measuring signals
up to 40 MHz in selected circuits, which is well below the
requirement of today’s ICs.
Fig. 5.
All-silicon contactless testing approach.
Fig. 6.
Optical setup.
F. Electric Force Microscopy
Electric force microscope (EFM) testing is based on
Coulombic force interactions between an EFM probe and the
test point located on a conducting line of the device under test.
The EFM probe consists of a sharp conducting tip mounted on
one end of a cantilever. This sharp conducting tip is positioned
at a constant height above the test point, typically in the order
of 50 nm [20]. An electric signal on an interconnect line causes
an electric force between the tip and the device under test which
causes a detectable bending
of the cantilever. The bending
of the cantilever depends on the square of the voltage difference
between the known tip voltage and unknown DUT voltage as
shown in Fig. 4.
The real time bandwidth of a typical cantilever is limited to
approximately 10 kHz because of its mechanical low-pass frequency behavior. Therefore, for high-frequency measurements,
a sampling scheme is required. Using a sampling scheme, Bohm
reported measurement bandwidths up to 40 GHz [20], [21].
The main disadvantages are crosstalk among neighboring
lines, and low frequency response of the cantilever for digital
signals [22].
G. Capacitive Coupling Method
If an electrode is placed in close proximity to a pad on the
wafer, the voltage transients on the pad induce weak displacement currents on the electrode. In this method of testing, this capacitive coupling effect is exploited for detecting the electrical
pulses propagating through an IC. It has been shown that this
method has a measurement bandwidth of 500 MHz for periodic
waveforms [23]. For logic signals, the bandwidth is limited because of parasitic capacitances and the low bandwidth of highly
sensitive preamplifiers; it has been demonstrated at frequencies
up to 10 kHz [24].
III. ALL-SILICON OPTICAL CONTACTLESS TESTING OF
INTEGRATED CIRCUITS
This new contactless measurement technique is a fully optical testing technique, and is compatible with devices made
by standard silicon processing. This cost-effective approach
is fully compatible with the simultaneous use of mechanical
probes for power and other signals. The technique uses optical
signals transmitted to the circuit for “inputting” the stimulus
data and also uses optical signals from the circuit for observation of the logic output (Fig. 5).
The technique is based on the integration on the DUT of a
silicon light emitter, or light-emitting diode (LED) (for sending
data out optically) and a silicon photodiode (for receiving data).
In addition, the DUT contains a driver circuit for the LED, and
an amplifier and comparator circuit to amplify the signal from
the photodiode and reconstruct a logic compatible digital signal.
The selected “output” electrical signals are converted to optical
signals by on-chip silicon-based LEDs or electroluminescent
photon sources [25].
The equipment required consists of an optical lens system
(much like an optical microscope) and an optical test head that is
fully compatible with mechanical probes. The optical test head
can simultaneously monitor the logic states of additional test
nodes, both at the die periphery and internal to the chip (Fig. 6).
In the testing scheme developed for this feasibility study,
an on-chip silicon photodiode is used to receive optical test
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Fig. 8. Specially designed experimental DUT.
Fig. 7.
Experimental optical system, with an enlargement of the chip under test.
signals generated at the optical test head. The modulated light
source in the optical test head is a standard GaAs LED (or laser
diode), precisely located so the optics direct this light to the
specific location of the receiver diode on the DUT. An on-chip
light emitter sends test signals through the same optical system
to a precisely located photodetector and amplifier in the optical
test head.
The new test methodology can be implemented simultaneously with conventional mechanical probes using standard
equipment. Mechanical probes are needed to apply power,
ground, and some control signals. The goal of this combined
approach is to complement the use of mechanical probes and
thereby provide the potential for increased test coverage and
reliability. The approach should also avoid many of the limitations of other contactless techniques.
Silicon is generally a poor material for light emission, though
it is reasonably good as a photodetector. The use of an optimized
silicon LED structure as an electroluminescent source allows
the entire approach to be fully compatible with current silicon
technology [26].
The devices designed and tested have measured efficiencies
on the order of 2.22 10 photons electron, and further improvement is anticipated [27], [28]. This research supports the
claim that the low-level silicon light emission supports contactless testing.
IV. EXPERIMENTAL APPROACH
To establish and evaluate the capabilities of an all-silicon optical test approach, hybrid breadboards were designed. Fig. 7
shows the optical system for the experiments: a Polaroid camera
and a B&L microscope optics system.
Specially fabricated silicon light emitter chips were used as
DUTs. These chips include many silicon light emitting and
detecting structures, including p-n and Schottky photodiodes
shown in Fig. 8.
Fig. 9. Schematic of transmission of stimulus data from optical test head to
chip.
A. Transmission of Input Stimulus Data From Optical Test
Head to Chip (DUT) for Encoding
The simultaneous transmission of multiple input optical signals to the DUT for input data encoding is required for the
success of the proposed optical testing approach. Two spatially
separated optical input signals were simultaneously applied to
the DUT to establish this capability. Fig. 9 illustrates the experimental setup, with two GaAs LEDs serving as pulsed light
sources. A circuit board located on the image plane of the Polaroid attachment encloses the LEDs (see Fig. 7). The LEDs are
positioned at locations on the image plane corresponding to silicon photodiodes on the DUT. In general, a source array would
be designed specifically for each DUT.
The location of sources corresponds to the imaged location
of internal nodes to be tested, and is, therefore, particular to the
optical test head configuration used for test. The whole image
of the chip under test appears on the image plane when a proper
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Fig. 11. Silicon light-generating test structure.
Fig. 10. Comparison of each output signal to its original input signal. Upper
waveforms show the original signals, and lower ones show the outputs.
lens combination has been used, and therefore proper location
of the LEDs is straightforward.
For the experiment, adjacent photodiodes were chosen to represent internal circuit test nodes. This choice maximizes the
probability of crosstalk between the two photodiodes, which
are separated by 120 m. The square-wave modulation signals
for these LEDs were set 180 out of phase. The minimum transimpedance amplifier gain required to obtain a detectable signal
depends on the test head’s optical output power and the attenuation of the particular optical setup. However, it was calculated
for nominal values that a transimpedance of 20 k would provide an adequate signal for the comparator.
The integration of such a transimpedance amplifier on a silicon chip has been demonstrated to be feasible in CMOS [29].
The signal is then processed by a comparator circuit with its
threshold set near the middle of the voltage swings from the
amplifier, to restore proper logic levels.
Fig. 10 shows the output waveforms for the two optical encoding signals. Fig. 10(a) shows the left side and Fig. 10(b)
shows the right side of the light transmission path of Fig. 9.
These results clearly indicate that it is possible to transmit multiple input optical signals simultaneously to chip with negligible
crosstalk.
B. Transmission of Chip Outputs From DUT to Optical Test
Head for Data Extraction
The simultaneous transmission of output signals from the
chip to the optical test-head for detection is also required for the
success of the proposed method. This transmission is a greater
challenge than the input signal transmission, because the transmission source is the relatively weak on-chip silicon emitter.
Fig. 12.
Simultaneous transmission of output signals for extraction.
The light-generating test structures were fabricated by standard silicon processing techniques using only standard silicon
dopants, boron and phosphorus, and resulted in a silicon p-n
junction that emit visible light when operated in avalanche
breakdown. Visible light is emitted over the photon energy
range 1.4–3.4 eV, and the spectral peak is recorded at 2 eV.
It has been reported [25] that below 2 eV, the emission is
mostly due to indirect interband transitions by high-field carrier populations. Above 2 eV, the indirect intraband processes
dominate until direct interband transitions take over at 2.3 eV.
Fig. 11 shows the “postage-stamp” test structure and also a
close view of light emission on the right corner of this diode.
The experimental setup for extraction of the output signal is
shown in Fig. 12. A pulse generator drives an amplifier that actuates the silicon light-emitting structure. Emitted light is focused
through the microscope and detected at a proper location in the
image plane of the microscope.
Either a photo-multiplier tube or an avalanche photodiode
with amplifier circuitry can be used as the detector; this experiment utilized the Hamamatsu avalanche photodiode module
C5460–0, which has a gain of 1.5E8 V A. The resulting
SAYIL et al.: COMPARISON OF CONTACTLESS MEASUREMENT AND TESTING TECHNIQUES
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Fig. 13. Signal waveform at the detector output (upper) versus the first input
signal applied to Si LED (lower).
Fig. 14. Signal waveform at the detector output (upper) versus the second input
signal applied to Si LED (lower).
waveform at the detector output can then be compared with
the original waveform driving the silicon light-emitter on the
DUT.
Two output optical signals from the DUT were sent simultaneously to the optical test head to characterize the extraction
of multiple output signals. Two adjacent silicon light emitting
structures on the DUT (Fig. 7) were modulated up to 100 kHz
for transmission. This frequency was the upper frequency limit
of the available detection instrumentation; however, the time response of hot-carrier luminescence in silicon LEDs has been
shown to be in the range of several picoseconds [30]. This would
suggest testing frequencies above a gigahertz are possible. The
silicon light emitters were modulated at 180 phase difference.
Figs. 13 and 14 compares the resulting output waveforms to the
original waveforms. In these figures, the output signal image
on the oscilloscope screen has been inverted to account for the
negative amplifier gain. The excellent correspondence between
these signals demonstrates that multiple output signals can be
simultaneously extracted with negligible interference.
This new method exploits the same advantages of free space
optical interconnections, namely, the low level of interaction between optical beams. Each transmission path in the experiment
can be considered as an optical link. Therefore, crosstalk should
not be a significant issue for this technique. Using appropriate
lenses, it is possible to image many points from one surface to
another surface [31]. Therefore, extraction of multiple signals
from the chip is also possible with negligible interference.
The previous experiments also demonstrate that multiple optical test vectors can be input anywhere on the periphery or
within the core of a DUT with negligible crosstalk. This is an
advantage over most contactless methods that require a separate
input stimulus before any test can begin.
The chip area required for emitter and driver circuits has been
calculated to approximate that required for a bond-pad and associated drive or input buffer circuitry [28].
The measurement speed of the technique will be ultimately
limited by the switching speed of the Si LEDs. Based on the
hot carrier luminescence work of Kash and Tsang [30], which
reports that switching speeds exceeding 10 GHz can be measured using hot carrier luminescence, the switching time for
Si LEDs is on the order of picoseconds. Later work [32] also
demonstrated a 20-GHz modulation with the same silicon structure which is utilized in this experiment. Therefore, silicon LED
switching speed does not pose a significant limitation on the
bandwidth of the testing system for the present application, and
gigahertz range logic signal detection seems possible.
V. RESULTS AND DISCUSSION
An ideal contactless probing system would be simple, inexpensive to operate, and compatible with the existing test equipment. It would not perturb the circuit, and it would measure electric signals with minimum crosstalk. The bandwidth of the test
system would be compatible with picosecond data pulses, and
it would not be limited to certain materials. However, the previously used methods (see Table I) suffer from at least one of these
limitations. In the “all-silicon optical contactless test method,”
the equipment cost is low, and the approach is compatible with
existing test equipment with minor modifications. The test vectors are supplied and received through an optical lens system,
similar to a microscope, and could coexist with a probe-card.
The method is also noninvasive. With the extra silicon area consumed with integration being moderate, this approach offers increased testability and measurement of the chip under test.
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TABLE I
COMPARISON OF ALL-SILICON OPTICAL TESTING VERSUS OTHER CONTACTLESS TESTING APPROACHES
VI. CONCLUSION
This paper reviewed the current state of knowledge in contactless testing. Disadvantages of existing technologies are: the high
equipment cost, the complex preparation steps, the measurement chamber requirements, the risk of chip damage, crosstalk,
and the material limitations. The described all-silicon optical
contactless test technology does not have these limitations and
has the potential to help solve the growing test problem.
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Selahattin Sayil (M’98) received the B.Sc. degree in
electronics from Gazi University, Ankara, Turkey, in
1990, the M.Sc. degree from the Pennsylvania State
University, University Park, in 1996, and the Ph.D.
degree in electrical engineering from Vanderbilt University, Nashville, TN, in 2000.
He was an Assistant Professor and Department
Chair with the Electronics Education Department,
Pamukkale University, Denizli, Turkey, from 2000
to 2003. He is currently an Assistant Professor in
electrical engineering at Lamar University, Beaumont, TX, where he leads the VLSI CAD and Signal Integrity Group. His
current research interests include CMOS VLSI design and testing, testability
and contactless test techniques, interconnect analysis, and modeling. He has
taught a variety of courses in electrical and computer engineering at both the
undergraduate and graduate levels at Lamar University and in his previous
affiliated institution.
Prof. Sayil is currently the IEEE Student Advisor at Lamar University.
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David. V. Kerns, Jr. (M’71–SM’84–F’91) received
the Ph.D. degree from Florida State University, Tallahassee, in 1971.
He currently serves as Provost and the Franklin
and Mary Olin Distinguished Professor of Electrical
Engineering at Franklin W. Olin College of Engineering, Needham, MA. Before joining Olin College
in 1999, he served at Vanderbilt University for 12
years as Chair of the Department of Electrical Engineering, Director of the Management of Technology
Program, Associate Dean for Administration of the
School of Engineering, and Acting Dean of the School of Engineering. He
has published extensively, and holds patents in microelectronics, MEMS, and
optics. He has taught at two other universities, served for several years as a
Member of the Technical Staff at Bell Laboratories, and cofounded several
companies.
Dr. Kerns is President of the IEEE Education Society.
Sherra E. Kerns (M’82–SM’85–F’90) received the
Ph.D. degree from the University of North Carolina,
Charlotte, in 1977.
She is Vice President for Innovation and Research
at Olin College, Neeham, MA, since 1999. Formerly,
she was at Vanderbilt University, Nashville, TN,
where she was a Senior Faculty Member and held
various posts, including Chair of the Department of
Electrical and Computer Engineering and Director of
the multidisciplinary, multi-institutional University
Consortium for Research on Electronics in Space.
Dr. Kems is the recipient of the IEEE’s prestigious Millennium Medal and the
IEEE Education Society’s Harriet B. Rigas Award. She is currently the President
of the American Society for Engineering Education (ASEE), the nation’s premier society for technical education and is a Fellow of the ASEE. She has been
named to the Advisory Committee for the National Academy of Engineering’s
Center for the Advancement of Scholarship on Engineering Education and the
Steering Committee for the NAE Engineer of 2020. She serves as an Executive
Committee Member of the Engineering Accreditation Commission of ABET.