HYBRID SYNTHESIZER WITH FREQUENCY RANGE 0.1-500MHz
B.Sc.Peter PSOTA
supervisor: Assoc. Prof. Milos Drutarovsky, Ph.D.
Department of Electronics and Multimedia Communications, Faculty of Electrical Engineering and Informatics,
Technical University of Košice, Park Komenského 13, 041 20 Košice, Slovakia
e-mail: peter.psota@stonline.sk; Milos.Drutarovsky@tuke.sk
ABSTRACT
This paper presents a design of a low-cost
synthesizer with frequency range 100 kHz 500 MHz . It uses hybrid synthesis based on
combination of Phase-Locked Loop (PLL) and
Direct Digital Synthesis (DDS) technology. The
design
used
modern
high
performance
microelectronic circuits. Embedded controller and
LCD display provide user interface with high
resolution setting capabilities.
1. PRINCIPLE OF HYBRID SYNTHETIZER
This section describes basic principle of hybrid
synthesizer (Fig.1). This hybrid topology combines
strengths of DDS and PLL technology [1, 2, 3]. In
its most basic form a hybrid synthesizer uses a DDS
for creating a stable, clean, and precisely-tunable
reference frequency FREF for PLL. By linearly
ramping the DDS output frequency, it is possible to
keep the PLL in lock until the reference frequency is
changing. In this way the locking can maintain for a
smaller loop bandwidth, meaning easier filtering of
the reference sidebands. If the divider in the PLL
divides by integers only, then the Voltage Controlled
Oscillator (VCO) output frequency step size is
constrained to be equal to the reference frequency.
DDS
FREF
FREF
Filter
Bandpass
FCOMP
FCLK 42.949 MHz
=
≈ 0.01 Hz (1)
2N
232
The FREF = 5.12 MHz is chosen. It is filtered by the
Cohn ladder crystal filter with 6dB bandwidth ±
600Hz. PLL chip LM2316 from National
Semiconductors [5] divides FREF by 40. Therefore
FCOMP = 128 kHz. The synthesizer uses VCO1 POS1000W from Mini-Circuits [6]. It provides an
impressive 500 - 1000 MHz tuning range. Overall
loop characteristics such as phase margin,
bandwidth, and lockup time are determined by a
third-order active loop filter based on the low-noise
JFET AD820 [4] opamp from Analog Devices. The
opamp filters the digital signal VERR from PLL
charge-pump output and also amplifies it to VTUNE =
0.5-16 Volt level required for full scale range. The
block diagram of this module is shown in Fig.2.
Realized hybrid synthesizer is shown realized hybrid
synthesizer is shown in Fig.3
Fstep =
PLL
Crystal
Clock
FCLK
FREF
DDS
FCOMP
OUTPUT
0.5 GHz - 1 GHz
PLL
VCO1
VERR
Filter
Lowpass
VTUNE
Fig. 2 Block diagram of VCO module
VERR
Fig. 1 Basic idea of Hybrid synthesizer
2. VCO MODULE
The VCO synthesizer is based on AD9935 [4]
chip from Analog Devices. The AD9935 generates a
finely-tunable reference signal 5.12 MHz for the
PLL. AD9935 is clocked by an onboard FCLK =
42.949 MHz oscillator. An overtone crystal
oscillator is used with 14.31818 MHz crystal and
FET transistors. This circuit multiplies base crystal
frequency three times. The phase accumulator in the
AD9935 has 32 bit resolution. The minimal
frequency step is given by following equation:
Fig. 3 Assembled and tested module is shown.
3. MIXER MODULE
4. CONTROLLER MODULE
The block diagram of mixer module is shown in
Fig. 4. For frequency range 100 kHz – 500 MHz
signal from VCO have to be converted in mixer with
local frequency FLO. There are two possibilities for
FLO frequencies :
(a) FLO = 500 MHz
(b) FLO = 1000 MHz
FRF (500÷1000 MHz)- FLO (500 MHz) = FIF (0-500 MHz)
DDS chip and PLL chip are controlled by 8-bit
controller ATtiny2313 from ATMEL [8]. It sets
registers and computes frequency word for DDS and
PLL chip. The PLL chip in mixer module is set-up
by controller only during equipment initialization.
User interface (tuning frequency, frequency step,
sweep time, attenuation, etc.) is based LCD module
[9], control buttons and ATmega8 [8] controller.
FRF (500÷1000 MHz)- FLO (1000 MHz) = FIF (500-0MHz)
5. CONCLUSION
FLO =1000 MHz was chosen as it provides lowest
level of spurs by placing intermodulation products
out of band. This module includes PLL chip
LMX2316 and VCO2 H001 951 from MURATA
[7]. These miniature VCOs are typically used in
GSM mobile phones. The source of reference
frequency FREF2 = 5.0 MHz for the PLL chip is
TCCXO1 (Temperature compensated crystal
oscillator) from TESLA [10]. Signal with FREF2 =5.0
MHz is filtered in narrow-band transistor amplifier
in order to remove higher harmonics and to decrease
noise. The signal from VCO2 is amplified in lownoise monolithic broadband amplifier MAR-6 and
MAR-8 [6] to +7dBm output level. This 1GHz
signal is injected into Local Oscillator (LO) port of
mixer JMS-2W from Mini-Circuits [6]. The signal
from VCO2 module with 0dBm level is incoming on
the RF port of mixer. Following low-pass filter
LFCN-490 from Mini-Circuits [6] provides
attenuation of unwanted image products and
intermodulation signals. The signal from filter is
incoming to broadband amplifier MAR-6, and is
amplified at 0dBm output level.
Today this project is not finished because it is
necessary to append the filters module for better
attenuation of image products, output amplifier with
Automatic Level Control (ALC) for stable output
level, and output attenuator module for fine setting
of output signal level. Block diagram of complete
equipment is shown in Fig.6. All described modules
are fully functional and synthesizer in its present
state provides output signal up to 1GHz. Precise
measuring of output parameters and evaluation of
complete equipment will be presented in [11].
and
Crystal
Clock
FREF2
FCOMP
PLL
VERR
Filter VTUNE
Lowpass
VCO
2
FLO = 1 GHz F
LO
OUTPUT
0.1MHz - 500 MHz
Filter
Lowpass
LO
IF
from VCO
Module
0.5 GHz - 1 GHz
RF
MIXER
Fig. 4 Block diagram of mixer module
Fig. 5 Realized Mixer module is shown
Module of
Hybrid Synthesizer
Module of
Mixer
Module of
Filters
Module of
Output Amplifiers
PLL
DDS
ATT
MMIC
VCO1
Module of
Attenuators
ATT
PIN
VCO
2
ATT
PLL
ALC
MIXER
Button
Control
ATT
LCD Module
CONTROLLER
Fig. 6 Full block diagram of equipment
REFERENCES
[1] CROOK, David : Hybrid synthesizer tutorial,
Microwave Journal, 2003, vol.46, Nr.2, pp. 2038, ISSN 0192-6217
[2] MILES, John – HOSKING, Richard: A
Versatile Hybrid Synthesizer for UHF and
Microwave Project, QEX/Communications
Quarterly, March/April,2004, pp.10-15
[3] VANKKA, Jouko: Direct Digital Synthesizers:
Theory, Design and Applications, Ph.D.
dissertation, Department of Electrical and
Communications
Engineering,
Helsinki
University of Technology, Nov.2002
[4] Web site: http://www.analog.com
[5] Web site: http://www.national.com
[6] Web site: http://www.minicircuits.com
[7] Web site: http://www.murata.com
[8] Web site: http://www.atmel.com
[9] Web site: http://www.gotronic.fr/doc/opto/033
52.pdf
[10] Construction catalog: Passive electronics
circuits, TESLA ELTOS, 1991,pp.504-505
[11] PSOTA, Peter : High-frequency Wobbler ,
Bachelor thesis, May 2007