LTC5569
300MHz to 4GHz
3.3V Dual Active
Downconverting Mixer
FEATURES
DESCRIPTION
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The LTC®5569 dual active downconverting mixer is optimized for diversity and MIMO receiver applications that
require low power and small size. Each mixer includes an
independent LO buffer amplifier, active mixer core, and
bias circuit with enable pin. The symmetry of the IC assures that a phase and amplitude coherent LO is applied
to each mixer.
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High IIP3: 26.8dBm at 1950MHz
2dB Conversion Gain
Low Noise Figure: 11.7dB at 1950MHz
17dB NF Under 5dBm Blocking
44dB Channel Isolation
Low Power: 3.3V/600mW Total
Very Small Solution Size
Enable Pins for Each Mixer
Wide IF Frequency Range
LO Input 50Ω Matched in All Modes
–40°C to 105°C Operation
16-Lead (4mm × 4mm) QFN package
The RF inputs are 50Ω matched from 1.4GHz to 3.3GHz,
and easily matched for higher or lower RF frequencies with
simple external matching. The LO input is 50Ω matched
from 1GHz to 3.5GHz, even when one or both mixers are
disabled. The LO input is easily matched for higher or
lower frequencies, as low as 350MHz, with simple external
matching. The low capacitance differential IF outputs are
usable up to 1.6GHz.
APPLICATIONS
Wireless Infrastructure Diversity Receivers
MIMO Infrastructure Receivers
n Remote Radio Units
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L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
TYPICAL APPLICATION
Diversity Receiver with 190MHz Bandpass IF Matching
1nF 190MHz
RF
MAIN
2.7pF
270nH
1nF
270nH
3.3V
10nF
IFA+
RFA
IFA–
BIAS
RF
3.9pF
4.0
LO
3.5
DUAL
IF VGA
DUAL
ADC
LO
RF
IFB+
BIAS
IFB–
270nH
270nH
ENB
1.0
VCCB
1nF
190MHz
2.5
1.5
5569 TA01a
10nF
3.0
2.0
BPF
ENB
28
IIP3
4.5
ENA
LTC5569
RFB
5.0
3.3V
10nF
RF = 1950 ±50MHz
LO = 1760MHz
PLO = 0dBm
ZRF = 50Ω
ZIF = 50Ω
TC = 25°C
TEST CIRCUIT IN FIGURE 1
26
24
22
20
18
GC
±30MHz
16
14
NF
IIP3 (dBm), SSB NF (dB)
LO
LO
RF
DIVERSITY 2.7pF
BPF
VCCA
ENA
Mixer Conversion Gain, IIP3 and NF
vs IF Output Frequency
GC (dB)
10nF
12
10
0.5
140 150 160 170 180 190 200 210 220 230 240
IF OUTPUT FREQUENCY (MHz)
5560 TA01b
1nF
5569fb
For more information www.linear.com/LTC5569
1
LTC5569
PIN CONFIGURATION
Supply Voltage
VCCA, VCCB, IFA+, IFA–, IFB+, IFB–.........................4.0V
Enable Input Voltage (ENA, ENB)......–0.3V to VCC + 0.3V
Mixer Bias Voltage (BIASA, BIASB)...–0.3V to VCC + 0.3V
LO Input Power (350MHz to 4.5GHz)....................10dBm
LO Input DC Voltage................................................ ±0.1V
RFA, RFB Input Power (300MHz to 4GHz)............20dBm
RFA, RFB Input DC Voltage..................................... ±0.1V
Operating Temperature Range (TC)......... –40°C to 105°C
Junction Temperature (TJ)..................................... 150°C
Storage Temperature Range................... –65°C to 150°C
VCCA
IFA–
IFA+
BIASA
TOP VIEW
16 15 14 13
RFA 1
12 ENA
GND 2
11 LO
17
GND
GND 3
10 GND
RFB 4
6
7
8
IFB–
VCCB
9
5
IFB+
(Note 1)
BIASB
ABSOLUTE MAXIMUM RATINGS
ENB
UF PACKAGE
16-LEAD (4mm × 4mm) PLASTIC QFN
TJMAX = 150°C, θJC = 8°C/W
EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING
PACKAGE DESCRIPTION
CASE TEMPERATURE RANGE
LTC5569IUF#PBF
LTC5569IUF#TRPBF
5569
16-Lead (4mm × 4mm) Plastic QFN
–40°C to 105°C
Consult LTC Marketing for parts specified with wider operating temperature ranges.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
AC
ELECTRICAL CHARACTERISTICS CC = 3.3V, ENA, ENB = High. Test circuit shown in Figure 1.
V
(Notes 2, 3, 4)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
RF Input Frequency Range
300 to 4000
MHz
LO Input Frequency Range
350 to 4500
MHz
LF to 1600
MHz
IF Output Frequency Range
External Matching Required
RF Input Return Loss
ZO = 50Ω, 1400MHz to 3300MHz
>12
dB
LO Input Return Loss
ZO = 50Ω, 1000MHz to 3500MHz
>12
dB
IF Output Impedance
Differential at 190MHz
LO Input Power
2
530Ω ||1.3pF
–6
0
R||C
6
dBm
5569fb
For more information www.linear.com/LTC5569
LTC5569
AC
ELECTRICAL CHARACTERISTICS CC = 3.3V, ENA, ENB = High. TC = 25°C, PLO = 0dBm, IF = 190MHz,
V
PRF = –6dBm (–6dBm/tone for 2-tone tests), unless otherwise noted. Test circuit shown in Figure 1. (Notes 2, 3, 4)
PARAMETER
CONDITIONS
MIN
TYP
Power Conversion Gain
RF = 450MHz, High Side LO
RF = 850MHz, High Side LO
RF = 1950MHz, Low Side LO
RF = 2550MHz, Low Side LO
RF = 3500MHz, Low Side LO
0.5
1.5
2.0
2.0
1.8
1.4
dB
dB
dB
dB
dB
RF = 1950 ±30MHz, LO = 1760MHz, IF = 190 ±30MHz
±0.05
dB
Conversion Gain vs Temperature
TC = –40°C to 105ºC, RF = 1950MHz, Low Side LO
–0.014
dB/°C
2-Tone Input 3rd Order Intercept (∆f = 2MHz)
RF = 450MHz, High Side LO
RF = 850MHz, High Side LO
RF = 1950MHz, Low Side LO
RF = 2550MHz, Low Side LO
RF = 3500MHz, Low Side LO
26.0
27.1
26.8
26.0
25.2
dBm
dBm
dBm
dBm
dBm
Conversion Gain Flatness
24.0
MAX
UNITS
2-Tone Input 2nd Order Intercept
(∆f = 190MHz, fSPUR = fRF1 – fRF2)
fRF1 = 945MHz, fRF2 = 755MHz, fLO = 1040MHz
fRF1 = 2045MHz, fRF2 = 1855MHz, fLO = 1760MHz
62.3
63.1
dBm
dBm
SSB Noise Figure
RF = 450MHz, High Side LO
RF = 850MHz, High Side LO
RF = 1950MHz, Low Side LO
RF = 2550MHz, Low Side LO
RF = 3500MHz, Low Side LO
11.9
11.7
11.7
12.1
14.3
dB
dB
dB
dB
dB
SSB Noise Figure Under Blocking
RF = 850MHz, High Side LO, 750MHz Blocker at 5dBm
RF = 1950MHz, Low Side LO, 2050MHz Blocker at 5dBm
17.5
17.0
dB
dB
LO to RF Leakage
LO = 350MHz to 1000MHz
LO = 1000MHz to 2900MHz
LO = 2900MHz to 4500MHz
<–58
<–50
<–42
dBm
dBm
dBm
LO to IF Leakage
LO = 350MHz to 1000MHz
LO = 1000MHz to 2900MHz
LO = 2900MHz to 4500MHz
<–38
<–35
<–33
dBm
dBm
dBm
RF to LO Isolation
RF = 300MHz to 2500MHz
RF = 2500MHz to 4000MHz
>57
>50
dB
dB
RF to IF Isolation
RF = 300MHz to 1400MHz
RF = 1400MHz to 3000MHz
RF = 3000MHz to 4000MHz
>28
>30
>31
dB
dB
dB
1/2IF Output Spurious Product
(fRF Offset to Produce Spur at fIF = 190MHz)
850MHz: fRF = 945MHz at –10dBm, fLO = 1040MHz
1950MHz: fRF = 1855MHz at –10dBm, fLO = 1760MHz
–75
–71
dBc
dBc
1/3IF Output Spurious Product
(fRF Offset to Produce Spur at fIF = 190MHz)
850MHz: fRF = 976.67MHz at –10dBm, fLO = 1040MHz
1950MHz: fRF = 1823.33MHz at –10dBm, fLO = 1760MHz
–88
–84
dBc
dBc
Input 1dB Compression
RF = 450MHz, High Side LO
RF = 850MHz, High Side LO
RF = 1950MHz, Low Side LO
RF = 2550MHz, Low Side LO
RF = 3500MHz, Low Side LO
11.1
10.4
10.2
10.4
10.2
dBm
dBm
dBm
dBm
dBm
Channel-to-Channel Isolation
RF = 300MHz to 1000MHz
RF = 1000MHz to 2700MHz
RF = 2700MHz to 3000MHz
RF = 3000MHz to 3300MHz
RF = 3300MHz to 3800MHz
>44
>44
>42
>36
>34
dB
dB
dB
dB
dB
5569fb
For more information www.linear.com/LTC5569
3
LTC5569
DC
ELECTRICAL CHARACTERISTICS CC = 3.3V, TC = 25°C. Test circuit shown in Figure 1. (Note 2)
V
PARAMETER
CONDITIONS
MIN
TYP
MAX
3.0
3.3
3.6
V
90
180
106
212
mA
mA
200
µA
Supply Voltage (VCC)
Supply Current
One Mixer Enabled
Both Mixers Enabled
Shutdown Current—Both Mixers Disabled
ENA or ENB = High
ENA and ENB = High
ENA and ENB = Low
UNITS
Enable Logic Inputs (ENA, ENB)
ENA, ENB Input High Voltage (On)
2.5
V
ENA, ENB Input Low Voltage (Off)
–0.3V to VCC + 0.3V
ENA, ENB Input Current
0.3
V
100
µA
Turn-On Time
0.6
µs
Turn-Off Time
0.5
µs
Mixer DC Bias Adjust (BIASA, BIASB)
Open-Circuit DC Voltage
Short-Circuit DC Current
Pin Shorted to Ground
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC5569 is guaranteed functional over the –40°C to 105°C
case temperature range (θJC = 8°C/W).
Supply Current vs Supply Voltage
(One Mixer Enabled)
Test circuit shown in Figure 1.
195
96
94
85°C
92
55°C
90
25°C
88
–10°C
86
TC = 105°C
190
TC = 105°C
SUPPLY CURRENT (mA)
SUPPLY CURRENT (mA)
mA
Supply Current vs Supply Voltage
(Both Mixers Enabled)
98
85°C
185
55°C
180
25°C
175
–10°C
–40°C
170
–40°C
3.1
3.4
3.3
3.5
3.2
VCC SUPPLY VOLTAGE (V)
3.6
165
3.0
3.1
5569 G01
4
V
1.8
Note 3: SSB Noise Figure measured with a small-signal noise source,
bandpass filter and 2dB matching pad on RF input, and bandpass filter on
the LO input.
Note 4: Channel A to channel B isolation is measured as the relative IF
output power of channel B to channel A, with the RF input signal applied to
channel A. The RF input of channel B is 50Ω terminated, and both mixers
are enabled.
TYPICAL DC PERFORMANCE CHARACTERISTICS
84
3.0
2.2
3.2
3.3
3.4
3.5
VCC SUPPLY VOLTAGE (V)
3.6
5569 G02
5569fb
For more information www.linear.com/LTC5569
LTC5569
TYPICAL
PERFORMANCE CHARACTERISTICS 1400MHz to 3000MHz application. Test circuit shown in
Figure 1. VCC = 3.3V, TC = 25°C, PLO = 0dBm, PRF = –6dBm (–6dBm/tone for 2-tone IIP3 tests, ∆f = 2MHz), IF = 190MHz unless otherwise noted.
1950MHz Conversion Gain, IIP3
and NF vs LO Power (Low Side LO)
5
30
4
IIP3
3
22
20
GC
2
16
1
14
NF
1.4 1.6
1.8 2.0 2.2 2.4 2.6
RF FREQUENCY (GHz)
0
3.0
2.8
85°C
25°C
–40°C
–2
0
2
LO INPUT POWER (dBm)
4
5569 G03
24
3
22
20
18
2
GC
GC (dB)
IIP3 (dBm), SSB NF (dB)
4
16
14
12
10
1
NF
1.4 1.6
1.8 2.0 2.2 2.4 2.6
RF FREQUENCY (GHz)
2.8
GC (dB), IIP3 (dBm), SSB NF (dB)
5
IIP3
0
3.0
28
26
24
IIP3
22
20
18
16
NF
14
12
10
8
6
4 GC
2
0
–4
–6
85°C
25°C
–40°C
0
–2
2
LO INPUT POWER (dBm)
4
RF Isolation vs RF Frequency
4
6
2550MHz Conversion Gain, IIP3
and NF vs LO Power (High Side LO)
6
28
26
24
IIP3
22
20
18
16 NF
14
12
10
8
6
4 GC
2
0
–4
–6
85°C
25°C
–40°C
0
–2
2
LO INPUT POWER (dBm)
4
6
5569 G08
Channel Isolation
vs RF Frequency
LO Leakage vs LO Frequency
65
–20
48
–30
46
RF-LO
60
LO LEAKAGE (dBm)
55
ISOLATION (dB)
0
–2
2
LO INPUT POWER (dBm)
5569 G07
5569 G06
50
45
40
35
1.6
1.8 2.0 2.2 2.4 2.6
RF FREQUENCY (GHz)
LO-IF
–40
–50
LO-RF
–60
RF-IF
30
25
1.4
85°C
25°C
–40°C
5569 G05
1950MHz Conversion Gain, IIP3
and NF vs LO Power (High Side LO)
30
26
28
26
24
IIP3
22
20
18
16 NF
14
12
10
8
6
4 GC
2
0
–4
–6
5569 G04
Conversion Gain, IIP3 and NF
vs RF Frequency (High Side LO)
28
6
ISOLATION (dB)
12
10
28
26
24 IIP3
22
20
18
16
NF
14
12
10
8
6
4 GC
2
0
–4
–6
GC (dB), IIP3 (dBm), SSB NF (dB)
18
GC (dB)
IIP3 (dBm), SSB NF (dB)
26
24
GC (dB), IIP3 (dBm), SSB NF (dB)
28
2550MHz Conversion Gain, IIP3
and NF vs LO Power (Low Side LO)
GC (dB), IIP3 (dBm), SSB NF (dB)
Conversion Gain, IIP3 and NF
vs RF Frequency (Low Side LO)
2.8
3.0
5569 G09
–70
1.2
44
42
40
1.6
2.4
2.8
2.0
LO FREQUENCY (GHz)
3.2
5569 G10
38
1.4
105°C
25°C
–40°C
1.6
1.8 2.0 2.2 2.4 2.6
RF FREQUENCY (GHz)
2.8 3.0
5569 G11
5569fb
For more information www.linear.com/LTC5569
5
LTC5569
TYPICAL
PERFORMANCE CHARACTERISTICS 1400MHz to 3000MHz application. Test circuit shown in
Figure 1. VCC = 3.3V, TC = 25°C, PLO = 0dBm, PRF = –6dBm (–6dBm/tone for 2-tone IIP3 tests, ∆f = 2MHz), IF = 190MHz unless otherwise noted.
Single Tone IF Output Power, 2 × 2
and 3 × 3 Spurs vs RF Input Power
15
0
5
IFOUT
–40
–50
RF1 = 1949MHz
RF2 = 1951MHz
LO = 1760MHz
–60
IM3
–70
–90
–12
–15
–25
–35
–45
–55
–65
IM5
–80
IFOUT
(RF = 1950MHz)
–5
–20
–30
–60
LO = 1760MHz
2RF-2LO
(RF = 1855MHz)
3RF-3LO
(RF = 1823.33MHz)
–75
–85
6
–15 –12 –9 –6 –3 0
3
RF INPUT POWER (dBm)
6
–9
–3
0
3
–6
RF INPUT POWER (dBm/TONE)
SSB Noise Figure
vs RF Blocker Level
GC AND SSB NF (dB), IIP3 AND P1dB (dBm)
RF = 1950MHz
21 BLOCKER = 2050MHz
20 LO = 1760MHz
SSB NF (dB)
19
PLO = –3dBm
17
PLO = 0dBm
15
14
13
PLO = 3dBm
12
11
–25
–20
–15 –10 –5
0
5
RF BLOCKER POWER (dBm)
10
15
10
5
1.0
1.5
2.0
2.5
CONVERSION GAIN (dB)
3.0
5569 G18
6
–2
0
2
LO INPUT POWER (dBm)
4
30
IIP3
27
24
21
85°C
25°C
–40°C
RF = 1950MHz
LOW SIDE LO
18
15
NF
12
9
6
GC
3
0
3.0
3.1
3.3
3.4
3.5
3.2
VCC SUPPLY VOLTAGE (V)
5569 G17
25
20
15
10
10
5
5
26.5
IIP3 (dBm)
85°C
25°C
–40°C
30
15
25.5
RF = 1950MHz
LOW SIDE LO
35
20
24.5
3.6
1950MHz SSB NF Histogram
25
0
6
Conversion Gain, IIP3 and NF
vs Supply Voltage
DISTRIBUTION (%)
DISTRIBUTION (%)
DISTRIBUTION (%)
25
20
–4
40
85°C
25°C
–40°C
30
30
0
–6
5569 G14
RF = 1950MHz, LOW SIDE LO
35
85°C
25°C
–40°C
35
–85
1950MHz IIP3 Histogram
40
RF = 1950MHz, LOW SIDE LO
40
3RF-3LO
(RF = 1823.33MHz)
–80
5569 G16
1950MHz Conversion Gain
Histogram
45
2RF-2LO
(RF = 1855MHz)
–75
–90
12
28
26
24 IIP3
22
20
RF = 1950MHz
LOW SIDE LO
18
16
14
12 NF
10
8 P1dB
6
4 GC
2
0
75
–45
–15
105
45
15
CASE TEMPERATURE (°C)
5569 G15
50
–70
Conversion Gain, IIP3, NF and RF
Input P1dB vs Temperature
22
16
RF = 1950MHz
PRF = –10dBm
–65 LO = 1760MHz
5569 G13
5569 G12
18
9
GC (dB), IIP3 (dBm), SSB NF (dB)
–10
2 × 2 and 3 × 3 Spur Suppression
vs LO Power
RELATIVE SPUR LEVEL (dBc)
10
OUTPUT POWER (dBm)
OUTPUT POWER/TONE (dBm)
2-Tone IF Output Power, IM3 and
IM5 vs RF Input Power
27.5
28.5
5569 G19
0
9.9
10.4 10.9 11.4 11.9 12.4 12.9 13.4
SSB NOISE FIGURE (dB)
5569 G20
5569fb
For more information www.linear.com/LTC5569
LTC5569
TYPICAL
PERFORMANCE CHARACTERISTICS 700MHz to 1000MHz application. Test circuit shown in
Figure 1. VCC = 3.3V, TC = 25°C, PLO = 0dBm, PRF = –6dBm (–6dBm/tone for 2-tone IIP3 tests, ∆f = 2MHz), IF = 190MHz unless otherwise noted.
950
1000
5569 G21
50
CHANNEL
ISO
–20
40
RF-IF
ISO
–30
30
–40
LO-IF
20
–50
GC, NF (dB), IIP3, P1dB (dBm)
–10
LO LEAKAGE (dBm)
ISOLATION (dB)
60
LO-RF
10
700
800
900
1000
1100
RF/LO FREQUENCY (MHz)
85°C
25°C
–40°C
4
–60
1200
15
5
IFOUT
–5
–10
–20
–30
–40
–50
–60
IM3
IM5
10
7
GC
4
3.0
3.1
3.2
3.3
3.4
3.5
VCC SUPPLY VOLTAGE (V)
–15
5569 G23
SSB Noise Figure
vs RF Blocker Level
RF = 850MHz
21 BLOCKER = 750MHz
20 LO = 1040MHz
19
18
PLO = –3dBm
17
16
PLO = 0dBm
15
14
13
PLO = 3dBm
12
11
–25
105
–20
IFOUT
(RF = 850MHz)
–45
2LO-2RF
(RF = 945MHz)
3LO-3RF
(RF = 976.67MHz)
–70
–75
–85
6
–15 –12 –9 –6 –3 0
3
RF INPUT POWER (dBm)
6
5569 G27
2 × 2 and 3 × 3 Spur Suppression
vs LO Power
–60
–35
–65
10
–15 –10 –5
0
5
RF BLOCKER POWER (dBm)
5569 G26
LO = 1040MHz
–25
–55
3.6
22
28
26
24 IIP3
22
20 RF = 850MHz
18 HIGH SIDE LO
16
14
12 NF
10
8 P1dB
6
4 GC
2
0
–15
45
–45
15
75
CASE TEMPERATURE (°C)
–80
–12
–9
–3
0
3
–6
RF INPUT POWER (dBm/TONE)
NF
13
1
RELATIVE SPUR LEVEL (dBc)
0
16
Single Tone IF Output Power 2 × 2
and 3 × 3 Spurs vs RF Input Power
OUTPUT POWER (dBm)
OUTPUT POWER/TONE (dBm)
10
85°C
25°C
–40°C
HIGH SIDE LO
5569 G25
2-Tone IF Output Power, IM3 and
IM5 vs RF Input Power
RF1 = 849MHz
RF2 = 851MHz
LO = 1040MHz
19
6
5569 G24
20
IIP3
Conversion Gain, IIP3, NF and RF
Input P1dB vs Temperature
0
RF-LO
ISO
25
22
5569 G22
Channel Isolation, RF Isolation and
LO Leakage vs Frequency
70
28
GC (dB), IIP3 (dBm), SSB NF (dB)
28
26
24 IIP3
22
20 HIGH SIDE LO
18
16
NF
14
12
10
8
6
4 GC
2
0
–4
0
–6
–2
2
LO INPUT POWER (dBm)
850MHz Conversion Gain,
IIP3 and NF vs Supply Voltage
SSB NF (dB)
28
26
IIP3
24
22
20
18 HIGH SIDE LO
16
14
NF
12
10
8
6
4
GC
2
0
900
700
750
850
800
RF FREQUENCY (MHz)
850MHz Conversion Gain,
IIP3 and NF vs LO Power
GC (dB), IIP3 (dBm), SSB NF (dB)
GC (dB), IIP3 (dBm), SSB NF (dB)
Conversion Gain, IIP3 and NF
vs RF Frequency
9
12
5569 G28
RF = 850MHz
PRF = –10dBm
–65 LO = 1040MHz
–70
2LO-2RF
(RF = 945MHz)
–75
–80
3LO-3RF
(RF = 976.67MHz)
–85
–90
–6
–4
–2
0
2
LO INPUT POWER (dBm)
4
6
5569 G29
5569fb
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7
LTC5569
TYPICAL
PERFORMANCE CHARACTERISTICS 400MHz to 500MHz application. Test circuit shown in
Figure 1. VCC = 3.3V, TC = 25°C, PLO = 0dBm, PRF = –6dBm (–6dBm/tone for 2-tone IIP3 tests, ∆f = 2MHz), IF = 190MHz unless otherwise noted.
450MHz Conversion Gain,
IIP3 and NF vs LO Power
RF Isolation and LO Leakage
vs RF and LO Frequency
27
70
65
IIP3
NF
15
–10
RF-LO
60
85°C
25°C
–40°C
HIGH SIDE LO
18
RF ISOLATION (dB)
GC (dB), IIP3 (dBm), SSB NF (dB)
24
21
0
12
9
–20
55
–30
RF-IF
50
LO-IF
GC
3
0
–6
–40
45
–50
LO-RF
40
6
–60
35
–4
–2
0
2
LO INPUT POWER (dBm)
5569 G30
–70
30
400
6
4
LO LEAKAGE (dBm)
65
60
55
50
CH. ISO
45
40
35
30
25
20
15
10
5
0
500
450
425
475
RF FREQUENCY (MHz)
27
25 IIP3
23
21
19
17
15
NF
13
11
9
7
5
3
GC
1
400
CHANNEL ISOLATION (dB)
GC (dB), IIP3 (dBm), SSB NF (dB)
Conversion Gain, IIP3, NF and
Channel Isolation vs RF Frequency
450
500
600
650
550
RF/LO FREQUENCY (MHz)
–80
700
5569 G32
5569 G31
3GHz to 4GHz application. Test circuit shown in Figure 1.
3500MHz Conversion Gain,
IIP3 and NF vs LO Power
27
24
LOW SIDE LO
NF
GC
3.2
3.0
3.8
3.4
3.6
RF FREQUENCY (GHz)
12
9
RF-LO
–40
LO-RF
3.2
3.5
3.8
4.1
RF/LO FREQUENCY (GHz)
–50
–60
4.4
5569 G36
8
GC (dB), IIP3, P1dB (dBm)
RF ISOLATION (dB)
–30
20
2.9
–6
–4
–2
0
2
LO INPUT POWER (dBm)
28
26 IIP3
24
22
RF = 3500MHz
20
LOW SIDE LO
18
16
14 NF
12
P1dB
10
8
6
4 GC
2
0
–15
45
–45
15
105
75
CASE TEMPERATURE (°C)
5569 G37
NF
15
12
9
85°C
25°C
–40°C
6
GC
3
0
6
4
RF = 3.5GHz
LOW SIDE LO
18
5569 G34
LO LEAKAGE (dBm)
–20
LO-IF
2.6
GC
3
–10
RF-IF
10
85°C
25°C
–40°C
6
0
30
NF
15
IIP3
21
Conversion Gain, IIP3 and RF
Input P1dB vs Temperature
60
40
RF = 3.5GHz
LOW SIDE LO
18
0
4.0
24
IIP3
21
5569 G33
50
27
GC (dB), IIP3 (dBm), SSB NF (dB)
IIP3
RF Isolation and LO leakage
vs RF and LO Frequency
0
3500MHz Conversion Gain,
IIP3 and NF vs Supply Voltage
3.0
3.1
3.2
3.3
3.4
VCC SUPPLY VOLTAGE
Channel Isolation
vs RF Frequency
3.6
3.5
5569 G35
40
105°C
25°C
–40°C
38
ISOLATION (dB)
26
24
22
20
18
16
14
12
10
8
6
4
2
0
GC (dB), IIP3 (dBm), SSB NF (dB)
GC (dB), IIP3 (dBm), SSB NF (dB)
Conversion Gain, IIP3 and NF
vs RF Frequency
36
34
32
30
3.0
3.2
3.6
3.8
3.4
RF FREQUENCY (GHz)
4.0
5569 G38
5569fb
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LTC5569
PIN FUNCTIONS
RFA/RFB (Pin 1/Pin 4): Single-Ended RF Inputs for the
A and B Mixers, Respectively. These pins are internally
connected to the primary winding of the integrated RF
transformers, which have low DC resistance to ground.
Series DC-blocking capacitors must be used if the RF
sources have DC voltage present. The RF inputs are 50Ω
impedance matched from 1.4GHz to 3.3GHz, as long as
the mixer is enabled. Operation down to 300MHz or up
to 4GHz is possible with external matching.
GND (Pins 2, 3, 10, Exposed Pad Pin 17): Ground. These
pins must be soldered to the RF ground plane on the circuit
board. The exposed pad metal of the package provides
both electrical contact to ground and good thermal contact
to the printed circuit board.
LO (Pin 11): Single-Ended Local Oscillator Input. This
pin is internally connected to the primary winding of an
integrated transformer, which has low DC resistance to
ground. A series DC-blocking capacitor must be used
to avoid damage to the internal transformer. This input
is 50Ω impedance matched from 1GHz to 3.5GHz, even
when one or both mixers are disabled. Operation down
to 350MHz or up to 4500MHz is possible with external
matching.
ENA/ENB (Pin 12/Pin 9): Enable Pins for the A and B Mixers,
Respectively. When the input voltage is greater than 2.5V,
the mixer is enabled. When the input voltage is less than
0.3V, the mixer is disabled. Typical input current is less
than 30µA. These pins have internal pull-down resistors.
VCCA/VCCB (Pin 13/Pin 8): Power Supply Pins for the A and
B Mixers, Respectively. These pins must be connected to
a regulated 3.3V supply, with bypass capacitors located
close to the pins. Typical DC current consumption is
34mA, each.
IFA+/IFA– (Pin 15/Pin 14), IFB+/IFB– (Pin 6/Pin 7): OpenCollector Differential IF Outputs for the A and B Mixers,
Respectively. These pins must be connected to the VCC
supply through impedance-matching inductors or a
transformer center tap. Typical DC current consumption
is 28mA into each pin.
BIASA/BIASB (Pin 16/Pin 5): These pins allow adjustment
of the mixer DC supply currents for mixers A and B, respectively. Typical, open-circuit DC voltage is 2.2V. These pins
should be left open circuited for optimum performance.
BLOCK DIAGRAM
16
BIASA
1
15
14
IFA+
IFA–
RFA
BIAS
RF
3 GND
RF
BIAS
5
IFB–
IFB+
BIASB
6
7
12
11
GND 10
LO
RFB
ENA
LO
LO
2 GND
4
13
VCCA
ENB
9
VCCB
8
5569 BD
5569fb
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9
LTC5569
TEST CIRCUIT
T1
8:1
DC1719A
EVALUATION BOARD
LAYER STACK-UP
(NELCO N4000-13)
0.062"
RFAIN
50Ω
RF
GND
BIAS
GND
0.015"
0.015"
C1
L5
IFAOUT
190MHz
50Ω
L1
L3
C9
C7
16
15
14
BIASA
IFA+
IFA–
C11
13
VCCA
1 RFA
ENA 12
C3
VCC
3.3V
ENA
LTC5569
C5
2 GND
LO 11
C6
LOIN
50Ω
17
GND
3 GND
RFBIN
50Ω
C2
GND 10
L6
4 RFB
C4
ENB 9
BIASB
IFB+
IFB–
VCCB
5
6
7
8
L2
L4
ENB
C10
5569 F01
C8
IFBOUT
190MHz
50Ω
T2
8:1
APPLICATION
RF (MHz)
LO
300 to 400
HS
400 to 500
HS
700 to 1000
HS
1400 to 3000
LS, HS
3000 to 4000
LS
LS = Low side, HS = High side
REF DES
C1, C2
C3, C4
C5
C6
C7-C10
VALUE
See Table
See Table
See Table
See Table
10nF
SIZE
0402
0402
0402
0402
0402
C1, C2
120pF
120pF
68pF
2.7pF
3.9pF
VENDOR
AVX
AVX
AVX
AVX
AVX
RF MATCH
C3, C4
18pF
12pF
4.7pF
—
0.7pF
REF DES
C11
T1, T2
L1- L4
L5, L6
L5, L6
3.3nH
2nH
—
—
—
VALUE
2.2µF
8:1
180nH
See Table
LO MATCH
C5
C6
1nF
10pF
27pF
6.8pF
6.8pF
2.2pF
3.9pF
—
3.9pF
0.3pF
SIZE
0603
—
0603
0402
VENDOR
AVX
Mini-Circuits TC8-1-10LN+
Coilcraft 0603HP
Coilcraft 0402HP
Figure 1. Standard Downmixer Test Circuit Schematic (190MHz Bandpass IF Matching)
10
5569fb
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LTC5569
APPLICATIONS INFORMATION
Introduction
RF Inputs
The LTC5569 incorporates two identical, symmetric doublebalanced active mixers with a common LO input, separate
RF inputs and separate IF outputs. See the Pin Functions
and Block Diagram sections for a description of each pin.
A test circuit schematic showing all external components
required for the data sheet specified performance is shown
in Figure 1. A few additional components may be used
to modify the DC supply current or frequency response,
which will be discussed in the following sections.
A simplified schematic of the A-channel mixer’s RF input
is shown in Figure 3. The B-channel is identical, and not
shown for clarity. As shown, one terminal of the integrated
RF transformer’s primary winding is connected to Pin 1,
while the other terminal is DC-grounded internally. For this
reason, a series DC-blocking capacitor (C1) is needed if the
RF source has DC voltage present. The DC resistance of
the primary winding is approximately 4Ω. The secondary
winding of the RF transformer is internally connected to
the RF buffer amplifier.
The LO and RF inputs are single ended. The IF outputs
are differential. Low side or high side LO injection may be
used. The test circuit, shown in Figure 1, utilizes bandpass
IF output matching and 8:1 IF transformers to realize 50Ω
single-ended IF outputs. The evaluation board layout is
shown in Figure 2.
The RF inputs are 50Ω matched from 1400MHz to 3300MHz
with a single 2.7pF series capacitor on each input. Matching
to RF frequencies above or below this frequency range is
easily accomplished by adding shunt capacitor C3, shown
in Figure 3. For RF frequencies below 500MHz, series
Figure 2. Evaluation Board Layout
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11
LTC5569
APPLICATIONS INFORMATION
0
LTC5569
L5
1
–5
RFA
RF
BUFFER
C3
5569 F03
Figure 3. RF Input Schematic
inductor L5 is also needed. The evaluation board does
not include pads for the series inductors, so the 50Ω RF
input traces need to be cut to install these in series. The
RF input matching element values for each application are
tabulated in Figure 1. Measured RF input return losses
are shown in Figure 4. The RF input impedance and input
reflection coefficient, versus frequency are listed in Table 1.
RETURN LOSS (dB)
RFAIN C1
–10
–15
–20
–25
–30
–35
0.2
TC = 25°C
1.2
0.7
1.7
2.2
2.7
3.2
3.7
FREQUENCY (GHz)
4.2
5569 F04
400MHz TO 500MHz APP.
700MHz TO 1000MHz APP.
1400MHz TO 3000MHz APP.
3GHz TO 4GHz APP.
Figure 4. RF Input Return Loss
Table 1. RF Input Impedance and S11 (At Pin 1, No External
Matching, Mixer Enabled)
LTC5569
S11
FREQUENCY
(MHz)
INPUT
IMPEDANCE
MAG
ANGLE
350
9.0 + j11.9
0.71
152.5
450
11.0 + j13.8
0.66
147.7
575
13.1 + j15.7
0.62
143.0
700
15.2 + j17.3
0.58
138.6
900
18.1 + j20.0
0.53
131.6
1100
21.3 + j22.4
0.49
124.6
1400
27.0 + j25.3
0.42
114.1
1700
33.4 + j26.8
0.36
103.9
1950
39.1 + j25.6
0.30
97.1
2200
43.4 + j21.5
0.23
94.2
2450
44.3 + j15.9
0.18
100.2
2700
40.8 + j9.9
0.15
126.5
3000
33.1 + j6.4
0.22
154.7
3300
24.3 + j6.8
0.36
159.9
3600
17.6 + j9.6
0.49
155.4
3900
12.9 + j12.7
0.61
149.6
LO
BUFFER
LO
C5
LOIN
11
C6
LO
BUFFER
5569 F05
Figure 5. LO Input Schematic
LO Input
DC-blocking capacitor. Capacitor C5 provides the necessary
DC-blocking, and optimizes the LO input match over the
1GHz to 3.5GHz frequency range. The nominal LO input
level is 0dBm although the limiting amplifiers will deliver
excellent performance over a ±5dB input power range. LO
input power greater than +6dBm may cause conduction
of the internal ESD diodes.
A simplified schematic of the LO input, with external
components is shown in Figure 5. Similar to the RF inputs, the integrated LO transformer’s primary winding is
DC-grounded internally, and therefore requires an external
To optimize the LO input match for frequencies below
1GHz, the value of C5 is increased and shunt capacitor C6
is added. A summary of values for C5 and C6, versus LO
frequency range is listed in Table 2. Measured LO input
12
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LTC5569
APPLICATIONS INFORMATION
return losses are shown in Figure 6. Finally, LO input impedance and input reflection coefficient, versus frequency
is shown in Table 3.
Table 2. LO Input Matching Values vs LO Frequency Range
FREQUENCY (MHz)
C5 (pF)
C6 (pF)
350 to 430
390
22
480 to 630
68
12
576 to 722
27
6.8
720 to 980
15
4.7
814 to 1155
6.8
2.2
1000 to 3500
3.9
—
2200 to 4000
3.9
0.3
The LO buffers have been designed such that the LO input
0
RETURN LOSS (dB)
–5
Table 3. LO Input Impedance and S11 (At Pin 11, No External
Matching, Both Mixers Enabled)
S11
FREQUENCY
(MHz)
INPUT
IMPEDANCE
MAG
ANGLE
350
5.5 + j15.1
0.82
146.1
400
6.0 + j17.3
0.81
141.3
450
6.9 + j19.5
0.79
136.7
500
8.0 + j21.8
0.77
131.9
600
10.3 + j26.5
0.73
122.6
800
17.6 + j35.7
0.63
104.5
1000
29.5 + j43.6
0.53
86.5
1500
70.8 + j28.3
0.28
40.5
2000
60.1 – j4.2
0.10
–20.2
2500
41.8 – j3.2
0.10
–156.6
3000
33.1 + j7.4
0.22
151.3
3500
29.8 + j19.2
0.34
122.9
4000
29.5 + j29.9
0.43
103.7
4500
32.0 + j37.6
0.46
90.9
–10
0
–15
TC = 25°C
C5 = 3.9pF
–2
–4
TC = 25°C
–25
0.2
0.7
1.2
1.7 2.2 2.7 3.2
FREQUENCY (GHz)
3.7 4.2
5569 F06
C5 = 27pF, C6 = 6.8pF
C5 = 6.8pF, C6 = 2.2pF
C5 = 3.9pF
C5 = 3.9pF, C6 = 0.3pF
RETURN LOSS (dB)
–20
–6
–8
–10
–12
–14
–16
BOTH MIXERS DISABLED
ONE MIXER ENABLED
BOTH MIXERS ENABLED
–18
Figure 6. LO Input Return Loss
–20
0.2
impedance does not change significantly when one or both
mixers are disabled. This feature only requires that supply
voltage is applied to both mixers. The actual performance
of this feature is shown in Figure 7, where LO input return
loss versus frequency is shown for the following three
operating conditions: both mixers enabled, one mixer
enabled, and both mixers disabled. As shown, the LO
input return loss is better than 12dB over the 1000MHz to
3500MHz frequency range for all three operating states.
0.7
1.2
1.7 2.2 2.7 3.2
FREQUENCY (GHz)
3.7
4.2
5569 F07
Figure 7. LO Input Return Loss for Three Operating States
IF Outputs
The A-channel IF output schematic with external matching components is shown in Figure 8. The B-channel is
identical, and not shown for clarity. As shown, the outputs
are differential open collector. Each IF output pin must
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13
LTC5569
APPLICATIONS INFORMATION
be biased at the supply voltage (VCC), which is applied
through the external matching inductors (L1 and L3)
shown in Figure 8. Alternatively, the IF outputs can be
biased through the center tap of the IF transformer. Each
IF output pin on the IC draws approximately 28mA of DC
supply current (56mA total per mixer).
The differential IF output impedance can be modeled as a
parallel R-C circuit. These R-C values are listed in Table 4,
versus IF frequency. This data is referenced to the package pins (with no external components) and includes
the effects of the IC and package parasitics. The values
of L1 and L3 are calculated to resonate with the internal
capacitance (CIF) at the desired IF center frequency, using
the following equation:
L1, L3=
Table 4 summarizes the optimum IF matching inductor values, versus IF center frequency, to be used in the standard
downmixer test circuit shown in Figure 1. The inductor
values listed are less than the ideal calculated values due
to the additional capacitance of the 8:1 transformer. For
differential IF output applications where the 8:1 transformer
is eliminated, the ideal calculated values should be used.
Measured IF output return losses are shown in Figure 9.
Table 4. IF Output Impedance and Bandpass Matching Element
Values vs IF Frequency.
BANDPASS MATCHING
IF FREQUENCY
(MHz)
DIFFERENTIAL IF
OUTPUT IMPEDANCE
(RIF || CIF)
50
540Ω||1.3pF
Open
140
532Ω||1.3pF
330nH
190
530Ω ||1.3pF
180nH
240
525Ω ||1.3pF
110nH
300
519Ω ||1.3pF
72nH
380
511Ω ||1.3pF
43nH
456
502Ω ||1.3pF
30nH
580
490Ω ||1.33pF
810
477Ω ||1.35pF
1000
450Ω ||1.4pF
1
(2• π • fIF)2 • 2•CIF
For IF frequencies below 130MHz, the matching inductors
are not needed due to the low IF output capacitance. The
evaluation board has the transformer center tap connected
to the matching inductor center node, thus allowing the circuit to be used without matching inductors. The measured
IF output return loss for this case is shown in Figure 9.
0
T1
8:1
IFAOUT
50Ω
VCC
L3
C7
15
LTC5569
14
IFA–
–5
RETURN LOSS (dB)
L1
IFA+
L1, L3 (A)
L2, L4 (B)
NO INDUCTORS
330nH
180nH
110nH
68nH
43nH
30nH
–10
–15
–20
–25
VCC
–30
50 100 150 200 250 300 350 400 450 500 550
5569 F09
FREQUENCY (MHz)
Figure 9. IF Output Return Loss—Bandpass Matching
with 8:1 Transformer
5569 F08
Figure 8. IF Output Schematic with Bandpass Matching
and 8:1 Transformer
14
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LTC5569
APPLICATIONS INFORMATION
Wide IF bandwidth and high input 1dB compression can be
obtained by reducing the IF output resistance with a shunt
resistor (R3), as shown in Figure 10. This will reduce the
mixer’s conversion gain, but will not degrade the IIP3 or
noise figure. The evaluation board includes pads for R3
(and R4 for the B-channel). To accommodate the lower total
IF resistance, transformer T1 should be changed from an
8:1 impedance ratio to a 4:1 ratio. The value of the external
matching inductors L1 and L3 needs to be adjusted to account for the differences in the IF transformer parasitics.
T1
4:1
IFAOUT
50Ω
L1
L3
VCC
C7
10nF
R3
15
IFA+
LTC5569
VCC
14
IFA–
5569 F10
IF
XFMR
R3 (Ω) GC (dB)
8:1
IIP3
(dBm)
SSB NF
(dB)
INPUT
P1dB
(dBm)
0.5dB IF
BANDWIDTH
(MHz)
—
2.0
26.8
11.7
10.2
–55/+85
1210
0.9
26.8
11.7
12.8
–90/+110
604
0.0
26.8
11.7
13.0
–100/+120
374
-1.1
26.8
11.8
13.3
–115/+120
4:1
2
35
8:1
1
25
1210Ω
0
15
604Ω
–1
5
374Ω
–5
–2
1210Ω
–3
–4
–5
–15
8:1
604Ω
–25
374Ω
50
90
130 170 210 250
IF FREQUENCY (MHz)
IF RETURN LOSS (dB)
Table 5 summarizes the measured conversion gain, IIP3,
noise figure, RF input P1dB and IF bandwidth for three
values of load resistor. Inductors L1 and L3 have been
increased from 180nH to 270nH to keep the IF match
centered at 190MHz (the 8:1 transformer has higher capacitance). Also shown, for comparison, is the measured
performance using an 8:1 IF transformer and no load resistor. Measured conversion gain and IF output return loss
versus IF frequency are shown for each case in Figure 11.
Table 5. Measured Performance Using IF Load Resistor (R3)
and 4:1 Transformer (RF = 1950MHz, Low-Side LO,
IF = 190MHz, VCC = 3.3V, TC = 25°C)
CONVERSION GAIN (dB)
Wideband IF Using Load Resistor and 4:1 Transformer
290
–35
330
5569 F11
Figure 11. Conversion Gain and IF Output Return Loss vs
IF Frequency—Wideband Matching with 4:1 Transformer
Discrete IF Balun Matching
For narrowband IF applications, it is possible to replace
the IF transformer with the discrete IF balun shown in
Figure 12 (only the A-channel is shown for clarity). The
values of L3, L7, C13 and C15 are calculated to realize a
180° phase shift at the desired IF frequency, and provide
a 50Ω single-ended output, using the equations listed
below. Inductor L1 is calculated to cancel the internal IF
capacitance (CIF from Table 4). L1 and L3 also supply DC
bias to the IF output pins. R5 and R7 are used to reduce
the differential output resistance (RS), which increases
Figure 10. IF Output Schematic with Wideband Matching
and 4:1 Transformer
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15
LTC5569
APPLICATIONS INFORMATION
C17
1nF
L7
C13
IFAOUT
RL = 50Ω
C15
L1
L3
R5
R7
VCC
C7
10nF
15
14
IFA+
C9
10nF
13
IFA–
VCCA
LTC5569
5569 F12
Figure 12. Discrete IF Balun Matching
the IF bandwidth, but reduces the conversion gain. C17
is a DC-blocking capacitor.
2•R5•RIF
RS =
2•R5+RIF
L7=
L3=
1
R5, R7 (A)
R6, R8 (B)
IF (MHz)
(Ω)
2
RS •RL
ωIF
ωIF
L1 (A)
L2 (B)
(nH)
L3 (A)
L4 (B)
(nH)
L7 (A)
L8 (B)
(nH)
C13, C15 (A)
C14, C16 (B)
(pF)
7
170
475
330
91
120
190
750
270
82
120
6
240
332
180
56
82
5.6
300
604
110
43
72
3.9
380
475
68
30
56
3.3
L1•L7
L1+L7
C13, C15=
0
–5
1
RS •RL
These equations give a good starting point, but it is
usually necessary to adjust the component values after
building and testing the circuit. The final solution can be
achieved with less iteration by considering the parasitics of L1 and L3 in the above calculations. Specifically,
the effective parallel resistance of L1 and L3 (calculated
from the manufacturers Q data) will reduce the value of
RS , which in turn influences the calculated values of L7,
C13 and C15. Also, the effective parallel capacitance of L1
16
Compared to the transformer-based IF matching technique,
the most significant performance difference, as shown in
Figure 14, is the limited IF bandwidth. For low IF frequencies, the passband bandwidth is small, whereas higher IF
frequencies offer wider bandwidth.
Table 6. Discrete IF Balun Element Values (RL = 50Ω)
(Values Shown for the A Channel and B Channel
(R5= R7)
2•CIF • ( ωIF )
Discrete IF balun element values for five common IF frequencies are listed in Table 6. Measured IF output return
losses are shown in Figure 13. Measured conversion
gain, IIP3 and noise figure versus IF output frequency is
shown in Figure 14.
RETURN LOSS (dB)
L1=
and L3 (taken from the manufacturers SRF data) must be
considered, since it is in parallel with CIF . Frequently, the
calculated value for L7 does not fall on a standard value
for the desired IF. In this case, a simple solution is to vary
the value of R5 (R7), which changes the value of RS , until
L7 is a standard value.
–10
–15
–20
–25
–30
–35
240MHz
380MHz
170MHz
90
140 190 240 290 340 390 440 490
IF FREQUENCY (MHz)
5569 F13
Figure 13. IF Output Return Losses with Discrete
IF Balun Matching
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LTC5569
GC (dB), SSB NF (dB), IIP3 (dBm)
APPLICATIONS INFORMATION
28
26
24
22
20
18
16
14
12
10
8
6
4
2
0
–2
R1
IIP3
RF = 1950MHz
LOW SIDE LO
PLO = 0dBm
ZRF = 50Ω
ZIF = 50Ω
TC = 25°C
16
15
BIASA
IFA+
80
140
VCCA
3mA
BIAS
54mA
BIAS
170MHz
240MHz
380MHz
200 260 320 380
IF FREQUENCY (MHz)
13
IFA–
VCCA
NF
GC
14
LTC5569
440
5569 F12
5569 F14
Figure 14. Conversion Gain, IIP3 and SSB NF vs IF Output
Frequency Using Discrete IF Balun Matching
Mixer Bias Current Reduction
The BIASA and BIASB pins (Pins 16 and 5) are available
for reducing the mixer core DC current consumption, of
the A- and B-channels, respectively, at the expense of
linearity and P1dB. For the highest performance, these
pins should be left open circuit. As shown in Figure 15,
an internal bias circuit produces a 3mA reference current
for each mixer core. If a resistor is connected to Pin 16,
as shown in Figure 15, a portion of the reference current
can be shunted to ground, resulting in reduced mixer
core current. For example, R1 = 1k will shunt away 1mA
from Pin 16 and reduce the mixer core current by 33%.
The nominal, open-circuit DC voltage at the BIASA and
BIASB pins is 2.2V. Table 7 lists DC supply current and
RF performance at 1950MHz for various values of R1.
Figure 15. BIASA Interface (BIASB is Identical)
Enable Interfaces
Figure 16 shows a simplified schematic of the A-channel enable interface. The B-channel is identical, and not
shown for clarity. To enable the A-channel mixer, the ENA
voltage must be higher than 2.5V. If the enable function is
not required, the pin should be connected directly to VCC.
The voltage at the ENA pin should never exceed the power
supply voltage (VCC) by more than 0.3V. If this should occur, the supply current could be sourced through the ESD
diode, potentially damaging the IC.
The ENA and ENB pins have internal 300k pull-down resistors. Therefore, an unused mixer will be disabled with its
corresponding enable pin left floating.
13
LTC5569
Table 7. Mixer Performance with Reduced Current
(RF = 1950MHz, Low Side LO, IF = 190MHz)
VCCA
CLAMP
500Ω
R1 (Ω)
ICC (mA)
GC (dB)
IIP3
(dBm)
P1dB
(dBm)
NF (dB)
Open
90.0
2.0
26.8
10.2
11.7
10k
85.2
1.9
25.6
10.2
11.4
1k
71.0
1.6
21.4
10.1
10.4
100
58.6
1.1
17.9
8.9
10.0
ENA
11
ENA
300k
5569 F16
Figure 16. Enable Input Circuit
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For more information www.linear.com/LTC5569
17
LTC5569
APPLICATIONS INFORMATION
Supply Voltage Ramping
Spurious Output Levels
Fast ramping of the supply voltage can cause a current
glitch in the internal ESD clamp circuits connected to the
VCCA and VCCB pins. Depending on the supply inductance,
this could result in a supply voltage transient that exceeds
the 4.0V maximum rating. A supply voltage ramp time
greater than 1ms is recommended.
Mixer spurious output levels versus harmonics of the
RF and LO are tabulated in Table 8. The spur levels were
measured on a standard evaluation board using the test
circuit shown in Figure 1. The spur frequencies can be
calculated using the following equation:
fSPUR = (M • fRF) – (N • fLO)
Table 8. IF Output Spur Levels (dBm)
(RF = 1950MHz, PRF = –2dBm, PIF = 0dBm at 190MHz, Low Side LO, PLO = 0dBm, VCC = 3.3V, TC = 25°C)
N
0
0
M
1
2
3
4
5
6
7
8
9
–56
–24
–58
–36
–51
–44
–58
–49
–80
1
–32
0
–56
–57
–68
–41
–69
–52
–75
–58
2
–59
–56
–67
–65
–76
–85
–71
–85
–80
*
3
*
–88
–89
–74
*
*
*
*
–89
*
4
*
*
–85
*
*
*
*
*
–85
*
5
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
6
7
*
*Less than –90dBc
18
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For more information www.linear.com/LTC5569
LTC5569
TYPICAL APPLICATION
200Ω Differential Lowpass IF Output Matching
(Element Values Shown for 190MHz IF)
3300pF
IFAOUT
200Ω
3300pF
82nH
3.3pF
3.3pF
390nH
390nH
681Ω
681Ω
10nF
3.3V
10nF
2.7pF
RFA
IFA+
IFA–
VCCA
BIAS
RF
ENA
LO
LO
LTC5569
ENA
3.9pF
LO
5569 TA03a
CHANNEL B NOT SHOWN
Voltage Conversion Gain, IIP3 and NF vs IF Frequency
11.0
28
10.5
26
10.0
9.5
9.0
RF = 1950 ±50MHz
LO = 1760MHz
PLO = 0dBm
ZRF = 50Ω
ZIF = 200Ω
TC = 25°C
IIP3
24
22
20
8.5
8.0
7.5
18
16
GV
14
SSB NF (dB), IIP3 (dBm)
VOLTAGE CONVERSION GAIN (dB)
RF
MAIN
82nH
7.0
12
NF
10
6.5
140 150 160 170 180 190 200 210 220 230 240
IF OUTPUT FREQUENCY (MHz)
5569 TA03b
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For more information www.linear.com/LTC5569
19
LTC5569
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
UF Package
16-Lead Plastic QFN (4mm × 4mm)
(Reference LTC DWG # 05-08-1692)
0.72 ±0.05
4.35 ± 0.05
2.15 ± 0.05
2.90 ± 0.05 (4 SIDES)
PACKAGE OUTLINE
0.30 ±0.05
0.65 BSC
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
BOTTOM VIEW—EXPOSED PAD
4.00 ± 0.10
(4 SIDES)
0.75 ± 0.05
R = 0.115
TYP
15
PIN 1 NOTCH R = 0.20 TYP
OR 0.35 × 45° CHAMFER
16
0.55 ± 0.20
PIN 1
TOP MARK
(NOTE 6)
1
2.15 ± 0.10
(4-SIDES)
2
(UF16) QFN 10-04
0.200 REF
0.00 – 0.05
0.30 ± 0.05
0.65 BSC
NOTE:
1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WGGC)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
20
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For more information www.linear.com/LTC5569
LTC5569
REVISION HISTORY
REV
DATE
DESCRIPTION
A
10/11
Revised Turn-On Time and Turn-Off Time Typical values in DC Electrical Characteristics
PAGE NUMBER
4
B
11/14
Increase RF Input Absolute Maximum power rating
2
Correct (increase) LO Input Power Absolute Maximum Frequency range
2
Clarify Case Temperature range in Order Information
2
Extend IF Output Frequency range down to low frequency
2
Clarify Case Temperature on Supply Current graphs
4
Correct x-axis label on graph G25
7
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Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection
of its circuits
as described
herein will not infringe on existing patent rights.
For more
information
www.linear.com/LTC5569
21
LTC5569
TYPICAL APPLICATION
200Ω Differential Highpass IF Output Matching
(Element Values Shown for 190MHz IF)
8.2pF
100nH
100nH
665Ω
665Ω
10nF
2.7pF
IFA+
RFA
IFA–
ENA
LO
LO
ENA
3.9pF
LO
LTC5569
LO
RF
BIAS
IFB+
10nF
665Ω
100nH
IFB–
ENB
ENB
9.5
9.0
8.5
VCCB
8.0
8.2pF
26
24
22
20
18
GV
16
7.5
14
NF
7.0
3.3V
10nF
8.2pF
IIP3
RF = 1950 ±30MHz
LO = 1760MHz
PLO = 0dBm
ZRF = 50Ω
ZIF = 200Ω
TC = 25°C
6.5
160
665Ω
100nH
10.5
10.0
28
180
190
170
200
210
IF OUTPUT FREQUENCY (MHz)
SSB NF (dB), IIP3 (dBm)
BIAS
RFB
11.0
VCCA
RF
RF
DIVERSITY 2.7pF
Voltage Conversion Gain, IIP3 and NF vs IF Frequency
3.3V
10nF
VOLTAGE CONVERSION GAIN (dB)
RF
MAIN
IFAOUT
200Ω
8.2pF
12
10
220
5569 TA02b
IFBOUT
200Ω
5569 TA02a
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LTC559x
DESCRIPTION
COMMENTS
600MHz to 4.5GHz Dual Downconverting Mixer
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400MHz to 3.8GHz, 3.3V Downconverting Mixer
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Ultralow Distort IF Digital VGA
LT5575
700MHz to 2.7GHz I/Q Demodulator
LT5578
400MHz to 2.7GHz Upconverting Mixer
LT5579
1.5GHz to 3.8GHz Upconverting Mixer
LTC5588-1
200MHz to 6GHz I/Q Modulator
RF Power Detectors
LT5538
40MHz to 3.8GHz Log Detector
LT5581
6GHz Low Power RMS Detector
LTC5582
40MHz to 10GHz RMS Detector
LTC5583
Dual 6GHz RMS Power Detector
ADCs
LTC2208
16-Bit, 130Msps ADC
LTC2285
Dual 14-Bit, 125Msps Low Power ADC
LTC2268-14
Dual 14-Bit, 125Msps Serial Output ADC
22 Linear Technology Corporation
8.5dB Gain, 26.5dBm IIP3, 9.9dB NF, 3.3V/380mA Supply
2.3dB Gain, 23.5dBm IIP3 and 12.5dB NF at 1900MHz, 5V/78mA Supply
2.9dB Gain, 24.7dBm IIP3 and 11.7dB NF at 1950MHz, 3.3V/82mA Supply
Fixed Gain of 8dB, 14dB, 20dB and 26dB; >36dBm OIP3 at 300MHz, Differential I/O
40dBm OIP3 to 300MHz, Programmable Fast Recovery Output Clamping
35dBm OIP3 at 240MHz, Continuous Gain Range –14dB to 17dB
48dBm OIP3 at 200MHz, 2dB to 18dB Gain Range, 0.125dB Gain Steps
28dBm IIP3, 13dBm P1dB, 0.03dB I/Q Amplitude Match, 0.4° Phase Match
27dBm OIP3 at 900MHz, 24.2dBm at 1.95GHz, Integrated RF Transformer
27.3dBm OIP3 at 2.14GHz, NF = 9.9dB, 3.3V Supply, Single-Ended LO and RF Ports
31dBm OIP3 at 2.14GHz, –160.6dBm/Hz Noise Floor
±0.8dB Accuracy Over Temperature, –72dBm Sensitivity, 75dB Dynamic Range
40dB Dynamic Range, ±1dB Accuracy Over Temperature, 1.5mA Supply Current
±0.5dB Accuracy Over Temperature, ±0.2dB Linearity Error, 57dB Dynamic
Up to 60dB Dynamic Range, ±0.5dB Accuracy Over Temperature, >50dB Isolation
78dBFS Noise Floor, >83dB SFDR at 250MHz
72.4dB SNR, 88dB SFDR, 790mW Power Consumption
73.1dB SNR, 88dB SFDR, 299mW Power Consumption
1630 McCarthy Blvd., Milpitas, CA 95035-7417
For more information www.linear.com/LTC5569
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com/LTC5569
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LT 1114 REV B • PRINTED IN USA
 LINEAR TECHNOLOGY CORPORATION 2011