Science Series Data Report
Vol 5, No. 8;Aug 2013
Design and Simulation of a Novel Double Electron Layer
Tunneling Diode
Pejman Shabani (Corresponding author)
Department of Electrical Engineering, Mahshahr Branch,
Islamic Azad University, Mahshahr , Iran
Tel: +98-21-84062328
Email: p_shabani@ee.kntu.ac.ir
Jabbar Ganji
Department of Electrical Engineering, Mahshahr Branch,
Islamic Azad University, Mahshahr , Iran
Tel: +98-21-84062328
Email: ganji_j@yahoo.com
Abdolnabi Kovsarian
Electrical Engineering Department, Shahid Chamran University, Ahvaz,Iran.
Tel: +98-611-3336641
Email: akovsarian@scu.ac.ir
Abstract
In this work a novel current rectifier, Double Electron Layer Tunneling Diode (DELTD) is introduced. The
DELTD structure is based on the Double Electron Layer Tunneling Transistor (DELTT) in which a specific
back control gate eliminates the negative resistance behavior of the DELTT. When the applied anode to
cathode voltage, VAK, increases, a tunneling current flows through the structure from the top QW to the
bottom QW. Due to the specific design, these tunneled carriers can open the normally close top QW
channel. So the path between Anode and Cathode through the top QW is switched on. In our design the
pick in I-V characteristic and also the negative resistance property have been eliminated. The device has a
fast response and rectifying property, because of the ultra fast tunneling current mechanism. The stationery
viscous quantum hydrodynamic method is used to simulate the proposed model.
Keywords: Rectifier, Double electron tunneling transistor, tunneling current, MODFET, switching
1. Introduction:
Electronic devices based on the resonant tunneling effect in a heterostructure configuration have been
widely studied [1-10]. In 1973, Tsu and Esaki introduced the double barrier resonant structure (DBRTD)
[5]. In the DBRTD or DELTT, typically grown using GaAs/AlGaAs system, electrons in the source can
tunnel to the drain contact through the lowest available electronic level of the quantum well [5,8]. Such
structure shows negative differential resistance (NDR) behavior. Therefore, the DELTT structure acts as a
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resonant switch, which is capable to conduct the current from source to drain during the tunneling process
[5-8]. The device was shortly thereafter demonstrated by Chang et al. In this structure, typically grown
using GaAs/AlxGa1-xAs system, electrons in the three-dimensional (3D) emitter layer can pass into the 3D
collector layer through the two-dimensional (2D) electron states in the quantum well (QW) using resonant
tunneling process. As the first approximation, electrons can tunnel through the thin QW layer only if their
energy and in-plane momentum are conserved [5]. When a voltage is applied between the emitter and
collector, the energy levels of the 2D electrons in the QW is lowered to align with the electronic levels in
the emitter. In this case the tunneling begins to occur. If the applied voltage increases, the conservation
condition and thereafter the tunneling current will reduce. Therefore, the DBRTD shows a negative
differential resistance (NDR) effect. The NDR property, makes this device very important, since
multifunctional operations become possible with fewer devices, results in smaller circuits. Another
important property of such device is its extremely high speed behavior due to resonant tunneling [2,7].
The purpose of this paper is to present a novel tunneling quantum well diode based on the DELTT
structure, in which an enhancement mode MOSFET eliminates the NDR effect of the DELTT. As a result,
a special high speed tunneling device with rectifying characteristics similar to conventional p-n junction
diode is obtained. Using ultra high speed switching resonant tunneling property of the DELTT structure
makes it possible to design and fabricate a quantum well based rectifier with higher speed switching
properties compared to other general diodes.
In the following we first explain the structure of the double electron layer tunneling diode (DELTD). The
electronic model of the device is presented in the subsequent section based on the viscous quantum
hydrodynamic equations. Device operation and its electrical properties is also investigated.
2. Device structure:
Figure 1 shows the schematic structure of a DELTT transistor [8,9]. Anode terminal is connected to the top
QW, while the electrical contact to the bottom QW plays the role of cathode terminal. In the DELTT,
resonant tunneling can occur when there are states of identical energy and in plane momentum in both
QWs, since these quantities must be conserved in the 2D-2D tunneling phenomenon [7,8].
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Top control gate
Top QW contact
Depletion gate
Top QW
Tunneling
current
Back QW
Bottom QW contact
Depletion gate
Back control gate
Figure1. Schematic of the double electron layer tunneling transistor (DELTT). The source makes electrical
contact to the top QW only, while the drain contacts the bottom QW only.
channel, and
is the width of the
is the length of the control gate(s). A sketch of the DQW energy band diagram is shown
at left.
Figure 2(a) shows the dispersion curve of a DQW with higher electron density in the top QW than that of in
the bottom QW, when the top control gate voltage is zero and Vsd≈0 [7,8]. Because both electron layers are
2D, their either allowed states are of the form of paraboloid having states only on the surface, and not in its
interior volume. While the chemical potentials µ1,2 of the two QWs coincide, their sub-band energies E01
and E02 differ [8]. Thus the paraboloids have offset in their minimum and pairs of states of identical
momentum and energy exist. So the tunneling current can't occur. Tunneling is switched ON, by varying
the densities of either 2D layer or changing the chemical potential difference between QWs by applying a
source-drain bias. Figure 2(b) shows the case when Vsd is increased to compensate the difference in the
Fermi energies, Ef1-Ef2= ΔEf. Therefore, the two paraboloids coincide again and carriers can tunnel. This
mechanism leads to occurrence of a peak in the Source-Drain current-voltage curve.
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E (eV)
E (eV)
µ
µ1
eVSD
EF2
EF1
µ2
EF1
E0,2
EF2
E0,1
kX
E0,1=E0,2
kX
kY
(a)
(b)
kY
Figure 2. Sketches of the allowed electron states of a DQW heterostructure in energy versus in-plane
momentum space, i.e., the dispersion curve. The two paraboloids have states only on the surface and none
in the interior. (a) Shows the case for a density-imbalanced DQW. Because no pairs of states of identical
energy and momentum exist, tunneling cannot occur. In (b), but VSD has been increased so as to make the
paraboloids coincide, allowing tunneling current to flow.
A schematic of our structure, the double electron layer tunneling diode (DELTD) is shown in Figure 3. This
structure is similar to the DELTT structure in which the back QW are connected the top depletion control
gate (TDCG) respectively. In the following we show that in the DELTD, tunneled carriers flows from the
back QW to the TDCG during the tunneling and collect there. The epoxy-bond-and-stop-etch (EBASE)
technique must be used to make an ohmic contact between the back QW and the TDCG [8].
While the applied voltage VAK is increased, the tunneled carriers flow from the top QW to the back QW in
the resonant condition. Because of the ohmic contact between the back QW and the TDCG, the tunneled
carriers in the back QW are conducted to the TDCG. Anode, Cathode and TDCG are Drain, Source and
Gate of Enhancement mode MOSFET respectively [9-11]. With no bias, the path between Anode and
Cathode through the top 2DEG is depleted. The oxide layer of the TDCG is implanted with a proper
amount of positive ions for depleting the channel. The equivalent ion charge that needs for depleting the top
2DEG in the sample A (see Table 1) is approximately 2.08×10-13 C. By applying VAK, in the resonant
tunneling condition the tunneled carriers that conducted to the TDCG and accumulate there, will open the
top 2DEG and after that the electric current between Anode and Cathode enhances by increasing the VAK.
In this case the device operation would be similar to an usual p-n junction rectifier. For switching, the rise
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and fall time of the input pulse can be as small as the time needed for the resonant tunneling current
occurred between two triangular quantum wells.
Cathode Anode Top depletion control Gate p‐Al0.3Ga0.7As, p=1.5×1013 cm‐3 i‐GaAs (Top QW) i‐Al0.3Ga0.7As i‐GaAs (Back QW) i‐Al0.3Ga0.7As Figure 3. The schematic of the DELTD. While the VAK is applied to the device the carriers can
tunnel from the 2DEG to the QW. In this situation the tunneled carriers are collected from the gate of the
MOSFET and consequently pinch it off and so the output voltage will be regulated.
The difference between I-V characteristics of the DELTT and DELTD is considerable. In the I-V curve of
the DELTT there exists a pick in some regions of the curve corresponding to the negative resistance
property. On the other hand, the negative resistance property of the DELTD has been eliminated and its
characteristics are similar to the I-V characteristics of a normal p-n junction diode. The main advantage of
the DELTD over the normal p-n junction is its fast operation in switching application. In a p-n junction
there are two types of capacitances which slow its operation: depletion and diffusion capacitances. In the
DELTD, on the other hand, only the depletion capacitance exists. So its operation could be much faster. We
have examined four samples with different structures to compare their operation parameters. Details of the
samples are provided in Table 1. In the next section we will present the electronic model based on the
Stationary Viscous Quantum Hydrodynamic model (QHD) to explain the device properties [12-22].
Table1. Sample parameters of the DELTD devices A, B, C, and D. Parameters used are the back GaAs
width (WB), tunnel barrier thickness (Tb0), depletion gate length (Ldep), top control depletion gate width
(WTCDG), top control depletion gate length (LTCDG), and impurity concentration in the p-GaAs epilayer.
Sample
WB(µm)
Tb0(Å)
Ldep(µm)
WTDCG(µm)
LTDCG(µm)
WT(µm)
NA(cm-3)
A
5
120
10
50
1
0.05
5×1017
B
5
120
10
10
5
0.05
5×1017
C
5
120
10
500
20
0.025
5×1015
D
5
120
1
5
1
0.1
2×1018
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3. Electronic Model and device simulation:
For modeling the device we used the stationary quantum hydrodynamic model. The viscous QHD
equations are derived from the Wigner-Fokker-Planck equation for the distribution function
.
,
,
∈
,
0,
, , ,
(1)
where (x,p) are the position-momentum variables, t (>0) is the time, and
is a pseudo-differential
operator defined by [12,20].
Therefore, the stationary viscous QHD model is on the following set of equations in the variables n, J, and
ne (and the potential V):
(2)
(3)
(4)
2
3
2
,
(5)
where J is the current density, n is the electron density, ne is the energy density, v is the viscosity, T is the
lattice temperature, τ is the momentum relaxation time,
is the Debye length,
is the chemical potential
defined as follows,
ħ
6
ND(x) and NA(x) are densities of the donor and acceptor impurities, respectively. The doping profile or
doping concentration is
In our model we use a uniform mesh by xi=hi (i=0,1,2,…,N), where
is the mesh size. For discretizing
the Neumann boundary conditions, we introduce the ghost cells [x-1, x-2] and [xN, xN+1], where x-1=-h and
xN+1=(n+1)h. at first we discretize the electron density n and electric potential V are approximated at the
grid points xi, whereas the current density J, and the energy density ne are discretized in the mid-points
. We denote by ni and Vi the approximations of n(xi) and V(xi) and by
the approximations of
1
2 , and
1
and
,
2 , respectively [12].
The central finite-difference scheme for equations (2) and (5) at x=xi reads as,
0
12
2
(6)
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Science Series Data Report
Vol 5, No. 8;Aug 2013
0
2
where
and
(7)
1,2, … ,
1. The central discretization of equation (3) at
is
0
(8)
log
log
2
,
and the central discretization of equation (4) at
reads as
0
(9)
1
24
log
36
log
2
2
where
2
3
4
,
1,2, … , .
We impose the following boundary conditions
,
,
,
,
(10)
,
,
0,
,
,
(11)
.
(12)
With these ten conditions, the discrete system seems to be over determined. The bottom quantum well has
5nm width, sandwiched between two 5nm and 17.5nm Al0.3Ga0.7As barriers (Table I). The barriers are
modeled by an additional step function
added to the electric potential [14]. We present numerical
results for the isothermal model of equations (2), (3) and (5) with constant lattice temperature
300°
[20, 21]. The stationary numerical solution was already calculated in [22].
4. Device operation and electrical properties:
The DELTD is a two terminal device that combines useful properties of two different devices: the DELTT
structure and the Enhancement mode MOSFET. Applying a voltage between the anode and cathode causes
the tunneling current flows from anode to the back quantum well that is connected to the TDCG with an
Au/Ge/Ni ohmic contact. These tunneling carriers are then conducted to the TDCG and accumulate there.
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In order to evaluate the number of accumulated carriers on the TDCG, we first calculate the variations of
tunneling current between the two QW due to the applied voltage. The simulated current-voltage
characteristic for the device has been depicted in Figure (4).
35
30
I (µA) 25
20
15
10
5
0
0.1
0.2
0.3
0.4
0.5
VAK (V) Figure 4. Simulation result of tunneling current between two quantum wells versus VAK. The width of
bottom quantum well is 5nm, sandwiched between two 5nm and 17.5nm Al0.3Ga0.7As barriers and
300°K.
The discrete nonlinear equation system (equations 6-12) is solved using Newton’s method [12,20]
combined with the line search method. The problem is solved for a given applied voltage V2=VAK as an
∆
initial guessed value. The obtained value for the potential
applied voltage. In this calculations, we have chosen ∆
number of grid points is
1000 such that h
10
1
is used as the next initial guess for the
and the final voltage is
0.5 . The
[20].
As mentioned before, the cathode of the DELTD is connected to the top QW only, and disconnected from
the back QW by the depletion region of the back depletion gate. During the accumulation period of
tunneling carriers on the TDCG, the depletion region is gradually removed, after which the path between
the anode and cathode through the top 2DEG is established. Under this condition the DELTD operation is
similar to a p-n junction diode. Figure 5 shows the variations of the storage charge on the TDCG against
time.
From Figure 5-(a), the switching time needed for samples A and B is about 5×10-10 s, while for samples C
and D this value is approximately 1.6×10-7 s and 4.7×10-11 s, respectively. The I-V characteristics of the
four different samples are shown in Figure 6.
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(a) 25 Q (fC) 20 15 10 5 0 10 20 30 40 t (× 10‐11 s) 50 60 70 (b) 40 Q (pC) 30 20 10 0 0 5
10
15
20
‐8
t (×10 s)
(c) 25 Q (fC) 20 15 10 5 0 1 2 3 4 t (× 10‐11 s) 5 6 7 Figure 5. While the applied voltage, VAK is increased, the resonant tunneling carriers are accumulated on
the TCDG. The Q-t curve of the samples A and B is given in (a). The Q-t curves for the samples C and D
are given in (b) and (c), respectively. The time needed for switching the device to ON-state is related to the
properties of the samples, the density of tunneling carriers, and can be modified with a proper design.
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(a) Sample D
Sample B
(b) Sample A
Sample C
Figure 6. I-V characteristics of the DELTD samples. The threshold voltage is about 0.2v. Below the
threshold voltage the enhancement mode MOSFET operates in the cutoff region. When the VAK is increased
to the threshold voltage, the path between anode and cathode through the top QW is established, and the
current of the device is enhanced.
As shown in Figure 5 it is clear that for each sample a specific time needs for switching, to collect the
carriers on the TDCG terminal. In Figure 7 the response time curves for different samples are given. It can
be seen that only samples A, B and D can operate in switching mode. The sample C can't switch properly,
because its accumulation time is greater than the rise time or fall time of the input pulse. It is important to
recall that with a proper design of the DELTD, its transient operation can be substantially improved. As a
result an ultra high speed rectifier can be obtained.
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2.5 ID (×0.02 A) 2 1.5 IA (×0.05 A)
1 VAK (×0.5 v) 0.5 IB (mA) 0 0 5 15 10 20 25
t (ns)
Figure 7. Transient time characteristics of four different samples. Only samples A, B and D can participate
in switching process.
5. Conclusions
In this paper we present a novel two terminal rectifier, DELTD, with fast dynamic response. Its
characteristics is similar to the p-n junction diode, but its electrical properties are much improved. The
DELTD structure is based on the DELTT and enhancement mode MOSFET structures. In order to
eliminate the negative resistance effect of the DELTT, the top control depletion gate is connected to the
back gate and the back control gate is connected to the cathode. Since resonant tunneling is the main
process of current conduction, the transferring time from Off to On-state is very small for this device. In
equilibrium the channel between Anode and Cathode is depleted with positive ions implanted in the top
depletion control gate. The analysis of different samples shows that the DELTD structure, if optimized, is a
useful device for high frequency switching applications. We used the Viscous Quantum Hydrodynamic
model for our device. One of the most important applications of this device is to design and fabricate a so
fast rectifier in the MOS and MODFET technologies. In order to improve the electrical properties of the
device we can use the enhancement mode MODFET instead of the enhancement mode MOSFET.
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