Lab #4 EEE392 Measurements and Analog Circuits Lab
Exp. No #4
FREQUENCY RESPONSE OF COMMON EMITTER AMPLIFIER
Date:
OBJECTIVE
The purpose of the experiment is to design a common emitter amplifier. To analyze and plot the frequency response of the amplifier with and without bypass capacitor. Also to compare the bandwidth of the amplifier with and without feedback.
EQUIPMENT AND COMPONENTS USED
30 MHz Dual Channel Cathode Ray Oscilloscope
3 MHz Function Generator
0-30 V dc dual regulated power supply
4 ½ digit Digital Multimeter
Transistor BC107
Resistors ¼W
Electrolytic Capacitors
Breadboard and Connecting wires
BNC Cables and Probes
THEORY
RC coupled CE amplifier is widely used in audio frequency applications in radio and television receivers.
Base current controls the collector current of a common emitter amplifier.
A small increase in base current results in a relatively large increase in collector current.
The resistors R
1
and R
2
are employed for the voltage divider bias of the transistor.
Voltage divider bias provides high dc bias stab ilization independent of variations in β.
The input is coupled through coupling capacitor C
C1
to the base.
The purpose of the coupling capacitor is to couple the ac signal to the input of the amplifier and block dc. It isolates the input signal source and the voltage divider circuit.
The output voltage is coupled from collector through the capacitor C
C2
.
Emitter resistor R
E provides current series feedback in the circuit.
The emitter resistor R
E
stabilizes the operating point against temperature variations.
The purpose of the bypass capacitor is to bypass signal currents to ground.
FURTHER READING
1. Robert Boylstad, Louis Nashelsky, “Electronic Devices and Circuit Theory”, PHI, 2008.
2. James Cox, „Fundamentals of Linear Electronics: Integrated and Discrete‟, Delmar Thomson
Learning, 2nd edition, 2001.
3. Theodore F.Bogart, Jeffrey S.Beasley, “Electron Devices and Circuits, PHI.
2015 – 2016
4. Robert Diffenderfer, “Electronic Devices”, Delmar Cengage Learning, 2005.
Department of Electrical & Electronics Engineering, Amrita Vishwa Vidhyapeetham, Coimbatore.
Page
37
1
Lab #4 EEE392 Measurements and Analog Circuits Lab
PRELAB
1. Use SPICE to create a common emitter amplifier. Observe the dc operating conditions.
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2. Obtain a plot of the frequency response of the common emitter amplifier over the frequency range from 1 Hz through 10 kHz. Observe the gain and bandwidth.
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3. Remove the bypass capacitor and observe the dc operating conditions.
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4. With the bypass capacitor removed apply the input voltage and observe the change in gain of the amplifier.
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5. Obtain the frequency response with the bypass capacitor removed from the circuit. Note down the bandwidth and comment on the results.
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2015 – 2016
Department of Electrical & Electronics Engineering, Amrita Vishwa Vidhyapeetham, Coimbatore.
Page 38
Lab #4 EEE392 Measurements and Analog Circuits Lab
DESIGN
Output requirements: Mid-band voltage gain of the amplifier = 50
Select the general purpose transistor BC107.
Specifications of BC107
Type: NPN, Nominal ratings : V
CB
= 5 V, I
C
=2 mA, h
FE
=100 to 500, DC biasing conditions V
CC
=12 V, I
C
=2 mA
V
RC
=40% of V
CC
=
V
RE
=10% of V
CC
=
V
CE
=50% of V
CC
=
Design of Collector resistor R
C
V
RC
= I
C
x R
C
Design of Emitter resistor R
E
V
RE
= I
E
x R
E
=> R
E
=
Design of voltage divider R
1
and R
2
=> R
C
=
I
B
=I
C
/h
FE
=
Assume current through R
1
=10 I
B
and that through R
2
=9 I
B
to avoid loading the potential divider network R
1 and R
2
by the base current.
V
R2
= voltage across R
2
= V
BE
+ V
RE
=
Also VR
2
= 9I
B
R
2
=
Then R
2
=
V
R1
= voltage across R
1
= V
CC
– V
R2
=
Also VR
1
=10I
B
R
1
=
Then R
1
=
Design of Load R
L
Assume R
L
= 1 k Ω
Design of coupling capacitors C
C1
and C
C2
X
C1
≤ Rin/10.
Here R in
= R
1
ІІ R
2
Rin =
Then X
C1
≤
So C
C1
≥ 1/2 f x X
C1
=
X
C2
≤ Rout/10, where Rout = Rc.
Then X
C2
≤
C
C2
≥ 1/2 f x X
C2
=
Design of bypass capacitors C
E
To bypass the lowest frequency (say 100 Hz), X
CE
should be equal to one-tenth or less than the resistance
R
E
.
X
C
CE
E
≤ R
E
/10
≥1/2
x100 x X
CE
=
2015 – 2016
Department of Electrical & Electronics Engineering, Amrita Vishwa Vidhyapeetham, Coimbatore.
Page 39
Lab #4
CIRCUIT DIAGRAM
EEE392 Measurements and Analog Circuits Lab
Figure 1
PRACTICE PROCEDURE
1. Connect the circuit as shown in Figure 1.
2. Apply the bias voltage Vcc and check the dc bias voltages at test points.
3. Apply an input sine wave signal of 100mV, 1 kHz from the function generator.
4. Observe the output in CRO. Calculate the corresponding gain and compare with the designed values.
5. Vary the frequency of the input signal and tabulate the output signal gain for different frequencies.
6. Plot the Frequency vs Gain (dB) using semilog sheet and calculate the bandwidth of the given amplifier from the plot.
Repeat the above by removing the bypass capacitor.
Time/div = Volt/div = Volt/div = Time/div =
Graph 1: Input sine wave Graph 2: Output Waveform
2015 – 2016
Department of Electrical & Electronics Engineering, Amrita Vishwa Vidhyapeetham, Coimbatore.
Page 40
Lab #4 EEE392 Measurements and Analog Circuits Lab
Inference
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Table1: Frequency response with bypass capacitor
Input frequency
(Hz)
10
20
50
100
200
500
1k
2k
5k
10k
20k
50k
100k
200k
500k
1M
Output voltage, Vo
(volts)
Gain = Vo
Vs
Input voltage, Vs = mV
20 log Gain
(Gain in dB)
2015 – 2016
Department of Electrical & Electronics Engineering, Amrita Vishwa Vidhyapeetham, Coimbatore.
Page 41
Lab #4 EEE392 Measurements and Analog Circuits Lab
Inference
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Table2: Frequency response without bypass capacitor
Input frequency
(Hz)
10
20
50
100
200
500
1k
2k
5k
10k
20k
50k
100k
200k
500k
1M
Output voltage, Vo
(volts)
Gain = Vo
Vs
Input voltage, Vs = mV
20 log Gain
(Gain in dB)
2015 – 2016
Department of Electrical & Electronics Engineering, Amrita Vishwa Vidhyapeetham, Coimbatore.
Page 42
Lab #4 EEE392 Measurements and Analog Circuits Lab
Inference
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UNDERSTANDING & LEARNING
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2015 – 2016
Department of Electrical & Electronics Engineering, Amrita Vishwa Vidhyapeetham, Coimbatore.
Page 43
Lab #4 EEE392 Measurements and Analog Circuits Lab
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RESULTS AND CONCLUSION
Prepared by:
Name: __________________________________________
Experiment Date: ……………
Report Submission Date: ……………
Submission Delay: …........
Student Task
Pre-lab Preparation
Reg. No.: _________________________
ASSESSMENT
15
Max. Marks Graded Marks
Performance 10
Signature
Observation &
Inference
10
Post-lab / Viva-voce 15
2015 – 2016
Total 50
Department of Electrical & Electronics Engineering, Amrita Vishwa Vidhyapeetham, Coimbatore.
Page
44