Light Load Efficiency Improvement for AC/DC Boost PFC Converters

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IEEE PEDS 2011, Singapore, 5 - 8 December 2011
Light Load Efficiency Improvement for AC/DC
Boost PFC Converters by Digital Multi-Mode
Control Method
Wei-Shung Wang
Ying-Yu Tzou, Member, IEEE
Power Electronic Systems and Chips Lab.
Department of Electrical Engineering
National Chiao Tung Univ., Hsinchu, Taiwan
Power Electronic Systems and Chips Lab.
Department of Electrical Engineering
National Chiao Tung Univ., Hsinchu, Taiwan
Power Quality
Rechargeable Battery
Adaptor
Adaptor
PC, Monitor, LCD TV
PC, LCD TV
100%
PFC Target Efficiency
95%
Lighting
Ballast
90%
85%
80%
0%
BLDC Motor
Light Load
Operation Region
20%
40%
60%
80%
Off-line power supplies are widely used in every kind of
computer, communication, and home appliance equipments.
Power-factor-correction (PFC) control schemes have been
developed to comply with the EN61000-3-2 standard for
input line current harmonic components [1]. Various active
PFC techniques for single-phase boost converters have been
widely discussed by academic and industrial researches over
the past ten years [2, 3]. In general, a PFC converter will
result a lower efficiency and higher harmonic distortion under
light load operation conditions, for load smaller than 20% of
its rated load, as shown in Fig. 1. With the continuously
increasing power efficiency target by 80 PLUS [4], U.S.
Energy Star [5] and Climate Savers [6], it becomes a design
challenge for AC-DC PFC technology to improve its power
quality as well as efficiency over a wider operating range [7].
Front-end power supplies, as shown in Fig. 2, used in
distributed power supply systems provide a common DC
voltage bus for system integration and redundancy and are
widely adopted in server and telecommunication power
supply systems. The PFC converters used in the front-end
This work was supported by the National Science Council, Taipei,
Taiwan, R. O. C. Project no. NSC99-2622-E-009-014-CC1.
100%
Motor Drive
Load
Fig. 1.
PFC control challenge for light load efficiency improvement.
POL Power Supply
+48V
Front-End Power Supply
I. INTRODUCTION
Energy Saving
Charger
Efficiency
Abstract⎯ This paper presents a method to improve light load
efficiency and reduce the THD of input current of a boost PFC
converter used in applications to high performance server power
supply units. The conventional constant frequency average
current mode control scheme will result lower efficiency and
high THD current distortion under light load operation. To
overcome this problem, this paper proposes a digital multi-mode
control scheme with variable switching frequency control. A
nonlinear control scheme with modified gain scheduling has
been used to improve dynamic response under light load
condition with discontinuous conduction mode (DCM) operation
with lower switching frequency. A green mode controller has
been developed to change its control mode based on the required
line current command under various load conditions. The
proposed control scheme has been verified by using simulation
and realized by using a DSP TMS32028035 in applications to a
single-phase 675W boost PFC AC/DC converter. Experimental
results are given to illustrate the feasibility of the proposed
control scheme.
Index Terms—Power Factor Correction, Digital Multi-Mode
Control Method, Green Mode Controller, Light Load Efficiency
power
bus
Intermediate-Stage
Power Supply
Utility
50-60 Hz
AC input
VRM
CPU
Buck
Memory
12V
DC/DC Converter
85-260V
.
.
.
Serial
Interface
Total Output Power = 600W
Efficiency > 90% @ Maximum Load
Size: 3.8” × 1.9” × 0.5”
Load regulation < 2%
Current Limit: 120%
Temperature: -40°C - 80°C
5V
Regulator
3.3V
2.5V
BuckBoost
LCD
Regulator
Inverter
CCFL
LDO
Fig. 2.
PFC front-end power supply in distributed power supply
architecture for server and telecommunication applications.
power supplies are required to meet stringent specifications
on its efficiency, power factor, harmonic distortion, and
voltage regulation. Most of these key performance indices are
closely related with its output power and input voltage.
Conventional PFC controller ICs are analog solution based on
fixed operating mode and can not satisfy modern
requirements of power quality and efficiency over wider
operation range.
The front-end boost PFC converter used in server power
applications is designed to be operated in continuous
conduction mode (CCM), when the converter is operating in
light load condition, it will operate in DCM condition and the
978-1-4577-0001-9/11/$26.00 ©2011 IEEE
1025
IL,CCM [A]
Envelope
iL
∆IL,CCM(ωt)
iL
toff
ton
x
Angle [rad]
(a) CCM Operation
π/2
Envelope
∆IL,CRM(ωt)
IL,avg
0
π/2
x
Angle [rad]
IL,DCM [A]
(b) CRM Operation
Envelope
IL,avg
0
π/2
Toff
ton
imax
toff
imax
iL (nT )
0
IL,CRM [A]
IL,avg
ΔiL
I c [n]
imin
iL (nT )
(n + 1)T
nT
t
I c [n]
(n + 1)T
nT
(a)
ΔiL
t
(b)
Fig. 4. Inductor current of a boost PFC converter in steady state over a
switching period in (a) CCM and (b) DCM operation.
at the same time to reduce the THD of input current of a
boost PFC converter used in applications to high performance
front-end server power supplies.
II. PREDICTIVE CURRENT CONTROL
∆IL,DCM(ωt)
x
Angle [rad]
(c) DCM Operation
Fig. 3. Inductor current of the PFC converter when operating in different
operating modes: (a) CCM, (b) CRM, and (c) DCM.
voltage conversion ratio becomes nonlinear as a function of
inductor current and input voltages, this results increased line
current distortion [8]. The inductor peak current will be
higher when operating in DCM and results higher switching
losses with fixed switching frequency control scheme.
In order to improve the current distortion or efficiency at
light load, many control methods have been recently
proposed [9]-[15]. A sample correction method which
introduces a correction factor to compensate sampling error
of the inductor current is developed in [9]. A duty-ratio
feed-forward control scheme is developed in [10] to
compensate this nonlinear voltage distortion. Reference [11]
combines these two methods to reduce the line current
distortion. A mixed-mode input current sensorless predictive
current control scheme at constant but two different switching
frequencies has been proposed in [12] to improve line current
harmonic distortion. These control schemes focus on the
improvement of line current distortion with fixed switching
frequency and without caring about the efficiency in light
load condition.
An adaptive on-time control scheme is develop in [13] to
improve the efficiency of the PFC converter when operating
in light load condition. The switching frequency is reduced to
about 25% when operating in light load condition and the
switching frequency becomes higher as the line current is
increased. Further researches focus on the development of
control schemes for efficiency improvement for PFC
converters operating in light load condition [14]-[16]. This
paper presents a method to improve light load efficiency and
Different PWM control schemes will result different
current profiles over the half period of a PFC converter as
shown in Fig. 3. These current waveforms will also vary as
the load or line voltage is changed. This is the key reason that
complicates in the development of a total solution of a PFC
controller to maintain high efficiency and low line current
THD over the entire load line.
The current loop controller of a PFC converter should be
designed to keep a low tracking error of the average inductor
current. Predictive current control scheme calculates the
control duties based on the sampled-data model of the PFC
converter circuit with the feedback signals. Predictive current
control scheme is employed for the synthesis of the PWM
control duties with variable frequency control.
Since the switching frequency is much higher than the line
frequency, the input and output state variables can be
assumed as constant value during one switching cycle. The
inductor current waveforms of a boost converter operating in
CCM and DCM are showed in Fig. 4. The inductor current
when operating in CCM can be expressed as
ΔiL [n] =
Vin [n]
V [n] − Vin [n]
Ton = o
Toff ,
L
L
(1)
where vo[n] is the output voltage and vin[n] is the applied
input voltage to the boost converter during the n-th switching
period.
The ON-time of the boost converter in CCM mode can be
derived as
Ton =
Vo [n] − Vin [n]
V [n] − Vin [n]
T= o
.
Vo [n]
Vo [ n] f s
(2)
The OFF-time for CCM and DCM can be derived as follows:
Toff _ CCM =
Toff _ DCM =
Δi L [n]L
,
Vo [n] − Vin [n]
Vo [n] ⋅ i L , peak [n]2 ⋅ L
2 ⋅ (Vo [n] − Vin [n]) ⋅ Vin [n] ⋅ I in [n]
(3)
− Ton .
(4)
The on-off time can be calculated cycle by cycle based on
the selected operation mode to improve the current dynamic
1026
fsw
f_max(70kHz)
Switching
frequency
Vg (t)
Input Line Voltage
Vg(t)
85-260V,rms
50-60Hz
C
Vou(t)
fss
(20kHz)
Load
Ig (k)
Sync.
Sampling
K
State Machine
A/D
KVg[n]
Green Mode Controller
A/D
Rsig[n]
fs (k)
Multiplier
Adaptive Periodic Error
Compensator
DPWM
16~200kHz
Predictive Current Controller
d[k]=aid[k-1]+ki(bie[k]-cie[k-1])
Current Loop
Regulator
freq.
div.
PFM
Control
DCM
Control
120Hz
HVout(t)
Mixed-Mode
Control
CCM
Control
t
Pout
Kf
Vg (k) Ig (k) Vo (k) Io (k) Rsig (k)
KVg (k)
f_min
(20kHz)
Variable Frequency Current Control
Load
power
100%
A/D
t
<50%
<10%
Notch Filter
ei[k]
Voltage Loop
Regulator
Voltage Loop Controller
ev[n]
u[k]=avu[k-1]+kv(bvev[k]-cvev[k-1])
HVout[n]
Fig. 6. Adaptive switching frequency control strategy of the multi-mode
PFC control scheme.
Vref
D
1.0
Vo = constant
I oB, max =
Fig. 5. Block diagram of the proposed multi-mode digital PFC controller.
response for current tracking under various line voltage and
current conditions [17].
Fig. 5 shows the block diagram of the proposed
multi-mode digital PFC controller. The multi-mode PFC
controller includes a predictive current controller, a voltage
loop controller with notch filter, a green mode controller, and
an adaptive periodic error compensator. The predictive
current controller calculates its PWM duties cycle-by-cycle
with a given switching period based on a measured inductor
current. The switching period is determined by the green
mode controller. The sensing of the average inductor current
for a PFC converter when operating in different operating
modes may result sampling error and plays an important role
in realization of the current loop controller [18]. Different
current sampling schemes have been developed to solve this
problem [19]. Over-sampling technique is adopted for the
inductor current sensing during light load condition to
achieve high signal-to-noise ratio for the noise corrupted
feedback signals.
III. DIGITAL MULTI-MODE PFC CONTROL
The core concept for the design of the power circuit of a
boost PFC converter is to minimize its magnetic components,
which include the boost inductor and EMI inductor filter. In
order to keep a minimize size of the boost inductor, the
inductor current is designed to achieve an optimum current
ripple factor to make a compromise between switching losses
of the power semiconductor devices and inductor size. The
switching frequency plays a key factor in the control of a PFC
converter both for low switching losses and low line current
harmonic distortion. Therefore, the adaptive control of the
switching frequency and modulation scheme for the PFC
converter when operating on various load conditions and line
voltages becomes a key technique for the improvement of the
PFC converter over a wider operating range.
The multi-mode PFC control strategy employs adaptive
control of the switching frequency and modulation scheme
according to its steady-state operating condition. Fig. 6 shows
the adaptive frequency control strategy of the multi-mode
PFC controller. The controller includes four control modes:
CCM, mixed-mode, DCM, and PFM. A mode selector is
2 TsVo
27 L
Multi-mode
CCM PFC
0.75
Vi
= 0.25
Vo
0.50
Vi
= 0.5
Vo
0.33
0.25
discontinuous
0.75
0.8
0
0
0.25
0.5
0.75
1.0
1.25
1.5
1.75
2.0
Io
IoB, max
Fig. 7. Operating trajectories of the multi-mode PFC control scheme
compared with the conventional fixed-frequency PFC control scheme.
designed based on the measured average values of load
current and line voltage. This adaptive frequency control
strategy can reduce the switching losses while at the same
time to maintain a low current THD when operating in DCM
mode. The switching frequency over the DCM mode can be
expressed as
f DCM =
2 ⋅ (Vo [n ] − Vin [n]) ⋅ Vin [n] ⋅ I in [n]
.
Vo [n] ⋅ i L, peak [n]2 ⋅ L
(5)
The switching frequency can be adaptively adjusted over the
half period of the line voltage according to the measured
instantaneous values of the PFC converter. For load below
10%, PFM control with burst switching of 20 kHz is used to
minimize switching losses in very light load condition.
Fig. 7 shows the operating trajectories of the multi-mode
PFC control scheme compared with the conventional
fixed-frequency PFC control scheme when operating with
fixed switching frequency. Compared with the conventional
average CCM control scheme, the on-time will be slightly
increased for the multi-lode PFC control scheme when the
PFC converter enters the DCM operation region. This makes
a nonlinear compensation of the voltage gain distortion across
the DCM region.
When the PFC converter is operating in light load
condition, the inductor current can be discontinuous and the
switching frequency can be lower to maintain a constant
output voltage ripple factor. The current control loop should
be designed to achieve a low THD of its line frequency
component. Fig. 8 and Fig. 9 show the simulation results of
the line current and inductor current at rated load condition by
1027
(a)
(a)
(a) Average current mode control
(b) Multi-mode digital control
Fig. 8. Simulation results of the line current and inductor current at rated
load condition (a) average current control and (b) multi-mode digital control.
(a) Average current mode control
(b) Multi-mode digital control
Fig. 9. Simulation results of the line current and inductor current at 20%
load condition (a) average current control and (b) multi-mode digital control.
using the conventional average current control and the
proposed multi-mode PFC control scheme at rated load and
20% load conditions, respectively.
Fig. 10 shows simulations results the two different current
control methods in 15% load and their corresponding
switching losses are compared based on a same power switch
model. The switching losses can be reduced about 4% ~ 15%
over its load operating range from 100% to 10%. With the
developed adaptive switching control scheme of the
multi-mode PFC controller, both the line current distortion
and switching loss can be reduced for in light load operating
area.
IV. IMPLEMENTATION AND EXPERIMENTAL RESULTS
A high performance PFC controller designed in
applications to server power supplies is required to possess
three major control functions. These include a digital current
loop controller to ensure low THD and high power factor
operating both in DCM and CCM, a digital voltage loop
controller with wide voltage adjustable range and fast
dynamic response under large step load disturbances, and a
green mode controller to maintain high efficiency across the
entire load variation range. To achieve these design goals, it
is only feasible to devise sophisticated digital control
algorithms with adaptive functions and realized by using
advanced single-chip DSP controllers designed in
applications to digital power converters [20]-[25].
In order to verify the proposed multi-mode digital PFC
control scheme, a 675 W boost PFC converter was built with
a boost inductor of 553μH, dc-link capacitor 470μF, and a
nominal switching frequency of 70 kHz. The PFC converter
is designed to operate in CCM only for load ratio > 70% and
DCM only for load smaller than 10%.
(b)
(b)
(c
(c)
Fig. 10. Simulation results at 15% load condition with (a) conventional
average current control, (b) multi-mode digital current control, and (c) loss
distribution of these two methods.
For the realization of the proposed digital PFC control
scheme, a 32-bit floating-point digital signal controller, the
TMS320F28335, from Texas Instruments is adopted. This
32-bit single-precision floating-point DSP controller provides
16x16 and 32x32 MAC operation with one cycle instruction,
This feature makes it suitable to realize complicated adaptive
control and signal processing algorithms with high sampling
rate without worrying about the numerical scaling and
quantization effect when using the fixed-point controller. This
design approach provides advantages in focusing the design
issues on the control architectures and algorithms in
development of digital power controllers. Optimization for
chip implementation of a designed programmable digital
power controller can be treated as another research issue.
The TMS320F28335 is a 32-bit floating-point DSP
controller with a clock frequency of 150 MHz with a 1.9 V
core supply voltage. In applications to the designed digital
PFC controller with a maximum switching frequency of 70
kHz, this processor can execute 2142 instructions during each
switching period. The I/O supplying voltage is designed with
3.3 V to ensure a proper signal dynamic range for analog
signal processing. The on-chip 2x8 channel input multiplexed
12-bit A/D converters can achieve a 8-nsec conversion rate
let it provide 178 samples per switching period when
applying over sampling technique for noise corrupted
inductor current sensing. This on-chip high-performance A/D
converter significantly improves the stability and robustness
when applying digital control in noise corrupted power
processing environment.
The digital pulse-width modulator (DPM) plays a key role
in the realization of high-performance digital PFC controller.
The DPM must provide a required pulse-width resolution as
well as a cycle-by-cycle adjustable switching frequency. The
TMS320F28335 provides 18-channel PWM outputs, in which
6 PWM output channels can be programmed with 150 ps
micro edge positioning (MEP) resolution and this
corresponds to about 16-bit control resolution for a 70 kHz
switching frequency. A DPM is also required to provide a
synchronized PWM generator to generate the PWM signals in
applications for the multi-phase interleaved PFC converter.
The programmable timer can be used as a software-controlled
interrupt generator to generate the sampling signals for A/D
converters for the sampling of inductor current.
The numerical realization of digital power controller
1028
15%
1.00
Analog PFC
Digital PFC
0.98
10%
Digital MMC
Analog PFC
0.96
Digital PFC
5%
Digital MMC
0.94
0.92
0%
10%
20%
60%
80%
100%
10%
(a) Power Factor
20%
50%
100%
(b) THD
Fig. 13. Performance comparison of three different PFC control schemes.
100%
PFC Target Efficiency
Efficiency
95%
90%
85%
80%
0%
Light Load
Operation Region
20%
40%
60%
80%
100%
Load
Fig. 11. Control flowchart of the proposed digital multi-mode PFC control
scheme.
v iinn
v iinn
v in
v in
iin
iin
ii n
P F = 0 .9 9
T H D i = 4 .5 %
(a) Rated load (100%)
iin
P F = 0 .9 9
T H D i = 8 .8 %
(b) Half load (50%)
Fig. 12. Measured line voltage and line current under (a) 100% load and (b)
50% load.
needs a compromise between its hardware implementation of
control interfaces and software programming of the digital
control and signal processing algorithms. Fig. 11 shows the
control flowchart of the proposed digital multi-mode PFC
control scheme. A mode selector is used to determine the
operating mode of the PFC converter under different line and
load operating conditions.
Fig. 12 shows the measured line voltage and line current
under rated load and half load conditions. It shows the line
current achieves a smooth sinusoidal waveform with low
THD for both DCM and CCM operation. Fig. 13 shows
performance comparison of three different PFC control
schemes: a conventional average current mode control with
analog PFC IC realization, a constant switching frequency
digital PFC controller, and the proposed digital multi-mode
PFC controller. It can be observed the developed digital
multi-mode PFC controller can achieve high power factor
Fig. 14.
scheme.
Measured efficiency of the multi-mode digital PFC control
over a wider load variation range.
Fig. 14 shows the measured efficiency of the developed
multi-mode digital PFC control scheme. With the proposed
adaptive switching frequency green-mode control strategy,
96.5% efficiency at 50% load and 91% efficiency at 5% load
has been achieved with a 675W rated power PFC converter.
Experimental results verify the feasibility of realization of
sophisticated digital PFC control scheme using advanced
floating-point DSP controller with improved power quality
and efficiency over wider load variation range from 5% to
100%.
V. CONCLUSION
This paper has presented a digital PFC control scheme
with multi-mode operation to adjust its PWM modulation
scheme and switching frequency to improve efficiency and
power factor over large line variations and wide load
operation range. The switching losses are reduced 5~15% for
load condition below 20%. A green mode control strategy has
been developed for mode selection and frequency scheduling
for the digital PWM controller. A digital dynamic signal
scalar has been developed to provide improve signal-to-noise
ratio under light load condition. These techniques result in
improved efficiency and reduced current distortion over a
load variation range from 5% to 100%. The proposed
multi-mode digital PFC control scheme has been realized
with a single-chip DSP controller. Simulation analysis and
experimental results were shown for a 675 W digitally
controlled boost PFC AC-DC converter.
1029
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