Journal of ELECTRONIC MATERIALS, Vol. 40, No. 3, 2011
DOI: 10.1007/s11664-010-1500-1
Ó 2011 TMS
Fabrication of Metal–Oxide–Diamond Field-Effect Transistors
with Submicron-Sized Gate Length on Boron-Doped (111)
H-Terminated Surfaces Using Electron Beam
Evaporated SiO2 and Al2O3
TAKEYASU SAITO,1,4,5 KYUNG-HO PARK,1 KAZUYUKI HIRAMA,2
HITOSHI UMEZAWA,1 MITSUYA SATOH,2 HIROSHI KAWARADA,2
ZHI-QUAN LIU,3 KAZUTAKA MITSUISHI,3 KAZUO FURUYA,3 and
HIDEYO OKUSHI1
1.—Diamond Research Center, National Institute of Advanced Industrial Science and Technology,
Tsukuba, Ibaraki 305-8568, Japan. 2.—Department of Electrical Engineering and Bioscience,
Waseda University, Shinjyuku-ku, Tokyo 169-8555, Japan. 3.—National Institute for Materials
Science, 3-13, Sakura, Tsukuba 305-0003, Japan. 4.—Present address: Department of Chemical
Engineering, Graduate School of Engineering, Osaka Prefecture University, 1-1 Gakuen-cho,
Naka-ku, Sakai 599-8531, Japan. 5.—e-mail: tsaito@chemeng.osakafu-u.ac.jp
A H-terminated surface conductive layer of B-doped diamond on a (111) surface was used to fabricate a metal–oxide–semiconductor field-effect transistor
(MOSFET) using an electron beam evaporated SiO2 or Al2O3 gate insulator
and a Cu-metal stacked gate. When the bulk carrier concentration was
approximately 1015/cm3 and the B-doped diamond layer was 1.5 lm thick, the
surface carrier mobility of the H-terminated surface on the (111) diamond
before FET processing was 35 cm2/Vs and the surface carrier concentration
was 1.5 9 1013/cm2. For the SiO2 gate (0.76 lm long and 50 lm wide), the
maximum measured drain current at a gate voltage of 3.0 V was 75 mA/mm
and the maximum transconductance was 24 mS/mm, and for the Al2O3 gate
(0.64 lm long and 50 lm wide), these features were 86 mA/mm and 15 mS/
mm, respectively. These values are among the highest reported direct-current
(DC) characteristics for a diamond homoepitaxial (111) MOSFET.
Key words: Surface conductive layer, metal oxide semiconductor, field-effect
transistor, drain current, transconductance
INTRODUCTION
Diamond semiconductor devices show promise for
high-power, high-frequency, and harsh environmental (radiation, high temperature, toxic chemicals) applications due to their excellent properties,
such as wide band gap energy (5.5 eV), high
breakdown electric field (10 MV/cm), maximum
thermal conductivity (20 W/cm K), and low dielectric constant (5.7).1 However, diamond device technology is almost always limited to those with the
p-type H-terminated surface conductive layer,
(Received March 18, 2010; accepted December 15, 2010;
published online February 3, 2011)
which shows high surface carrier density, because
the resistivity of the semiconductive diamond is still
high.2–5 Most studies have been carried out using
the (100)-oriented surface for two reasons: substrate
availability and its smooth surface morphology.
For FETs with H-terminated surface conductive
layers, device performance has rapidly improved
since they were first reported by Kawarada et al.6
Metal–semiconductor FETs (MESFETs) and metal–
insulator–semiconductor FETs (MISFETs) on
H-terminated surfaces on (100) substrates attained
cutoff frequencies over 20 GHz with a gate length
of 200 nm.7,8 Further detailed studies of (100)
H-terminated devices were recently reported for a
radiofrequency (RF) output power over 2 W/mm at
247
248
Saito, Park, Hirama, Umezawa, Satoh, Kawarada, Liu, Mitsuishi, Furuya, and Okushi
1 GHz, and for elevated temperature characteristics
up to 100°C.9–12 These investigations should provide
some of the significant results for actual diamond
applications in the near future. However, only a
very limited number of surface properties of H-terminated devices on homoepitaxially grown (111)
diamond crystals have been examined so far. Kasu
et al. reported that the surface carrier mobility and
concentration were 74 cm2/Vs and 1.7 9 1013/cm2,
respectively, and also fabricated an Al-gate MESFET with 11 lm gate length.13
Generally, fabrication of a gate insulator is one of
the essential aspects for high breakdown voltage
and low gate leakage current. These studies should
include process optimization to suppress damage to
the H-terminated surfaces on the diamond during
oxide growth. SiO2 gate insulators have been
investigated as a MISFET on B-doped diamond,14,15
however, only low transconductance (3.9 lS/mm)
was achieved,16 mainly due to the high resistivity of
the B-doped diamond. Yun et al.16–18 investigated
the surface state density between CaF2 and a diamond interface and succeeded in decreasing the
density to 1010/cm2 eV, which is a sufficiently low
level to make CaF2 an appropriate gate insulator for
H-terminated diamond MISFETs. Unfortunately,
CaF2 is not a suitable material, due to its instability
at elevated humidity. Therefore, development of
FET devices with gate materials other than CaF2 is
needed.
In the current study, a p-type surface conductive
layer of homoepitaxially grown diamond on (111)
was used to fabricate a metal–oxide–semiconductor
field-effect transistor (MOSFET) with submicronsized gate length using electron beam evaporated
SiO2 and Al2O3 gate insulators. The properties of
the MOSFET devices were measured, such as drain
current (Id) and gate current (Ig) as a function of
gate voltage (Vg) and drain voltage (Vd).
EXPERIMENTAL PROCEDURES
Homoepitaxial diamond growth was carried out
using a quartz-wall-type microwave plasma chemical vapor deposition (MPCVD) reactor (ASTEX
1.5 kW) with high-temperature, high-pressure synthesized type Ib diamond (111). Before growth, the
diamond was cleaned in a 200°C heated H2O2/H2O/
H2SO4 solution, then in HF, and finally in 80°C
heated H2O2/H2O/NH3. During its growth, the
source gas was CH4 diluted in H2 (0.1%), the
microwave power was 1200 W, the total pressure
was 50 Torr, and the diameter of the plasma ball
was 5 cm. Hall measurement results suggest that
boron was unintentionally incorporated into the
films. After growth, the diamond samples were
oxidized in a 250°C heated HNO3/H2SO4 (1:3)
solution and then 400 lm/ circular four-point van
der Pauw-configured Ti(30 nm)/Pt(30 nm)/Au(100 nm)
electrodes were formed by electron beam evaporation. Hall measurements of the samples for sheet
resistivity, carrier mobility, and carrier concentration of the diamond bulk layer were performed
using a Resi Test 8300 system (TOYO Corporation)
in ambient air.
MOSFET fabrication of the H-terminated diamond was done as follows. First, the electrodes were
removed using the following solutions in order: 80°C
heated HCl/HNO3 (3:1) solution, HCl/H2O2, 200°C
heated H2O2/H2O/H2SO4, and 250°C heated HNO3/
H2SO4 (1:3). Plasma hydrogenation was then done
for 30 min under the same conditions used in the
diamond growth described above. Before the MOSFET fabrication, a Hall measurement for the sheet
resistivity, surface carrier mobility, and surface
carrier concentration of the H-terminated layer was
also performed using an Accent HL5500 system in
ambient air. Au evaporated on the H-terminated
layer was used as the ohmic contact for the FET
source and drain. Inductively coupled plasma oxidation was used to remove the H-terminated surface
conductive layer to isolate each device. A selfaligned gate formation was carried out to form 0.64lm- to 0.97-lm-long gates by first depositing either
SiO2 or Al2O3 (50 nm) and then depositing a Cu
(50 nm) stacked gate oxide integrity (GOI) structure, and finally fabricating the stacked gate layers
(insulator and Cu) by lift-off processes. The gate
length (Lg) was measured by scanning microscopy.
Gate insulators, i.e., the SiO2 and Al2O3 layers,
were deposited using electron beam evaporation at
6.5 kV/110 mA and 6.5 kV/260 mA, respectively.
The gate electrode, Cu layers, were deposited using
resistively heated evaporation at 5 V/26 A. The
evaporation rates of the SiO2, Al2O3, and Cu were
24 nm/min, 24 nm/min, and 10 nm/min, respectively. The schematic cross-sectional structure of
our device is depicted in Fig. 1, however, the entire
MOSFET fabrication process sequence was described in our previous studies.19,20 Id, Vd, Vg, and Ig
were set at the prescribed values, and Id–Vd, Id–Vg,
and Ig–Vg characteristics were measured using a
parameter analyzer (Agilent 4156C).
Cross-sectional transmission electron microscopy
(TEM) samples were prepared by focused ion beam,
and observations were carried out in a JEMARM1000 high-voltage TEM operated at an accelerating voltage of 1000 kV.
RESULTS AND DISCUSSION
Table I presents the sheet resistivity, surface carrier mobility, and surface carrier concentration of the
H-terminated surface conductive layer on (111)
before the MOSFET fabrication, and the specific
resistance, carrier mobility, and carrier concentration of the diamond film oxidized in a HNO3/H2SO4
(1:3) solution, representing the basic electrical
properties of the H-terminated surface conductive
layer and that of the unintentionally B-doped diamond bulk layer, respectively. When the CH4 concentration was 0.1%, ls was approximately 35 cm2/Vs
Fabrication of Metal–Oxide–Diamond Field-Effect Transistors with Submicron-Sized Gate Length
on Boron-Doped (111) H-Terminated Surfaces Using Electron Beam Evaporated SiO2 and Al2O3
249
Source
Gate(Cu/Oxide)
Source (Au)
Drain (Au)
Drain
Gate
(111) diamond
Source
(a) Cross section
(b) Plain view
Fig. 1. (a) Cross-sectional schematic image of the MOSFET, and (b) plan view of the MOSFET.
Table I. Properties of H-terminated diamond (111) surface and bulk properties after wet oxidation in a
HNO3/H2SO4 (1:3) solution
Hydrogenated surface
Sheet resistivity
Surface carrier mobility
Surface carrier concentration
10.7–12.8 kX/sq
33.9–38.1 cm2/Vs
1.44–1.53 3 1013/cm2
Specific resistance
Carrier mobility
Carrier concentration
63–158 Xcm
74–146 cm2/Vs
0.68–5.3 3 1015/cm3
Wet oxidized surface
and Ns was 2 9 1013/cm2. The ls of a H-terminated
layer on a (111) surface (35 cm2/Vs) was only about
25% of that obtained on a H-terminated layer on a
(100) surface (150 cm2/Vs),7 and was lower than that
on a (111) surface (74 cm2/Vs) previously reported by
Kasu et al.,9 in which the deposition conditions were
CH4 concentration of 1%, microwave power of
1.3 kW, and substrate temperature between 650°C
and 685°C. Generally, the carrier mobility (l),
transconductance (gm), and fT have the following
relationships:21
gm ¼
W
lCG ðVG VT Þ;
Lg
(1)
gm
;
2pCGS
(2)
fT ¼
where CGS is the gate–source capacitance, W is the
gate width, Lg is the gate length, and CG is the gate
oxide capacitance per unit gate area. Therefore, an
increase in l (in the case of surface utilized device, l
becomes ls) is essential to achieve a higher gm.
When Ns was 3 9 1015/cm3, q and l measured in
ambient air after wet oxidation with HNO3/H2SO4
solution were 60 Xcm and about 70 cm2/Vs, respectively. The q value of this film (60 Xcm) was higher
than that for the B-doped (100) diamond with B2H6
(30 Xcm) reported by Kiyota et al.,22 and the l value
(about 70 cm2/Vs) was more than one magnitude
lower than that obtained for B-doped (100) diamond
(1000 cm2/Vs)22 in MPCVD.
Figure 2a and b, respectively, show the Id–Vd
characteristics for various Vg values and the Id–Vg
characteristics for various Vd measured in ambient
air for a FET device with a 0.76-lm-long, 50-lmwide SiO2 gate. When Vd = 0.05 V and Vg = ±1 V,
this SiO2 gate showed an Ig of about 101 A/mm2,
which is three orders higher than that for a pulsed
laser ablation Al2O3-gate diamond MOSFET.23 For
a MOSFET with a resistivity heater evaporated SiO
insulator on a H-terminated surface of polished
polycrystalline diamond with a 12-lm-long, 90-lmwide gate, Kitatani et al.24 reported a maximum
normalized Id of 100 lA/mm at Vg = 4.75 V, and
a maximum gm of 1 mS/mm. They also reported a
breakdown voltage of over 200 V, which is considered high enough to achieve a stable oxide. In this
study, the maximum normalized Id was 75 mA/
mm at Vg = 3.0 V. Based on Fig. 2b, the maximum
gm for a FET device with a 0.76-lm-long, 50-lmwide SiO2 gate was 15 mS/mm, which is one of the
highest gm values measured to date for a FET device
on a H-terminated diamond surface with a 0.76-lmlong, 50-lm-wide SiO2 gate.
Figure 3a and b show the Id–Vd and Id–Vg characteristics measured in ambient air for a FET device
250
Saito, Park, Hirama, Umezawa, Satoh, Kawarada, Liu, Mitsuishi, Furuya, and Okushi
100
60
Vg=-3.0V
60
2.0V
-2.0V
40
-1.0V
20
0
(b) SiO2 gate
50
80
I d [mA
A/mm]
I d [mA
A/mm]
(a) SiO2 gate
Vd=-8.05V
-6.05V
40
-4.05V
30
20
-2.05V
10
1
0
2
4
6
0V
0
8
-0.05V
-1
0
1
2
3
V g [[V]]
V d [V]
Fig. 2. (a) Id–Vd (drain current–drain voltage) characteristics for various gate voltages (Vg), and (b) Id–Vg characteristics for various Vd values for
a 0.76-lm-long, 50-lm-wide SiO2 gate measured in ambient air.
70
(a) Al2O3 gate
Vg=-3.0V
80
60
-2.0V
40
-1.0V
20
0
0.0V
+1.0V
0
2
4
6
8
60
I d [mA/mm
m]
I d [mA/mm ]
100
(b) Al2O3 gate
Vd=-8.05V
6 05V
-6.05V
50
-4.05V
40
30
-2.05V
20
10
0
-1
0
V d [V]
1
2
3
-0.05V
00
V g [V]
Fig. 3. (a) Id–Vd (drain current–drain voltage) characteristics for various gate voltages (Vg), and (b) Id–Vg characteristics for various Vd values for
a 0.64-lm-long, 50-lm-wide Al2O3 gate measured in ambient air.
200
Cu/SiO2 gate MISFET on (111) diamond [this study]
gate MISFET on ((111)) diamond [this
[
study]
y]
Cu/Al2O3 g
Cu/CaF2 gate MISFET on (111) diamond [31]
150
gm [mS/m
mm]
with a 0.64-lm-long, 50-lm-wide Al2O3 gate. The Ig
for this Al2O3 gate (101 A/mm2) was on the same
order of magnitude as that for a FET device with the
SiO2 gate (Fig. 2). The maximum normalized Id was
60 mA/mm at Vg = 3.0 V. Based on Fig. 3b, the
maximum gm was 15 mS/mm.
Figure 4 shows the maximum gm as a function of
gate length (Lg) for the FET devices fabricated to
date. The grey area and dotted area in the figure are
a rough summary of the reported data about diamond (100) MESFETs and (100) MISFETs from a
Cu-gate MESFET on single-crystalline diamond,25
an Al gate MESFET on single-crystalline diamond,7,26,27 a Cu/CaF2 gate MISFET on singlecrystalline diamond,8,19,20 and a Cu/CaF2 gate
MISFET on polycrystalline diamond.28 The figure
also shows a comparison between this study
(MOSFET) and a Cu/CaF2 gate MISFET on singlecrystalline (111) diamond.29 The estimated average
maximum gm of FET devices with a SiO2 gate
insulator with Lg = 0.76 lm was 15 mS/mm, and
that with a 0.96-lm-long gate was 3.3 mS/mm. The
estimated average maximum gm of FET devices
with an Al2O3 gate insulator with Lg = 0.64 lm was
7.8 mS/mm, and that with Lg = 0.97 lm was
4.5 mS/mm. This difference in gm between the two
types of insulators might be due to the difference
in temperature during the insulator deposition,
(100) MESFET
100
50
(100) MISFET
0
0
1
2
3
4
5
Lg [µm]
Fig. 4. Transconductance (gm) as a function of gate length (Lg) for a
Cu/SiO2-gate MOSFET on single-crystalline (111) diamond (), a
Cu/Al2O3-gate MOSFET on single-crystalline (111) diamond (e)
fabricated in this study, and a Cu/CaF2-gate MISFET on singlecrystalline (111) diamond (r). The grey region and the dotted region
show the typical range for the MESFET on (100) diamond and
MISFET on (100) diamond, respectively.
e.g., temperature increase due to radiation from the
filament. Taking advantage of this temperature
dependence is the main target in future research to
Fabrication of Metal–Oxide–Diamond Field-Effect Transistors with Submicron-Sized Gate Length
on Boron-Doped (111) H-Terminated Surfaces Using Electron Beam Evaporated SiO2 and Al2O3
251
Fig. 5. (a) HRTEM image of the interface between diamond (111) surface and SiO2 layer, and (b) HRTEM image of the interface between
diamond (111) surface and Al2O3 layer.
suppress the degradation of the sheet resistivity and
mobility of the H-terminated surfaces for improved
H-terminated diamond MOSFETs. Development of
more stable device structures, e.g., MISFETs,
MOSFETs, etc., is also necessary. These studies
should include screening of gate oxides based on, for
example, band gap, gap states, leakage current, and
breakdown voltage.30
Figure 5 shows cross-sectional high-resolution
TEM (HRTEM) images of each gate insulator, which
is part of the gate stack of the FET depicted in
Fig. 1a. The thickness of each insulator on the gate
integration is 45 nm for the Al2O3 layer and 50 nm
for the SiO2 layer. The interface between the diamond substrate and gate insulator are atomically
flat for both materials, while the interface roughness between the gate insulator and gate metal (Cu)
is apparently material related. The Al2O3 layer
showed rough interfaces, in which the SiO2 layer is
apparently smoother than that of the other case.
This should be due to the crystalline nature of the
materials. The Al2O3 layer also consisted of small
size grains, ranging from 10 nm to 20 nm. The SiO2
layer is amorphous. Very thin amorphous interface
layers between the diamond substrate and gate
insulator are also observed for both the Al2O3 layer
and the SiO2 layer, however, no chemical compositional fluctuation was observed.
B-doped (111) was successfully fabricated using
electron beam evaporated deposited SiO2 or Al2O3
gate insulators. For a 0.76-lm-long, 50-lm-wide
SiO2 gate, the maximum measured drain current at
a gate voltage of 3.0 V was 75 mA/mm and the
maximum transconductance was 15 mS/mm, and
for a 0.64-lm-long, 50-lm-wide Al2O3 gate, these
characteristics were 86 mA/mm and 24 mS/mm,
respectively. These values are among the highest
reported DC characteristics for a diamond homoepitaxial (111) MOSFET.
ACKNOWLEDGEMENTS
This study was carried out under the Advanced
Diamond Devices Project, The New Energy and
Industrial Technology Development Organization
(NEDO), Japan. Part of this study was supported by
the AIST-Nano-Processing Facility (AIST-NPF),
Nanotechnology Research Institute (NRI) of the
National Institute of Advanced Industrial Science
and Technology (AIST), which is a member of the
Nano-foundry Group that conducts the Nanoprocessing Partnership Program (NPPP) part of the
Nanotechnology Support Project of the Ministry of
Education, Culture, Sports, Science, and Technology (MEXT).
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CONCLUSIONS
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1015/cm3 to 5.3 9 1015/cm3. These measured values
confirm that a MOSFET with a H-terminated diamond surface and a submicron-sized gate length on
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