International Journal of Emerging Technology and Advanced Engineering
Website: www.ijetae.com (ISSN 2250-2459, ISO 9001:2008 Certified Journal, Volume 3, Issue 10, October 2013)
Comparative Study of Extraction Techniques of Metal Oxide
Semiconductor Field Effect Transistor
Laby Brey1, Anil Kumar2, A.K.Jaiswal3
1
2
M.Tech Scholar, Assistant Professor, 3Head of Department, SHIATS DU, Allahabad
Although saturation velocity is used for short-channel
devices under high drain bias, effective mobility is widely
used for benchmarking different devices in technology
development and material selection. In addition,
capacitances and mobility are the key parameters for device
modeling. The reduction in operation bias and doping can
also lead to lower field for future MOS technologies. As a
result, accurate extraction of capacitance and mobility is
essential. Conventionally, effective mobility is extracted by
measuring the inversion charge per unit area. The drain
side from the Ids–Vgs measurements and a nonzero bias
must be applied to the drain, typically in the range of 25–
100 mV. This Vds reduces the voltage difference between
the gate and the channel when moving toward the drain,
leading to a non uniform charge distribution. Since
capacitance mobility is an important parameter for
technology development and circuit simulation, impact
from Vds must be corrected. Efforts have been made to take
into account Vds impact on mobility evaluation also it has
been seen that at traditional room temperature, mobility
parameter extraction needs importance.
Abstract—In this dissertation a P-type MOSFET is
presented and extraction techniques as electrical parameters
are used to study different parameters like mobility and
concentration. It is observed for the gate to source voltage,
drain to source current as well as width of the MOSFET
channel. An accurate drain current extraction is obtained
from the linear mobility by excluding the parasitic
source/drain resistance and the parasitic gate capacitance.
Direct extraction of each parameter is done and the extracted
results are physically meaningful and are in good agreement
with the measured data without any optimization.
Keywords—MOSFET, mobility, concentration.
I. INTRODUCTION
As wireless communication markets continue to expand,
advances in wireless transceivers demand higher levels of
integration and low-cost technologies. A possible solution
is MOSFET, where the low-power performance advantage
in the baseband is well established, and significant work
has been aggressively targeting a MOS RF front end that
can be integrated into a single chip. A critical issue for
production designs is the availability of compact models to
accurately predict the MOS transistor behavior at high
frequencies (0.9 GHz). This is critical to first-time design
success and for meeting of market windows with MOS RF
products. Due to the complexity of the equivalent circuit, a
time-consuming optimization approach was used to extract
the parameter values. A small-signal MOSFET model with
an Rg, Cgd and Cgs distributed network was also described,
which was very difficult to use for the direct extraction of
model parameters. To overcome all these difficulties, now
the MOSFET simulation and modeling has left its infancy
and has reached a level whereby high agreement is reached
with experimental characteristics. At the same time, by
building in temperature dependent physical models, it is
possible to predict the low temperature operation in an
accurate way. Since capacitance mobility is an important
parameter for technology development and circuit
simulation, impact from Vds must be corrected. Efforts have
been made to take into account Vds impact on mobility
evaluation. The gate capacitance and channel mobility (μ)
is also an important parameter for metal oxide
semiconductor (MOS) technologies.
II. STRUCTURE
Figure-1 is the structure of the MOSFET transistor
which has oxide thickness (tox) 30nm, intrinsic
concentration (Ni) 1.4*1010cm-3, Impurity atoms (Na)
2*1015, width of the channel (W) 3μm, channel length (L)
1μm, and the threshold voltage (Vt) is the 0.75v.
Figure 1 Structure of MOSFET
125
International Journal of Emerging Technology and Advanced Engineering
Website: www.ijetae.com (ISSN 2250-2459, ISO 9001:2008 Certified Journal, Volume 3, Issue 10, October 2013)
Whereby the coefficient β depends on θ#. Physically
acceptable values for the empirical exponent ‗n‘ are in the
range 2 (300 K) to 3 (4.2 K). The effective mobility is
shown to be:
III. ANALYTICAL ANALYSIS
The analysis of MOSFETs in different ways has been
done and many articles are published. Considering the case
of mobility, the extraction and physical modelling of the
inversion layer mobility has attracted a lot of attention in
the past two decades, both at room temperature. At room
temperature, the effective mobility µeff, which is defined as:
µeff=
µeff=µg
With x = θ(Vgs-Vt) and μg proportional to the maximum
effective mobility through the relationship:
(1)
µeff=
µmaxf=µg
(2)
(7)
At the same time, the charge threshold voltage Vt at any
temperature in the range 4.2 to 300 K can be derived from:
Which now transforms as:
µeff=
(6)
(3)
VText=Vt
Where g is the channel conductance and Ns is the
inversion layer carrier surface density and µo is the zero
field mobility. The generalised mobility attenuation factor
θ# is given by the formulae:
Where θ# is obtained from:
(9)
(4)
The mobility μeff is an explicit function of the inversion
charge Q, which in its most general form is represented by:
and is a measure of the reduction of the effective mobility
with increasing normal field. The latter is physically due to
the increasing contribution of surface roughness scattering
to the carrier mobility. From eqs. (3) and (4) it is assumed
that the source-drain series resistance is constant with VgsVt (non-LDD type of MOSFETs) and that the gate
overdrive voltage Vgs-Vt >>IdRsd/2 the extraction of μeff
from a linear input curve an accurate modeling of the
device characteristics, in case of the μeff dependence on the
normal field. This implies that most of the extraction
methods which have been proposed recently are rather
complex and require numerical treatment of the
measurement data. In many cases, they are applicable only
in a restricted temperature regime generally from 77 K.
extraction of the electron mobility in inversion and
accumulation layers, to SOI MOSFETs and to n- and pMOSFETs with nitrided oxide gates. The principle of the
extraction method is based on the empirical relationship
between the function I2 d/gm and the gate overdrive
voltage Vgs-Vt.
=β(Vgs-Vt)
n
(8)
=
+BQi
(10)
Where by the coefficient A is a Coulomb scattering
parameter and B a surface roughness scattering parameter.
IV. RESULTS AND DISCUSSION
Figure 2. Charge Density and Gate Source Voltage Characteristics.
(5)
126
International Journal of Emerging Technology and Advanced Engineering
Website: www.ijetae.com (ISSN 2250-2459, ISO 9001:2008 Certified Journal, Volume 3, Issue 10, October 2013)
As seen in the figure 2 above it is clearly evident that the
graph between charge density and the gate to source
voltage varies non-linearly and the value of charge density
decreases with the increasing values of the Vgs. At the
value of Vgs from 0.5 V upto 1, charge density gradually
decreases and beyond 1V of Vgs charge density remains as
constant.
In the figure 4, there is the variation of mobility Vs
concentration where the value of charge concentration
decreases continuously for rising the values of mobility, for
different values of Vgs and the curve being a non-linear.
Increasing the mobility at constant gate to source voltage
Vgs, starting concentration decreased very fast and beyond
400 cm2/V very small decrement of concentration with
mobility.
Figure 3. Drain Current and Gate Source Voltage characteristics.
Figure 5. Relationship of Concentration with Channel Width.
The figure 3 below clearly shows the characteristics of
the drain current Ids with respect to the gate to source
voltage Vgs. As it is shown in the graph the value of Ids
remains constantly zero initially for the rising values of
Vgs, but after a certain time, the value of Ids starts rising
gradually, upto Vgs = 0.8V. It can also be seen that as the
value of mobility is increased the Ids also increases for
rising values of Vgs but still in a non-linear fashion. Due to
this figure it is clear that if mobility is increased with
constant Vgs, drain current rises linearly.
In the figure 5 given above, it is clearly evident that the
carrier concentration decreases with increasing channel
width in a non-linear pattern upto a certain value of width.
After a value the concentration does not decreases and it
remains as constant. The graph is plotted for various
values of gate to source voltage (Vgs) and in each case the
graphs are non-linear for certain values of width, and
beyond that value it does not decrease. However, the initial
value of carrier concentration is higher at higher values
Vgs.
V. CONCLUSION
By the different characteristics shown above, it is clear
that the mobility and gate capacitance extraction for PMOSFETs are better options for the scaling of device
operated at different voltages as well as various electrical
parameters of the device.
REFERENCES
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[2 ] E. Abou Allam and T. Manku (1997). ―A small-signal MOSFET
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Figure 4. Mobility and Concentration characteristics.
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International Journal of Emerging Technology and Advanced Engineering
Website: www.ijetae.com (ISSN 2250-2459, ISO 9001:2008 Certified Journal, Volume 3, Issue 10, October 2013)
[3 ] M. Bagheri and Y. Tsividis (1985). ―A small signal dc-to-highfrequency non-quasistatic model for the four-terminal MOSFET
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BIOGRAPHY
Laby Brey is a M.Tech. student in
Electronics
And
Communication
Engineering SSET, SHIATS-DU
Allahabad.
Anil Kumar is Asst. Prof. at SHIATSDU Allahabad. He obtained B.E
(MMMEC,Gorkhpur)
in
ECE,
M.Tech. (IIT BHU Formerly IT
B.H.U.) in Microelectronics Engg.,
and Ph.D from SHIATS Allahabad.
He guided various projects & research
at undergraduate & postgraduate level.
He published many research papers in
different journals. He has more than 10 years teaching.
Experience and actively involved in research and
publications. His area of interest includes Antenna,
microwave, artificial neural network and VLSI.
A.K. Jaiswal is Prof. and Head of
ECE
Dept
at
SHIATS-DU
Allahabad. He obtained M.Sc. in
Electronic & Radio Engg. from
Allahabad University in 1967. He
guided various projects & research at
undergraduate & postgraduate level.
He has more than 40 years Industrial,
research and Teaching experience
and actively involved in research and publications. His area
of interest includes Optical Networks and satellite
communication.
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