MINIATURIZATION OF FOLDED SLOT ANTENNAS THROUGH INDUCTIVE
LOADING AND THIN FILM PACKAGING
by
DAVID A. KARNICK
Submitted for the partial fulfillment of requirements
for the degree of Master of Science
Thesis Adviser: Dr. Christian A. Zorman
Department of Electrical Engineering and Computer Science
CASE WESTERN RESERVE UNIVERSITY
May, 2011
CASE WESTERN RESERVE UNIVERSITY
SCHOOL OF GRADUATE STUDIES
We hereby approve the thesis of
David Karnick
candidate for the Master of Science degree*.
Christian A Zorman
(chair of the committee)
Francis Merat
Phillip Feng
1/13/11
*We also certify that written approval has been obtained for any proprietary
material contained therein.
Table of Contents
List of Tables ..................................................................................................................... iv
List of Figures ..................................................................................................................... v
Acknowledgements .......................................................................................................... viii
Abstract .............................................................................................................................. ix
1
Introduction ................................................................................................................. 1
1.1
1.1.1
Miniaturization of RF Devices through Reactive Loading ........................... 1
1.1.2
Packaging Techniques for RF Devices ......................................................... 5
1.2
2
Inductive Load.................................................................................................... 10
Folded Slot Antenna .................................................................................................. 15
3.1
4
Goals..................................................................................................................... 7
The Wilkinson Power Divider ..................................................................................... 9
2.1
3
Motivation and Background ................................................................................. 1
Physical Definitions ........................................................................................... 15
Inductive Loading on the FSA................................................................................... 17
4.1
Models and Simulation....................................................................................... 17
4.2
Fabrication.......................................................................................................... 21
4.2.1
Materials ..................................................................................................... 22
4.2.2
Milling Process ........................................................................................... 22
4.2.3
Photolithography Process............................................................................ 26
i
4.2.4
5
6
4.3
Measurements..................................................................................................... 30
4.4
Integrated Component Model............................................................................. 33
Capacitive Loading on the FSA................................................................................. 41
5.1
Top-Mounted Capacitors.................................................................................... 41
5.2
Integrated Capacitor Model ................................................................................ 43
Inductive and Capacitive Loading in Combination ................................................... 47
6.1
Series vs. Parallel Combination ......................................................................... 47
6.1.1
Parallel Combination .................................................................................. 47
6.1.2
Series Combination ..................................................................................... 48
6.2
LC Fabrication.................................................................................................... 52
6.2.1
Milling Process ........................................................................................... 52
6.2.2
Photolithography Process............................................................................ 52
6.2.3
Mounting of Components ........................................................................... 53
6.3
7
Mounting of Components ........................................................................... 29
Measured Results ............................................................................................... 54
Sputtered Silicon Carbide as a Packaging Material................................................... 58
7.1
Wafer Fabrication ............................................................................................... 58
7.1.1
Evaporation of Metals ................................................................................. 59
7.1.2
Sputtering of Silicon Carbide...................................................................... 59
7.1.3
Etching ........................................................................................................ 60
ii
7.1.4
7.2
Chemical Resistance Tests ................................................................................. 61
7.2.1
8
Patterning .................................................................................................... 60
Results ......................................................................................................... 63
7.3
Dielectric Constant ............................................................................................. 68
7.4
LC Resonator...................................................................................................... 69
Conclusions and Recommendations .......................................................................... 71
APPENDICES .................................................................................................................. 76
APPENDIX A: Mathematica Script for Wilkinson Calculations ................................. 77
Bibliography ..................................................................................................................... 80
iii
List of Tables
Table 1: Dimensions for FSA with mounted inductors .................................................... 18
Table 2: Milled CPW dimensions for FSA with inductors ............................................... 25
Table 3: Chemically-etched CPW dimensions for FSA with inductors ........................... 28
Table 4: Milled CPW dimensions for FSA with inductors and capacitors ....................... 52
Table 5: Chemically-etched CPW dimensions for FSA with inductors and capacitors ... 53
Table 6: Etch test matrix ................................................................................................... 62
Table 7: Average changes per sample by etch test ........................................................... 67
iv
List of Figures
Figure 1.1: Two approaches to transmission-line length reduction [1] .............................. 2
Figure 1.2: Magnetic current distribution on a half wavelength and inductively [4] ......... 3
Figure 1.3: (a) Simulated and (b) measured |S11| for antennas without and with capacitors
[5] ........................................................................................................................................ 4
Figure 1.4: Effect of loaded capacitor on resonant frequencies of slot antennas [6] .......... 5
Figure 2.1: Schematic for Wilkinson power divider ........................................................... 9
Figure 2.2: Modified Wilkinson schematic with added capacitors................................... 10
Figure 2.3: Modified Wilkinson power divider with added inductors.............................. 11
Figure 2.4: Modified transmission line impedance vs. line length (in wavelengths) ....... 14
Figure 2.5: Load inductance vs. line length (in wavelengths) .......................................... 14
Figure 3.1: Schematic of unloaded folded slot antenna .................................................... 15
Figure 3.2: Radiation pattern of basic FSA ...................................................................... 16
Figure 4.1: Folded slot antenna with side-mounted inductors .......................................... 17
Figure 4.2: S11 vs. Frequency for simulated side-mounted inductors ............................. 19
Figure 4.3: Folded slot antenna with top-mounted inductor ............................................. 20
Figure 4.4: S11 vs. Frequency for simulated top-mounted inductor ................................ 21
Figure 4.5: Contrasted image of mill depth inconsistencies on side slot .......................... 24
Figure 4.6: Contrasted image of mill depth inconsistencies at top of CPW (left side)..... 24
Figure 4.7: Image of mill depth inconsistencies at top of CPW, higher zoom ................. 25
Figure 4.8: Photolithography process [19]........................................................................ 27
Figure 4.9: Images of FSAs created with (a) milling process and (b) photolithography.. 29
Figure 4.10: Image of FSA with mounted inductors ........................................................ 30
v
Figure 4.11: S11 vs. Frequency for milled FSAs with side-mount inductors................... 31
Figure 4.12: S11 vs. Frequency for FSAs with side-mounted inductors created using
photolithography ............................................................................................................... 32
Figure 4.13: S11 vs. Frequency for FSAs created using photolithography to be mounted
with load inductors............................................................................................................ 33
Figure 4.14: Spiral inductor model ................................................................................... 34
Figure 4.15: Spiral inductor and FSA ............................................................................... 34
Figure 4.16: Spiral inductor model ................................................................................... 36
Figure 4.17: Inductance vs. Frequency for spiral inductor ............................................... 37
Figure 4.18: Excitation port for FSA in HFSS ................................................................. 38
Figure 4.19: S11 vs. frequency for FSA with integrated spiral inductor .......................... 39
Figure 4.20: Radiation pattern of FSA with integrated spiral inductors ........................... 40
Figure 5.1: S11 vs. Frequency for simulated top-mounted capacitors ............................. 42
Figure 5.2: S11 vs. Frequency for simulated side-mounted capacitors ............................ 43
Figure 5.3: MIM capacitor on FSA................................................................................... 44
Figure 5.4: S11 vs. Frequency for FSA with MIM capacitors ......................................... 46
Figure 6.1: S11 vs. Frequency for FSA with inductive and capacitive loads in parallel .. 48
Figure 6.2: Metal block between two ideal components .................................................. 49
Figure 6.3: S11 vs. Frequency for FSA with capacitive and inductive loads in series,
varying C........................................................................................................................... 50
Figure 6.4: S11 vs. Frequency for FSA with inductive and capacitive loading, varying L
........................................................................................................................................... 51
Figure 6.5: Image of completed FSA with mounted capacitors and inductors ................. 54
vi
Figure 6.6: S11 vs. Frequency for milled FSA with capacitive and inductive loads in
series ................................................................................................................................. 55
Figure 6.7: S11 vs. Frequency for FSAs with inductors and capacitors created using
photolithography ............................................................................................................... 56
Figure 6.8: S11 vs. Frequency for FSAs created using photolithography to be mounted
with inductors and capacitors in series ............................................................................. 57
Figure 7.1: First layer of MIM capacitor design (Cr/Au on alumina) .............................. 61
Figure 7.2: Apparatus similar to that used in the pull test [15]......................................... 63
Figure 7.3: Microphotographs of samples with gold lines after etch tests ....................... 64
Figure 7.4: Microphotographs of samples with checkerboard pattern after etch tests ..... 65
Figure 7.5: SEM images of samples after etch tests ......................................................... 66
Figure 7.6: LC Resonator with SiC packaging ................................................................. 69
Figure 7.7: S-parameters for LC resonator with and without SiC film ............................ 70
vii
Acknowledgements
First and foremost I would like to thank Max Scardelletti, a researcher at NASA
Glenn Research Center in Cleveland, OH. Most of this research is based off of his
previous work, and he worked closely with me throughout the entire process, guiding me
and forcing me to ask the right questions. I would also like to thank Chris Zorman, my
thesis adviser, who has also been there to prod and encourage me in the right direction.
I would like to acknowledge NASA Glenn and the LERCIP internship program
for sponsoring the majority of this research. Most of the work done for this thesis was
done on NASA property with their facilities and materials. In particular I would like to
thank the Liz McQuaid, Nick Varaljay, and George Ponchak, the researchers who worked
most closely with me during my time there.
Thanks to those graduate students at Case Western who were able to help me.
Chris Roberts, Jeremy Dunning, and Andrew Barnes worked with me on the fabrication
process and just offered help wherever I needed it around the lab.
Finally, I would like to thank everyone who came to hear my defense and asked
me lots of very good questions. In particular I would like to acknowledge my committee,
which included Chris Zorman, Frank Merat, and Phil Feng.
viii
Abstract
Miniaturization of Folded Slot Antennas through Inductive Loading and Thin Film
Packaging
Abstract
by
DAVID A KARNICK
Miniaturization of RF devices through reactive loading and thin film packaging is
investigated. Impedance matching of a Wilkinson power divider with inductive loading
is used to formulate relationships between load inductance, operating frequency,
transmission line length, and line impedance. The resonant frequency of a folded slot
antenna (FSA) is shown to decrease with the addition of inductive loading. This process
can be reversed to create a physically smaller antenna with the same resonant frequency.
FSAs with inductive and capacitive loading in combination are also investigated, but no
benefit is found to the addition of capacitors.
Amorphous SiC deposited by sputtering is investigated as a thin film packaging
material for RF applications. Various packaging qualities are tested, including chemical
resistance, conformality, adhesion, dielectric constant, and effect on the operation of the
ix
packaged device. It is shown that, except for lack of conformality, sputtered SiC is
appropriate for packaging RF devices.
x
1
Introduction
Miniaturization is an ever-present trend in the world of electronics. Applications
such as implantable wireless biomedical sensors and smart sensor systems for
combustion-based energy applications strive for smaller devices that create less of an
impact on the surrounding environment. Consumer electronics such as cellular
telephones desire smaller components which free up space for other devices.
Miniaturization of antennas and other RF devices has its own particular challenge,
because the physical size of the device is directly related to the wavelength at which it
operates. It is therefore desired to develop innovative techniques to reduce the physical
size of antennas and other RF devices.
1.1
1.1.1
Motivation and Background
Miniaturization of RF Devices through Reactive Loading
There has been a fair amount of research performed into the miniaturization of
microfabricated RF devices through reactive loading. Hettak et al. has shown size
reduction in Wilkinson power dividers using the addition of either capacitive or inductive
loading [1]. A Wilkinson power divider is a matched three-port network which uses
quarter wavelength transmission to either divide a single input or combine two inputs.
The theory behind this technique is as follows. Any arbitrary transmission line has a
certain inductance and capacitance associated with it, and decreasing the length of the
line also decreases these values. In order for the smaller transmission line to be
equivalent in operation to the larger, one of two methods can be used. First, inductive
loading could be added in series with the transmission line (increasing L) and the
1
impedance of the transmission line would be lowered (increasing C). Alternatively,
capacitors could be connected from the ends of the transmission line to ground
(increasing C) while the impedance of the line is increased (increasing L). This process
is depicted quite well in Figure 1.1 below.
Figure 1.1: Two approaches to transmission-line length reduction [1]
Scardelletti et al. has also shown the ability to reduce the size of a Wilkinson
power divider using capacitive loading. Here impedance-matching techniques were used
to define the capacitance and line impedance needed to achieve any desired line length at
a given frequency. The power dividers were also fabricated, and the limitations on this
miniaturization technique found [2]- [3].
While this technique is appropriate for transmission lines, which are real physical
elements, a different approach needs to be taken for resonating slot elements. Azadegan
and Sarabandi propose a method of size reduction for slot antennas using inductive
2
loading [4]. In their method, the length of a microstrip-fed half-wave slot antenna is
reduced by adding inductive spiral slotlines at the ends of the slot. For a half-wave slot
antenna, the boundary conditions (BCs) at the ends enforce zero voltage (short circuit).
The addition of inductive elements alters the BCs to enforce a voltage at the ends and
enabling the antenna to have a shorter resonant length.
Figure 1.2 below depicts an example of this process. The normal half-wave slot
has boundary conditions at the end for zero magnetic current density, or zero voltage.
The addition of inductive elements at the ends of a shorter slot antenna forces a voltage,
allowing it to resonate at the same wavelength.
Figure 1.2: Magnetic current distribution on a half wavelength and inductively [4]
3
The addition of reactive components to slot antennas as a method of
miniaturization is also shown by Scardelletti et al. [5]. Here the resonant frequency of a
folded slot antenna is decreased by adding capacitive loading in the form of surface
mount chip capacitors. The fabricated antennas verified the results of simulations as
shown in Figure 1.3. These plots show S11 (called S11 throughout the rest of this thesis)
over a frequency range for different capacitor values. S11 is an S-Parameter, which
represents the amount of a signal (in dB) measured in a 2 port system. For an antenna,
which is a 1-port element, S11 represents the reflection coefficient, or the proportion of
the supplied signal which is reflected back to the input port. For the most power to be
radiated in the antenna, we wish for the S11 value to be small. A downward spike
corresponds to a resonant frequency of the antenna.
Figure 1.3: (a) Simulated and (b) measured |S11| for antennas without and with
capacitors [5]
Size reduction with capacitive loading has also been shown for other slot antennas
as well. A chip capacitor was used to achieve a 23.4% size reduction of an annular slot
antenna [6]. Figure 1.4 shows the relationship between the resonant frequency and the
4
slot radius of the antenna. The “X”s and squares refer to the antenna with and without a
capacitive load, respectively. It can be seen through interpolation that an unloaded
antenna with 20mm radius and a loaded antenna with approximately 17mm radius both
resonate at about 2GHz.
Figure 1.4: Effect of loaded capacitor on resonant frequencies of slot antennas [6]
1.1.2
Packaging Techniques for RF Devices
Another method of miniaturization is to focus on decreasing the size of the
packaging rather than the device itself. RF and other wireless devices propose a
particular challenge in that the properties of the packaging material can greatly affect the
operation of the device. In order to have the least impact on the operation of the device,
the packaging material should be thin and have a low dielectric constant. A dielectric
constant less than 15 would be considered low, though less than 10 is preferred. For
these reasons it is desired to investigate the packaging qualities of a thin film to be used
specifically with RF devices.
5
Most conventional packaging methods require multiple steps and are not the best
packaging for RF devices. Researchers Lim et al. [7] and Wi et al. [8] describe
packaging methods using low temperature co-fired ceramic. The processes contain
multiple steps and layers, and it was shown that the packaging affects the operation of the
antenna. The antenna must therefore be designed with the packaging in mind.
There has also been research into the use of thin films as packaging materials.
Parylene, a vapor deposited polymer used to protect sensitive electronics from moisture,
was shown to exhibit good coverage and chemical resistance, though it had some
problems with adhesion [9]- [10]. Benzocyclobutene (BCB) was used to package IC
chips and was shown to have excellent mechanical, thermal, and electrical properties
[11]. Silicon carbide deposited by plasma enhanced chemical vapor deposition (PECVD)
was used as a packaging material on microfabricated RF antennas. The antennas showed
no change in performance and the film showed high chemical resistance [12].
While the use of PECVD SiC is useful, the deposition process is performed at
300°C. While this temperature is relatively low in terms of other CVD methods, it is still
high enough to damage temperature-sensitive polymeric substrates such as liquid crystal
polymer (LCP). Previous research has shown that LCP make an excellent substrate
material for microfabricated antennas [13]. SiC deposited using the sputtering process
has been shown to be chemically resistant to perchloric acid [14]. Since the sputtering
process is performed at room temperature, it is potentially suitable for use in packaging
device structures on polymeric substrates; however, more research into the packaging
qualities of the sputtered SiC film is required.
6
1.2
Goals
The primary goal of this investigation is to show that inductive loading can be
used as a miniaturization technique for two RF devices. For the Wilkinson power
divider, it has been previously formulaically shown that capacitive loading can be used to
decrease the size of a transmission line [2]. The goal in this thesis is to use the same
impedance matching equations to relate the value of an inductive load, the operating
frequency, the length of the transmission line, and the impedance of the transmission line.
The value of two of these parameters can be determined by defining the other two. For
this study, the inductance and line impedance are defined in terms of the operating
frequency and line length.
It has been previously shown that capacitive loading can be used as a
miniaturization process for folded slot antennas. The goal of this investigation is to show
that inductive loading decreases the resonant frequency of the antenna. This decrease in
frequency also indicates a corresponding increase in wavelength. The resonant
wavelength of an antenna is directly related to its physical size. This process can be used
in reverse to create a physically smaller antenna with inductive loading that operates at
the same frequency as a larger unloaded antenna. Therefore, by demonstrating that the
addition of inductive components decreases the resonant frequency of the antenna, it is
shown that the same process can be used as a miniaturization technique.
The secondary goal of this thesis is to demonstrate that sputtered SiC is an
appropriate thin film packaging material for RF devices. This can be done by testing the
properties of the film against a set of qualities desired in a packaging layer. Chemical
resistance can be demonstrated by showing that the film does not change after being
7
exposed to a specified chemical for an extended duration of time. Conformality can be
shown by examining topological features under a microscope and be determining that the
layer beneath the SiC was not affected by the chemical exposure. Adhesion strength
greater than or equal to the adhesion strength of lower layers (108 N/m2) is desired, and
can be tested using a pull test (described in further detail in Section 7.2) [15]. A low
dielectric constant (<15) is desired so as to have minimal interference with the device
being packaged. The overall effect of the film on the operation of a device can be shown
by measuring the characteristics of an RF device with and without the SiC film.
8
2
The Wilkinson Power Divider
A Wilkinson power divider is a matched three-port network designed to divide an
input signal into two equal-phase outputs or to combine two equal-phase inputs into a
single output. Figure 2.1 is a schematic diagram of a typical WPD. Two quarterwavelength transmission lines of characteristic impedance Z0√2 are connected from an
input source at Port 1 to two output Ports 2 and 3. Z0 represents the characteristic
impedance of the system and λ is the desired operating wavelength. A 2Z0 resistor
connects the two Ports 2 and 3. The three ports are matched to have the same
characteristic impedance.
Figure 2.1: Schematic for Wilkinson power divider
It has been shown that capacitors can be connected from each port to ground in
order to reduce the physical size of the Wilkinson power divider [2]. Figure 2.2 below
shows the simplified schematic with capacitors at each port. In this modified set up, the
input impedance (Zin) is set equal to twice the characteristic impedance in order to define
the characteristic impedance of the modified transmission line (Zx) and the capacitance
(C) in terms of the desired frequency and transmission line length (ℓ). ZL represents the
9
load impedance of the capacitor in parallel with the characteristic impedance of Port 2,
and Zin* represents an intermediate input impedance within the WPD used for calculation
purposed only.
Figure 2.2: Modified Wilkinson schematic with added capacitors
The objective of this investigation is to pursue similar results using inductive loading
independently instead of capacitive.
2.1
Inductive Load
In order to investigate the effects of inductive loading on the Wilkinson power
divider, the parallel capacitors in Figure 2.2 have been replaced with in-line inductors, as
shown in Figure 2.3.
10
Figure 2.3: Modified Wilkinson power divider with added inductors
The load impedance of the modified Wilkinson power divider (ZL in Figure 2.3)
is the characteristic impedance of Port 2 in series with the inductive load:
(1)
Where L is the inductance value and ω is equal to 2πf, with f being the desired operating
frequency. Next, Zin* can be calculated using the formula for the impedance of an ideal
transmission line:
tan
tan
(2)
where l defines the length of the transmission line, and
, where λ is the wavelength
on the transmission line. The final input impedance is then equal to the series
combination of the inductive impedance and Zin*:
tan
tan
(3)
Equation 3 can be rewritten, setting Zin equal to 2Z0:
11
tan
tan
2
(4)
Equation 1 can then be substituted into Equation 4:
2
tan
tan
tan
(5)
Equation 5 can be expanded to give:
tan
tan
tan
(6)
2
tan
tan
Equation 6 is then rearranged and separated into real and imaginary components to give
the following equalities:
Real:
Z tan
0
tan
2
(7)
Imaginary:
2
tan
tan
0
(8)
Solving the real part for L gives:
(9)
tan
which can be substituted into Equation 8 to solve for Zx:
tan
1
2
tan
(10)
The inductance can then be solved explicitly in terms of ω and l:
12
1
2
tan
(11)
Equations 10 and 11 show that the inductance and line impedance can be calculated for
any desired configuration of frequency and line length. Figure 2.4 shows the relationship
between the transmission line impedance and the transmission line length (given in
number of wavelengths). Figure 2.5 shows the relationship between load inductance and
line length. Both plots were made assuming a frequency value of 5GHz and a
characteristic impedance of 50Ω. This frequency value was chosen based on the
frequency range of the FSAs in this thesis, and the impedance value was chosen based on
the characteristic impedance of a standard SMA connector. These plots were created
using Mathematica™ computational software [16]. The full code can be found in
Appendix A.
It can be seen in these plots that there are real positive values for transmission line
impedance and load inductor value that will allow the line length of a WPD to be less
than λ/4, given an operating frequency and characteristic impedance. This relationship
provides designers with a method to reduce the size of a Wilkinson power divider by
adding inductive loading and decreasing input impedance.
13
70
60
Zx HW L
50
40
30
20
10
0
0.00
0.05
0.10
0.15
Line Length HlL
0.20
0.25
Figure 2.4: Modified transmission line impedance vs. line length (in wavelengths)
Inductance H nHL
2.0
1.5
1.0
0.5
0.0
0.00
0.05
0.10
0.15
Line Length HlL
0.20
0.25
Figure 2.5: Load inductance vs. line length (in wavelengths)
14
3
Folded Slot Antenna
The antenna design being investigated in this research is the folded slot antenna.
The FSA is particularly useful in this investigation for a couple different reasons. First,
the FSA is fed by a coplanar wave guide (CPW) transmission line. This CPW feed
allows the antenna to be easily connected with other devices using SMA connections.
Secondly, the FSA typically has a single, relatively narrow-band, resonance point. This
makes it much easier to evaluate shifts in the resonance of the antenna.
3.1
Physical Definitions
Figure 3.1 below defines many of the physical dimensions of the folded slot
antenna.
Figure 3.1: Schematic of unloaded folded slot antenna
The characteristic impedance of the CPW feed is defined by the dimensions s, w,
and h, as well as the dielectric constant of the substrate. The CPW dimensions used were
s = 2.3mm and w = 0.3mm. These dimensions were chosen to give a characteristic
15
impedance of approximately 50Ω as also described in [5]. This impedance is chosen to
match with the characteristic impedance of an SMA connector mounted at the base of the
CPW feed.
The radiation pattern of a basic folded slot antenna was simulated using Ansoft
HFSS™ computational software, as shown in Figure 3.2 below [17]. This plot represents
the radiated power as a gain in dB, relative to a perfect isotropic radiator. Here the solid
line represents the radiation pattern in the yz-plane, and the dotted line the radiation
pattern in the xz-plane (as defined in Figure 3.1). The 3D radiation pattern would look
something like an oblong donut, with the hole going through the center of the xz-plane.
This radiation pattern of the standard FSA can be compared to that of a loaded FSA later
in this thesis to determine if reactive loading affects the radiated gain.
Figure 3.2: Radiation pattern of basic FSA
16
4
Inductive Loading on the FSA
The primary goal of this investigation is to determine how inductive loading can
affect the frequency response of the folded slot antenna. To do this, two different models
were simulated using Sonnet™ software [18]. One of these models was then chosen to
be fabricated and tested, using two different fabrication methods.
4.1
Models and Simulation
Two different models were used for simulations. The first model was based off of
the previous research done with capacitive loading on folded slot antennas. The
inductors were placed across the slots on each side of the antenna, as shown below in
Figure 4.1. The grey region is the copper laminate, and the black blocks represent the
chip inductors.
Figure 4.1: Folded slot antenna with side-mounted inductors
17
The dimensions of the FSA used in this model are shown in Table 1: Dimensions
for FSA with mounted inductors, where most variables are defined in Figure 3.1, are as
follows. g is the length of the CPW feed from the bottom edge of the copper plane to the
bottom edge of d, and i is the distance from the side edge of the copper plane to the
outside edge of a.
Table 1: Dimensions for FSA with mounted inductors
a
b
c
d
e
f
g
h
i
0.64mm
1mm
24.8mm
1mm
1mm
11.5mm
12mm
0.635mm
11mm
The Sonnet™ software is a 2 ½- dimensional simulation tool. This means that
objects are defined in terms of multiple dielectric layers with patterned metal placed
between layers, as opposed a truly 3-dimensional object. This model consisted of a base
air layer (εr = 1) with thickness 15mm followed by 0.635mm of Rogers Duroid™ 6010
(εr = 10.8) with 15mm of air on top. The Duroid matches with the material used in actual
fabrication, described later in Section 4.2.1. The FSA pattern previously described was
placed as a copper metallization layer between the top two layers, centered on the x-axis
and with the bottom placed against the edge of the simulation region (also called the
box). The cell size for this simulation was 0.313mm in the x-direction by 0.25mm in the
y-direction. Inductors were added as ideal components from the center of e directly
across the gap to the center of the opposite edge. Port 1 was placed at the base of the
CPW (at s), and Port -1 was added twice to the bottom edge of the large copper plane,
once on either side of the CPW feed.
18
Figure 4.2 below shows the results of the simulation, where the frequency was
swept from 2GHz to 7.8GHz. Again, S11 represents the reflection coefficient, or the
relative gain of the reflected signal. In this plot, the darkest line signifies a folded slot
antenna with no added inductance, and the lighter lines correspond to different values of
inductors placed as shown in Figure 4.1. The FSA with no added inductive load
resonates at a frequency of 4.2GHz, the FSA with 0.4nH load inductors at 3.3GHz, and
the 4nH inductive load at 2.7GHz. This simulation clearly shows that increasing the
inductive loading will cause a decrease in the resonant frequency of the folded slot
antenna.
Figure 4.2: S11 vs. Frequency for simulated side-mounted inductors
19
The second inductor-only model mounts a single inductor on the top of the FSA,
as shown in Figure 4.3. Again, the grey depicts the copper region, and the black
represents the chip components. The FSA can be viewed as two parallel transmission
lines ending in an open circuit [5]. In the side-mount model, the components would be
placed in the middle of the transmission line. The top-mount model would place the
components at the end of the effective transmission line, which is closer to the Wilkinson
model discussed in Section 2. Also, the components here can be combined into a single
element.
Figure 4.3: Folded slot antenna with top-mounted inductor
The model used for this simulation was the same as that used for the side-mount
inductors. The only difference is the placement of the load inductors. The frequency was
swept from 2GHz to 8GHz.
Figure 4.4 below shows the simulation results for top-mounted inductors of
varying values. Here the solid line corresponds to no added inductive load, and the
20
dotted lines correspond to various inductance values. The unloaded FSA resonates at a
frequency of 4.2GHz, the 0.1nH load at 6.5GHz, and the 100nH load at 4.5GHz. It is
clear that for this configuration, added inductance increases the resonant frequency of the
antenna. As the inductance increases, the response of the antenna becomes closer to that
of the unloaded antenna. This result is not useful for the purposes of miniaturization.
Figure 4.4: S11 vs. Frequency for simulated top-mounted inductor
4.2
Fabrication
Looking at the results of the inductor-only simulations, only the side-mount model
was chosen to be fabricated and tested. The top-mounted inductors increased the
resonant frequency of the antenna, which correlates to a smaller operating wavelength.
21
This does not contribute to the miniaturization methods desired, so it was not chosen to
be fabricated.
4.2.1
Materials
The previous research with capacitive loading used Rogers RT Duroid™ 6006 as a
substrate. This material has a dielectric constant of 6.15, thickness of 0.635mm, and a
34μm thick (0.5oz) copper layer on one side [5]. It was desired to use the same substrate,
but due to availability constraints, Rogers RT Duroid™ 6010, with a dielectric constant
of 10.8 was chosen for use in fabrication. This substrate also came with a copper
laminate on both sides, but the back plane was etched away with a diluted potassium
iodide solution prior to further fabrication steps.
4.2.2
Milling Process
The design for the inductor-only folded slot antenna was first fabricated using a TTech Quick Circuit rapid-prototyping milling machine. A Duroid board is mounted onto
the base of the milling machine, and the mill runs selected patterns for a set of chosen bit
sizes. In this case, the bits used were a 10mil mill-end bit, a 31mil mill-end bit, and a
62mil router bit. The milling method was chosen mainly for the ease of use and rapid
turnaround time.
There are a few inherent problems with using the milling machine. First is that
the depth-of-cut for each bit size must be manually set and tested. This makes it difficult
to have any sort of depth consistency between drill bit sizes. The Duroid substrate is also
relatively flexible. When it is mounted on the milling machine, it then tends to bow
22
upward either on the edges or in the middle. This also creates depth consistency issues
across the antenna pattern.
Figure 4.5 through Figure 4.7 show contrasted images of this drill depth
inconsistency. Figure 4.5 was taken at the side of the FSA where the inductors are
mounted. The width of the horizontal copper trace is approximately 1mm. Figure 4.6
was taken at the top of the CPW, focusing on the first bend of the left slot. The width of
the vertical slot is approximately 0.4mm. In both of these images, circles created by
depth inconsistencies from the drill bit can be seen in the gaps. It can also be seen that
the round drill bits create rounded corners, rather than sharp 90 degree turns. Figure 4.7
is a zoomed in version of Figure 4.6, focused on the largest of the three drill marks. The
difference in depth between the deepest drill hole (top right) and the most shallow
(dielectric plane) was measured to be 0.27mm, almost as large as the intended width of
the slot.
23
Figure 4.5: Contrasted image of mill depth inconsistencies on side slot
Figure 4.6: Contrasted image of mill depth inconsistencies at top of CPW (left side)
24
Figure 4.7: Image of mill depth inconsistencies at top of CPW, higher zoom
A second problem is the inaccuracy of slot widths, specifically of the CPW feed
line. The desired dimensions were values of w = 0.3mm and s = 2.3mm. The average
values of these elements are shown in
Table 2, where w1 refers to the first (left) slot width, and w2 refers to the second (right)
slot width.
Table 2: Milled CPW dimensions for FSA with inductors
Desired dimension
Average measured
value
w1 (mm)
s (mm)
w2 (mm)
0.3
2.3
0.3
0.43
2.1
0.4
25
Another problem is the cutting process itself. On the microscopic scale, the edges
of the copper were very rough after being cut by the drill bits. The edges had to be
softened using a razor blade and steel wool before continuing to mount components.
4.2.3
Photolithography Process
Because of the problems associated with the milling process, it was also desired to
fabricate a set of antennas using the photolithography process. This process uses a
patterned sacrificial layer deposited on the surface of the Duroid to selectively block a
copper etchant. This etchant removes only the desired copper so that the antenna pattern
is created on the surface. A pictorial representation of a photolithography process is
shown in Figure 4.8 below. This image depicts the etching of SiO2 on Si, but the general
process can be applied to all thin films used in this thesis.
First, a layer of photoresist is deposited on the surface of the copper. Photoresist is a
polymeric film which is sensitive to light. The resist used in this investigation is a
negative dry-film resist. A positive resist is used for the SiC investigation in Section 7.
A dry-film resist is laminated onto the substrate before being exposed to light. If a resist
is negative, it means that, when exposed to UV light, the resist becomes stable,
preventing the exposed areas from being washed away in a developer solution. The
developer solution used in this instance is a diluted potassium carbonate solution. To
achieve the desired antenna design, a patterned mask is laid over the photoresist-covered
sample. After being exposed to UV light for one minute, the sample is then washed in a
developing solution, removing resist from the unexposed areas. The developing step is
visually monitored but lasts approximately 5 minutes.
26
Figure 4.8: Photolithography process [19]
The sample, now with patterned photoresist but still fully intact copper, is then
exposed to sodium persulfate, a copper etchant. This etchant removes the copper only
from those regions no longer covered in photoresist. The etching process is isotropic,
meaning that it removes copper in all directions at the same rate. This means that the
process does need to be controlled to prevent over-etching underneath the edges of the
photoresist. The time that a sample should be etched is greatly dependant on the size,
temperature, age, and amount of fluid agitation of the sodium persulfate solution. This
step could take anywhere from 15 minutes to a couple hours and should therefore be
visually monitored to determine when the etching process is complete.
27
The majority of the resist is then mechanically lifted from the substrate using
adhesive tape. The remainder is removed and cleaned off using acetone and isopropyl
alcohol. This leaves a Duroid substrate with a patterned copper layer on top.
The photolithography process is preferred over the milling process for three primary
reasons. First is that the dielectric substrate is not affected by the process. The etchant is
selective to the copper and does not actively attack the substrate. This means that the
depth of the slot should be consistent everywhere. Secondly, the chemical etching
process is much easier to control than the mechanical mill. This means that the CPW
dimensions are closer to the desired value. The CPW widths created during the
photolithography process are shown in Table 3 below. Thirdly, since photolithography is
a chemical process as opposed to a mechanical one, there will no longer be any hanging
copper pieces to be removed, leaving an overall cleaner edge. The accuracy is now
limited by the resolution of the mask rather than the motion of a drill bit. Figure 4.9
shows a comparison of FSAs created with each process, where the horizontal copper
trace is approximately 1mm wide. It can be seen that the photolithography process fixes
the problems with CPW slot widths and improperly formed corners.
Table 3: Chemically-etched CPW dimensions for FSA with inductors
Desired dimension
Average measured
value
w1 (mm)
s (mm)
w2 (mm)
0.3
2.3
0.3
0.33
2.175
0.3325
28
(a)
(b)
Figure 4.9: Images of FSAs created with (a) milling process and (b)
photolithography
4.2.4
Mounting of Components
On each antenna, an edge-mount SMA connector was soldered to the end of the
CPW feed. Then a pair of inductors was mounted across the side gaps using conductive
epoxy. The epoxy was then cured in an oven at 90°C for over 1 hour. All of the
inductors used were surface mount parts with a size of 0402 (1.0 mm x 0.5 mm). The
completed antenna is shown in Figure 4.10 below. The widths of the horizontal gaps and
copper trace are each 1mm, and the length of horizontal copper trace is 24mm.
29
Figure 4.10: Image of FSA with mounted inductors
4.3
Measurements
Once the antennas were fabricated and all of the components mounted, the frequency
response needed to be measured. To do this, each of the antennas was connected to an
Agilent™ E8364B network analyzer. The network analyzer sweeps through a set of
frequencies and records the S-parameters for all values. The S-parameter that we are
most concerned about is S11, the reflection coefficient.
Figure 4.11 below shows the measured results for the milled antennas with sidemounted inductors. You can see that the antenna with no inductor (solid line) resonates
at 4.6GHz, which is fairly close to the simulated 4.2GHz in Figure 4.2. However, the
milled antennas with mounted inductors have multiple resonant frequencies, most of
30
them above that of the basic FSA. This implies that it is not the milling process at fault,
but rather the mounting of the inductors themselves.
Figure 4.11: S11 vs. Frequency for milled FSAs with side-mount inductors
The measured data from the antennas created with photolithography is shown in
Figure 4.12 below. The S11 measurement for the FSA without any components (solid
line) has a resonant frequency of 4.0GHz, which is fairly close to the simulated resonant
frequency of 4.2GHz in Figure 4.2. However, when components are added, multiple
resonances occur, which was not predicted by the simulations. Again, this implies that it
is the mounting of the inductors which causes the majority of the problems.
31
Figure 4.12: S11 vs. Frequency for FSAs with side-mounted inductors created using
photolithography
The theory that the discrepancy between the simulation and measured data is
caused by the mounting of components is confirmed by Figure 4.13. This plot shows the
frequency response of the FSAs created using photolithography prior to being mounted
with chip inductors. The parenthetical notation on the graph key indicates what value
inductor would be mounted on the FSA. It can be seen in this plot that the fabricated
FSAs all operate at approximately 4.0GHz with very little deviation with respect to
resonant frequency. Again, this would indicate that the difference in measured result
from simulated result is caused by the mounting of chip inductors.
32
Figure 4.13: S11 vs. Frequency for FSAs created using photolithography to be
mounted with load inductors
4.4
Integrated Component Model
Since it is suspected that the surface mount components are creating problems with
the performance of the antennas, a model for an integrated component antenna has been
created. An integrated component means that the component, in this case an inductor, is
created out of the existing substrate and other thin film layers using the photolithography
process.
Figure 4.14 and Figure 4.15 below show diagrams of a spiral inductor and how it is
integrated into the FSA. The width of the coil trace in each image is 50μm. The
33
spiraling coil acts as the inductive element. When the trace reaches its end at the center
of the spiral, it is built upward so that a bridge can be deposited over the lower trace. It is
then connected to a separate trace which goes to the other conductive plane. There is a
layer of insulative material deposited between the bridge and the trace to prevent the two
from shorting.
Figure 4.14: Spiral inductor model
Figure 4.15: Spiral inductor and FSA
34
The inductance of a spiral inductor is dependent on the frequency at which it is
being operated. For this reason, a 2-port Sonnet model of just the spiral inductor, shown
in Figure 4.16, was used to measure the inductance value over a frequency range. The
traces of the spiral inductor are 50μm wide, and the spacing between the traces is 25μm.
The two solid lines in the image indicate the distances associated with each label. The
width and height of the spiral, labeled a in the image, is 0.4mm. The dark region in this
model represents the bridge connecting the center trace to the output. A square via in the
center of the spiral raises 0.85mm. A thin bridge then crosses above the other trace
before meeting with another square via which returns to the right-hand connecting trace.
The right-hand via is separated from the spiral trace by 25μm. A 0.85mm thick dielectric
brick of air with the same dimensions as the bridge is placed directly beneath it. The
large surrounding band is 1.2mm on each outer side with a thickness of 0.2mm. The
separation between this large strip and the inductor trace is 0.25mm.
The Sonnet model consisted of 750mm of air, followed by 0.5mm of alumina,
0.85mm of SiO2 (εr = 1), and topped with 750mm of air. The metallization layer was
modeled as gold between the alumina and SiO2 layers. These materials were chosen
because they are the materials commonly used in the Class 1000 clean room located at
NASA Glenn Research Center, where most of this research was performed, and are
commonly used in FSA designs. The box size was 1.2mm in x by 1.4mm in y, with cell
size of 0.01mm by 0.01mm. Ports 1 and 2 were placed on the left and right ends of the
inductive trace respectively. Port -1 was placed on the left edges of both the top and
bottom outer band, and Port -2 on both right edges.
35
a
a
Figure 4.16: Spiral inductor model
Figure 4.17 below shows a simulation of the inductance of this particular spiral
inductor, with frequency swept from 0.1GHz to 30GHz. The desired frequency range for
the FSA is from 2GHz to 8GHz. The inductance in this range is around 2.25nH, which is
similar to the values used for the surface mount inductors earlier in this section.
36
Figure 4.17: Inductance vs. Frequency for spiral inductor
This spiral inductor was integrated into the FSA model using HFSS, as shown in
Figure 4.14 and Figure 4.15. This software was chosen over Sonnet for this set of
simulations, because Sonnet does not have the capabilities to model such small
dimensions. In this model, the dimensions of the inductor metallization are the same as
described for Figure 4.16, but with a bridge height of 500nm and the outer band removed.
The trace connecting the spiral to the T-structure is 0.25mm.
The FSA design is mostly the same as that in Section 4.1, except with an a value
of 1mm and a c value of 24mm. The CPW also changed, now with a w value of 0.4mm
and an s value of 2mm. In order to excite the model in HFSS, a port has to be put
between two metallization sections. This was accomplished by putting a metal trace at
37
the bottom of the CPW, as shown in Figure 4.18. The light grey is the substrate, the dark
grey the metallization, and the black the excitation port. The bottom trace and the port
are each 0.5mm wide. The arrow indicates the direction of the excitation.
Figure 4.18: Excitation port for FSA in HFSS
The pattern was modeled as gold on a 500μm thick alumina (εr = 9.9) substrate
centered in a box of air with dimensions 80mm in the x-direction by 60mm in the ydirection by 40mm in the z direction.
The plot in Figure 4.19 shows the frequency response of the folded slot antenna
with and without the integrated spiral inductors. The frequency was swept from 2GHz to
8GHz to record the S-parameters. It can be seen that the resonant frequency of the
unloaded FSA is 4.2GHz, and that of the FSA with integrated inductors is 3.0GHz. Here
it is clearly shown that the integrated spiral inductor still decreases the resonant
38
frequency of the antenna. Because there are no ‘ideal’ components used in this model, it
can be reasonably stated that this model is a closer approximation to reality than the
models in Section 4.1. Unfortunately, due to time constraints and access to facilities,
these designs were not able to be fabricated for this thesis.
Figure 4.19: S11 vs. frequency for FSA with integrated spiral inductor
The radiation pattern of the FSA with integrated spiral inductors was also
modeled in HFSS. The results of the simulation are shown in Figure 4.20 below. When
compared to Figure 3.2, the radiation pattern of a basic FSA, the two simulations are
almost identical. This shows that the radiation pattern of the antenna is not affected by
the addition of integrated spiral inductors.
39
Figure 4.20: Radiation pattern of FSA with integrated spiral inductors
40
5
Capacitive Loading on the FSA
Based on some of the results from the inductively-loaded folded slot antenna, it was
desired to create new models of capacitively-loaded FSAs. The two designs to be
investigated are the FSA with top-mounted capacitors and the FSA with integrated
capacitive loading.
5.1
Top-Mounted Capacitors
It has been previously shown how the frequency response of a folded slot antenna is
affected by capacitors mounted across the side gap [5]. A Sonnet model was created to
simulate the effect of top-mounted capacitors on the resonant frequency of the FSA. The
simulated design is the same is that in Figure 4.3, except with an a value of 1mm, and an
ideal capacitor instead of an ideal inductor. The results of the simulation are shown in
Figure 5.1. The FSA with no extra capacitive loading resonates at 5.0GHz, the 0.1pF
load at 4.2GHz, and the 10pF load at 6.5GHz. This shows that the direction of change of
the resonant frequency of the antenna, whether it increases or decreases, is dependent on
the value of the capacitor. Capacitive loading on the top of the FSA could be used as a
miniaturization technique with the proper design constraints.
41
Figure 5.1: S11 vs. Frequency for simulated top-mounted capacitors
A model of the FSA with side-mount capacitors was simulated over a greater
range of capacitance values to see if similar results could be observed to previous work
[5]. The simulation results are shown in Figure 5.2 below. Looking at the plot, the solid
line is the folded slot antenna with no capacitive loading, which resonates at 5.0GHz.
The dotted lines represent capacitively loaded models with resonant frequencies ranging
from 5.2GHz to 4.3GHz. This data shows that the direction of frequency shift for the
side-mounted capacitor model is also dependent on the capacitance of the load.
42
Figure 5.2: S11 vs. Frequency for simulated side-mounted capacitors
5.2
Integrated Capacitor Model
The results of the fabricated folded slot antenna with inductive loading indicated that
an FSA model with integrated inductors would be beneficial. Because of these results, it
was desired to create a model for a folded slot antenna with integrated capacitive loading
as well. Figure 5.3 below shows the edge of the folded slot antenna with a metalinsulator-metal (MIM) capacitor and a bridge connecting the capacitor to the other metal
plane.
43
Figure 5.3: MIM capacitor on FSA
The simulations were run in HFSS, starting with the basic FSA described in
Section 4.4, but used an MIM capacitor instead of a spiral inductor. The MIM capacitors
in this model consist of a dielectric block on the metallization layer of the antenna.
Another metallization layer is then deposited on top of the dielectric and across to the
other metal plane. Typically there would also be a dielectric layer beneath the metal over
the gap, but this model uses an air gap instead.
The capacitance values were determined using the standard equation for the
capacitance of a parallel plate capacitor:
(12)
where A is the area of the plates and d is the separation between them. Silicon dioxide,
with a relative permittivity of 3.8, was used for these simulations. The area was kept
44
constant at .0782mm2 (0.25mm by 0.3128mm), and the thickness was varied to create
different capacitance values. The thicknesses used to create capacitance values of 0.1,
0.3, and 0.8pF were 26.3, 8.76, and 3.28μm respectively. These dielectric thicknesses are
not appropriate for actual fabrication but were chosen due to size constraints in the
simulation software. In actual fabrication, both the area and the thickness would be much
smaller.
Figure 5.4 below shows the results of the simulations. The FSA with no MIM
capacitor resonates at 4.2GHz, while the FSAs with MIM capacitors of 0.3pF, 0.44pF,
and 0.8pF resonate at 3.8GHz, 3.7GHz, and 3.6GHz respectively. This quite clearly
shows that increasing capacitive loading in the form of MIM capacitors will decrease the
resonant frequency of the antenna. Again, because this model uses no ideal components,
it can reasonably be stated that these results are closer to reality than those simulations
shown previously which use ideal components. These models were not able to be
fabricated due to time constraints and limited access to the necessary facilities.
45
Figure 5.4: S11 vs. Frequency for FSA with MIM capacitors
46
6
Inductive and Capacitive Loading in Combination
In previous sections it has been shown that, individually, inductive and capacitive
loading can decrease the resonant frequency of a folded slot antenna. It was therefore
desired to see how capacitance and inductance could be combined to create a similar or
greater drop in frequency.
6.1
Series vs. Parallel Combination
The first decision to make when combining inductors and capacitor is in what
manner they should be combined. Mainly, should they be combined in parallel or in
series with one another? The following set of simulations investigates these two
configurations for side-mounted components.
6.1.1
Parallel Combination
For modeling purposes, the simulation software does not allow for components to
be placed directly on top of one another, so they were placed side-by-side at the end of
the T-structure. This simulation set kept the inductance constant at 2nH and varied the
capacitance values. This value was chosen based on the peak resonance of an inductoronly model. In Figure 4.2 this can be seen at 1nH, but this FSA has an a value of 1mm to
accommodate for the larger chip capacitors. Thus the inductance value which created the
peak resonance was found to be 2nH.
The plots in Figure 6.1 show the S11 data for an FSA with capacitors and inductors
mounted in parallel. It can be seen for the S11 plots below that the variation of loading
created huge changes and showed no significant pattern. Also, much of the simulation
data shows values of S11 greater than 0dB, which implies a reflected gain greater than 1.
47
This is not a physically useful or plausible result, so this design was not chosen to be
fabricated.
Figure 6.1: S11 vs. Frequency for FSA with inductive and capacitive loads in
parallel
6.1.2
Series Combination
For the series combination the inductance was kept constant while the capacitance
was varied. Again, the inductance value was chosen based on the peak resonance value
in the inductor-only model. This FSA also has an a value of 1.9mm to accommodate for
two chip components in series. Also for this model, since Sonnet does not allow two
circuit components to be connected directly to one another, a small block of perfect
48
conducting metal was placed in the middle of the slot, as shown in Figure 6.2. The light
grey is represents copper, and the dark grey is the perfect conductor It is 2 cells large in
order to be symmetrical, with dimensions of 0.5mm by 0.313mm.
Figure 6.2: Metal block between two ideal components
Figure 6.3 shows the results of this set of simulations. The inductor-only FSA
resonates at 2.6GHz, and the addition of a capacitor in series causes the resonant
frequency to only drop to approximately 2.45GHz. This is not a very large drop, and it
can be seen in the graph that smaller capacitance values result in higher S11 values,
meaning that signal is lost. The most signal is transmitted when capacitance is extremely
high, or essentially a short circuit. The added capacitance does decrease the resonant
frequency of the antenna, but not significantly, and at the cost of decreased signal.
49
Figure 6.3: S11 vs. Frequency for FSA with capacitive and inductive loads in series,
varying C
The series combination experiment was repeated, this time keeping capacitance
constant. This capacitance value was chosen based on the peak resonance of a capacitoronly model. The plots in Figure 6.4 show similar results to those found in the varyinginductor experiment, though they are less clear. Focusing on the center peak, the
resonant frequency is lowest at 4GHz with an inductance of 200nH. This also happens to
be the largest peak, with the least signal loss. This shows that the best response occurs
when the impedance of the inductor is greater than the impedance of the capacitor
(Equations 13 and 14 below). For 4GHz, this occurs when L = 20nH. When the
50
inductance is very high, it essentially acts as an open circuit and would therefore not have
much reactive effect across a gap.
Figure 6.4: S11 vs. Frequency for FSA with inductive and capacitive loading,
varying L
(13)
1
(14)
51
6.2
LC Fabrication
Based on the previous simulations, it was decided to only fabricate the FSAs with
capacitors and inductors mounted in series. The inductor values would be kept constant
and the capacitor values varied, in an effort to replicate the plot shown in Figure 6.3. The
fabrication processes followed the same methods for the FSAs with inductors, discussed
in Section 4.2.
6.2.1
Milling Process
The antennas to be mounted with inductors and capacitors experienced the same
problems with the milling process described in Section 4.2.2. Table 4 shows the
measured dimensions, with slot widths approximately twice what was desired.
Table 4: Milled CPW dimensions for FSA with inductors and capacitors
Desired dimension
Average measured
value
6.2.2
w1 (mm)
s (mm)
w2 (mm)
0.3
2.3
0.3
0.58
1.92
0.59
Photolithography Process
The antennas were fabricated again, but this time using the photolithography
process, as described in Section 4.2.3. The CPW feed line widths were measured as
shown in Table 5. Again, these widths are much closer to the desired values than those
created using the milling process.
52
Table 5: Chemically-etched CPW dimensions for FSA with inductors and capacitors
Desired dimension
Average measured
value
6.2.3
w1 (mm)
s (mm)
w2 (mm)
0.3
2.3
0.3
0.33
2.18
0.32
Mounting of Components
First, SMA connectors were soldered to the end of the CPW feed. Surface mount
components were then mounted across each of the slots. First, the capacitor and inductor
were soldered together. For the inductor-only antenna, a 0Ω resistor was used instead of
a capacitor. Then, the paired components were mounted across each gap using
conductive epoxy. The epoxy was cured in an oven at 90°C for more than 1 hour. The
completed antenna is shown in Figure 6.5 below. The horizontal gaps and copper trace
are each 1mm wide, and the top of the T-structure is 24mm long.
53
Figure 6.5: Image of completed FSA with mounted capacitors and inductors
6.3
Measured Results
Figure 6.6 below shows the measured frequency response of the milled FSAs with
capacitive and inductive loading in series. All of the results are very different from the
simulation data and show no real pattern. Besides the resonant structure, each frequency
response is quite noisy. This can be attributed to the fabrication problems associated with
milling, discussed in Section 4.2.2.
54
Figure 6.6: S11 vs. Frequency for milled FSA with capacitive and inductive loads in
series
Figure 6.7 below shows the measured response for the FSAs created using
photolithography. As can be seen, the use of photolithography instead of the milling
process eliminated the majority of the noise seen in the previous figure. That being said,
the plots still do not match what was predicted in the simulations. There are multiple
resonant peaks for each antenna, both above and below the resonant frequency of the
basic FSA shown at 3.8GHz.
55
Figure 6.7: S11 vs. Frequency for FSAs with inductors and capacitors created using
photolithography
These differences are believed to be due to the inaccuracies associated with using
real, surface-mounted chip elements as opposed to the ideal 2D components used in
simulation. This is verified by the measurements taken before the addition of reactive
loading, as shown in Figure 6.8. The parenthetical notation indicates what components
would be mounted on the FSA in the next step. Here it can be seen that all four antennas
resonated at approximately 4.8GHz before the addition of reactive components. As is
shown in previous sections, it would be possible to create an FSA with integrated thinfilm-based elements in an attempt to correct these problems.
56
Figure 6.8: S11 vs. Frequency for FSAs created using photolithography to be
mounted with inductors and capacitors in series
57
7
Sputtered Silicon Carbide as a Packaging Material
In the fabrication of antennas and other RF circuits, it is desirable to use thin films
as a packaging material as another means of miniaturization. This portion of the
investigation looks to determine if amorphous SiC deposited by magnetron sputtering is
an appropriate packaging material for RF devices. Properties to be investigated include
chemical resistance, conformality, adhesion strength, dielectric constant, and interaction
with circuit performance. The majority of fabrication and tests were performed in a Class
1000 clean room located at NASA Glenn Research Center in Cleveland, OH. The results
of this investigation are also being published at the 2011 IEEE Radio and Wireless
Symposium [20].
7.1
Wafer Fabrication
Each sample used in this investigation starts with a polished 2in. square 500μm
thick wafer of alumina, also known as aluminum oxide (Al2O3), for the substrate
material. Gold and SiC are deposited as described in the following sections. Any
patterning that occurs follows the photolithography process described in Section 4.2.3.
The only difference is that, for this portion of the investigation, positive spin-on resist
was used instead of a negative dry-film resist.
To deposit the positive photoresist, a liquid adhesion promoter must first be spun
on and then baked for at least 5 minutes at 185°C. The liquid resist is then spun onto the
surface and baked for 9 minutes at 90°C. The sample is then exposed to UV radiation
through a patterned mask for 75 seconds. For the positive resist, the exposed regions
become chemically unstable, allowing them to be washed away in a developer solution.
The sample is developed for 1 minute in Microposit™ 351 and baked again at 120°C for
58
half an hour. The remaining resist is removed after the etching steps using acetone and
ethanol.
7.1.1
Evaporation of Metals
All of the metal deposited for this investigation used a conventional evaporation
process. A source metal (in this case chromium or gold) is heated in a vacuum chamber.
The evaporator used in this investigation uses an electron beam to heat the metal. The
heat and vacuum allow the metal to evaporate. The metal particles then travel through
the chamber and deposit on a target substrate mounted inside the vacuum chamber.
Each wafer in this investigation was first deposited with a 25nm layer of
chromium. The chrome acts as an adhesion layer between the gold and the alumina
substrate, because adhesion between gold and alumina is poor. After the chrome is
deposited, a 500nm layer of gold is deposited, covering the entire wafer.
7.1.2
Sputtering of Silicon Carbide
The SiC in this investigation was deposited using an RF magnetron sputtering
method. In the sputtering method, a target of SiC and the sample wafers are placed in a
vacuum chamber. An RF source is used with argon gas to create a plasma. The
energized Ar atoms bombard the SiC target, liberating particles from the surface. The
liberated particles travel through the vacuum chamber and deposit on the surface of the
wafer. The target for this chamber is positioned off-center from the wafer, so the
mounted wafer is rotated during deposition in an effort to get a completely conformal
coating. All SiC layers in this thesis are 500nm thick. After deposition, the samples are
then annealed for one hour at 300°C.
59
7.1.3
Etching
Each sample has a patterned layer – either gold or SiC. Once patterned with
photoresist, each sample is exposed to an etchant. The etchant used to remove the gold
layer is a potassium iodide (KI) solution. The chrome adhesion layer also needs to be
removed with a solution of perchloric acid (HClO4). Since these are both liquid chemical
etches, they etch isotropically. The etching time for the gold and chrome are
approximately 6 minutes and 1minute respectively but should be visually monitored to
prevent over-etching. The SiC is etched away in a plasma consisting of an Ar/SF6
mixture. This etch process is mostly anisotropic and takes approximately 6 minutes, but
should also be visually monitored.
7.1.4
Patterning
The nine wafers used in this portion of the investigation are fabricated with two
different patterns. Wafers 1-5 are coated in Cr/Au, which are then patterned with the first
layer of a MIM capacitor design shown in Figure 7.1. The structures have side lengths of
1.5mm, as labeled in the image. The actual design of this pattern is not important in this
portion of the investigation. The patterned structures simply act as gold lines, to show
how the SiC will behave when covering metal structures. The alumina wafer with
patterned Cr/Au is then covered in 500nm of SiC.
60
Figure 7.1: First layer of MIM capacitor design (Cr/Au on alumina)
Wafers 6-9 are coated with a solid layer of Cr/Au, which is not patterned. 500nm
of SiC is then deposited over the entire wafer. The SiC is then etched into a simple
checkerboard pattern with 2.5mm squares.
7.2
Chemical Resistance Tests
The largest portion of research into the packaging qualities of sputtered SiC
investigates the resistance of the thin film to various chemical etches. Each wafer is cut
into four 1in. square samples (labeled a-d) before being subjected to the chemical etch.
Four different etchants are used for this investigation. Table 6 shows which samples
were subject to which chemicals. When only a number is denoted, all four samples of
that wafer were subject to the test.
The O2 plasma etch was performed for 1hr at 300W. Buffered oxide etchant
(BOE) is a wet chemical used to etch SiO2 or Si3N4. Potassium iodide, as discussed
61
earlier, is used to remove gold films. Tetramethylammonium hydroxide ((CH3)4NOH),
also called TMAH, is a chemical used to etch silicon.
Table 6: Etch test matrix
Etch Test Performed
Samples Subjected to Test
Control
1, 5a, 6
1hr O2 plasma at 300W
2, 5b, 7
24hr BOE
3, 5c, 8
24hr Au etch (KI)
4, 5d
24hr TMAH
9
On each sample, several tests were taken before and after exposure to the etchant.
First, each sample is weighed to test for loss of material. The sample was weighed five
times using a precision microbalance and then averaged to ensure accurate values.
Microphotographs were also taken of every sample before and after being exposed to the
chemical. The purpose of the photographs is to identify any physical defects, such as
pin-holes. For Wafers 6-9, the thickness of the SiC film was measured using a Dektak™
stylus profilometer.
Along with the previous tests, the samples from Wafer 5 were coated with a thin
(50nm) layer of gold before being imaged by a scanning electron microscope (SEM) to
check for conformality. All of the other samples were tested for adhesion strength with a
‘pull test’ [15]. The apparatus used for this test is shown in Figure 7.2, with two
modifications. Rather than adhesive tape, a metal hook is epoxied to the surface of the
62
sample and attached to one side of a balance. The sample is then fixed in place while
metal weights, rather than water, are added to the other side of the balance. This test
shows adhesion strength of the SiC to the gold and alumina in terms of how much force it
can hold without detaching from the substrate.
Figure 7.2: Apparatus similar to that used in the pull test [15]
7.2.1
Results
Microphotographs of samples from Wafers 1-4 are shown in Figure 7.3 below.
The center trace is approximately 42μm wide in each image. It can be seen from the
images that the O2 plasma and BOE etches do not create any visually apparent damage to
the SiC film. The dark spots on the images are a result of defects in the substrate which
carried through to each deposited layer. These defects were present in the pre-etch
images as well.
However, damage can clearly be seen in (d) for the sample that underwent the
24hr gold etch. In many places, the gold underneath the SiC was completely removed.
63
In these places, since the SiC no longer had anything to adhere to, the film often lifted
off. This effect can be seen where the chrome layer is exposed. Discoloration can also
be seen around the edges of the center trace. This indicates that the gold was partially
etched, starting from the edges, but enough gold remained in place to hold the SiC film.
This edge effect indicates that the SiC film does not have good step coverage, allowing
the etchant to attack the gold underneath.
(a) Control
(b) O2 Plasma 1hr
(c) BOE 24hr
(d) Au etch 24hr
Figure 7.3: Microphotographs of samples with gold lines after etch tests
Figure 7.4 below shows microphotographs of samples taken from Wafers 6-9
after the etch tests were performed. Each image is approximately 200μm on a side. The
64
mask used for this pattern had irregular edges, and any malformations present in the
pictures were also present in those taken before the etch tests. In the same respect, all of
the black speckling in these images was also present in the pre-etch images. Again, these
defects can be contributed to defects in the underlying substrate. The substrate for Wafer
9 in particular had a very poor surface.
(a) Control
(b) O2 Plasma 1hr
(c) BOE 24hr
(d) TMAH 24hr
Figure 7.4: Microphotographs of samples with checkerboard pattern after etch tests
Figure 7.5 shows SEM images taken of each of the samples from Wafer 5. The
location imaged for each sample is a corner of one of the gold structures. For images (a),
(c), and (d), a small shadowing can be seen at the base of the structure. It appears that the
65
SiC did not completely cover the gold edge, meaning that the film is not conformal.
Image (b) shows that trenches were formed around the edges due to the O2 plasma etch.
This could be for one of two reasons. Either the O2 plasma actually etched away at the
SiC and gold, or, more likely, the trenches are the result of an oxide formation on the
surfaces.
(a) Control
(b) O2 Plasma 1hr
(c) BOE 24hr
(d) Au etch 24hr
Figure 7.5: SEM images of samples after etch tests
Table 7 shows the average change in weight and film thickness per sample for
each etch test performed. Note that the thicknesses were not measured for any sample
undergoing the 24hr Au etch. None of the weights changed significantly, except for
66
those exposed to BOE for 24 hours. This is believed to be due to some kind of
measurement error. The samples from Wafer 8 (checkerboard) and 5c (capacitor pattern)
showed little change, but those from Wafer 3 (capacitor pattern) increased significantly.
In any case, only a significant decrease in weight, indicating loss of film, would be
considered problematic for a packaging material.
The changes in thickness can also be seen in this table. There were no significant
changes in film thickness for any of the etch tests. Each increased slightly which is
believed to be caused by the growth of a native oxide. Those samples exposed to the O2
plasma experienced a greater oxide growth due to the high energy oxygen-rich
environment.
Table 7: Average changes per sample by etch test
Etch Test Performed
Weight Change (mg)
Thickness Change (nm)
Reference
0.02
7.2
O2 Plasma 1hr
-0.59
24.6
BOE 24hr
2.11
7.775
Au etch 24hr
-0.88
N/A
TMAH 24hr
0.00
5.55
The results of the pull test, as described in Section 7.2 showed that all of the
samples have an adhesion strength of greater than 108 N/m2. This means that the
adhesion strength of the SiC to the gold is as good as or better than that of the Au/Cr to
the alumina substrate. The film did peel off of two samples subjected to the Au etch test
67
at slightly less than 108 N/m2. This is because of the loss of adhesion due to the removal
of the underlying gold layer, and indicates further that the SiC film was not completely
conformal.
7.3
Dielectric Constant
To learn the relative permittivity (εr) of the sputtered SiC film, MIM capacitors
were fabricated with SiC as the dielectric layer. The pattern used is that shown in Figure
7.1. The bases for the four capacitors measured are squares with side lengths of 170μm,
380μm, 660μm, and 770μm. The bottom metal and middle dielectric layer were
fabricated as described in Section 7.1. The top metal layer was patterned using the liftoff technique. In this process, photoresist is deposited and patterned before the
metallization layer is deposited. The wafer is then soaked in acetone for a couple hours,
which slowly removes the photoresist layer. The metal layer on top of the photoresist
lifts off as well, leaving metal only where there was no photoresist.
Once the MIM capacitors were fabricated, the capacitance value was measured
using a Keithley™ 590 CV analyzer and 150μm pitch GGB GSG probes before and after
a 1hr anneal at 300°C. With measured capacitance value, and known dimensions of the
MIM capacitor, a value for the dielectric constant can be calculated using Equation 12.
The average dielectric constant before annealing was 13, and the average dielectric
constant after annealing was 5.8. This shows that the annealing step is important to the
electrical characteristics of the film, and that the film has a relatively low relative
permittivity. The low dielectric constant means that it should have less of an effect on
the performance of the circuit.
68
7.4
LC Resonator
To show that sputtered SiC can be used as packaging for RF circuits and will not
interfere with device performance, an LC resonator was fabricated and measured with
and without the SiC coating. Figure 7.6 below shows an image of the LC resonator. The
2-port system was fabricated with Cr/Au on alumina, with SiC as the dielectric layer in
the MIM capacitors. In the masked off regions, both the gaps and trace are 50μm wide.
In the wider CPW, the w is 75μm and s is 0.17mm. The length of the CPW, from the
edge to the inductor traces, is 1.2mm. The spirals are 1.5 turns with an inner radius,
measured from the inside of the end of the coil, of 0.41mm. The trace width and spacing
are each approximately 0.1mm. This results in an inductance of approximately 8.5nH.
Rather than connect directly to the metal plane, the bridge from the inductor with
SiC beneath it creates an MIM capacitor. The end cap of the MIM is approximately
0.1mm by 0.17mm. SiC is deposited as the dielectric layer to a thickness of 500nm and
annealed for 1 hour at 300°C. This results in an approximate capacitance of 1.8pF.
Figure 7.6: LC Resonator with SiC packaging
69
The S-parameters were measured with and without the SiC film using an
Agilent™ E8364B network analyzer. The measured results are shown in Figure 7.7. S21
refers to the forward transmission coefficient, or the relative amount of signal that is
transmitted from Port 1 to Port 2 The S11 peaks for the LC resonator are very close to
1.2GHz, both with and without the SiC packaging, and the S21 plots are almost
indistinguishable from one another. The additional layer of SiC had almost no effect on
the resonant frequency of the LC resonator. Thus it can be said that sputtered SiC as a
packaging material does not affect the operation of an RF circuit.
Figure 7.7: S-parameters for LC resonator with and without SiC film
70
8
Conclusions and Recommendations
In this investigation, three major subjects were pursued – inductive loading on a
Wilkinson power divider, inductive and capacitive loading on a folded slot antenna, and
the packaging properties of a sputter-deposited SiC film. These techniques are in an
effort to develop miniaturization techniques for these RF devices.
It was shown that a Wilkinson power divider can be decreased in length with the
addition of inductors from the ports to ground. In this solution, the desired transmission
line length and operating frequency can be defined. The combination of impedancematching formulas then dictates the value of the added inductors, as well as the
impedance of the transmission line.
The next portion of the investigation focused on the addition of inductive and
capacitive loading as a means to decrease the resonant frequency of a folded slot antenna.
First, Sonnet electromagnetic simulation software was used to show that the addition of
inductors across the end of the T-structure on the FSA does decrease the resonant
frequency of the antenna. Simulation data also showed that the addition of inductive
loading to the top of the FSA increased the resonant frequency of the antenna.
As the goal of the investigation is to decrease frequency response, only the sidemounted loading design was chosen to be fabricated. The antennas were fabricated using
both a mechanical process (milling machine) and a chemical process (photolithography).
Surface-mount components were then placed across the appropriate gaps on the FSA with
conductive epoxy. The S11 values of the antennas were then measured using a network
analyzer. Unfortunately, the measured results did not match with the simulation data.
71
While the photolithography process did eliminate some of the accuracy problems
associated with the milling process, it is believed that the use of non-ideal chip elements
created problems that could not be predicted with simulations.
For this reason, HFSS software was used to create a model with integrated spiral
inductors. These simulations showed similar results to those found in the Sonnet
simulations, but they are believed to be more accurate, since there are no ideal elements
used in the model. Due to time constraints and access to facilities, this model was not
fabricated. It is recommended that further investigation be done into the
manufacturability and operation of this design.
Based on the FSA model with integrated spiral inductors, designs were also
created for an FSA with integrated MIM capacitors. These simulations also show similar
results to the previous research done with mounted chip elements [5]. These designs
were not fabricated for the same reasons as the integrated spiral inductor model. It is
recommended that the manufacturability and operation of these designs be further
investigated as well.
Since it has been shown that capacitors and inductors can each decrease the
resonant frequency of antenna when loaded individually, it was desired to investigate
how they could be used in combination to further decrease the frequency response.
Simulations showed that the series combination was much more consistent and showed
more predictable operation than the parallel combination. The results of the seriescombination simulations showed that the least signal was reflected when there was
essentially a short instead of a capacitor, implying that there is no benefit to adding a
72
capacitor to the inductor. The antennas in this experiment were fabricated using both
physical and chemical methods in an attempt to replicate the simulation data.
Unfortunately, due to previously described problems, the measured results did not verify
the simulation data. It is recommended that further research be done to develop
fabrication methods that would properly replicate the simulation results. A viable
method would be to use integrated spiral inductors and MIM capacitors, once the
fabrication techniques of each have been verified.
Lastly, this investigation examined the packaging qualities of a sputtered SiC
film. Tests were performed to determine the conformality, adhesion, chemical resistance,
dielectric constant, and overall effect on device performance.
Nine alumina wafers were fabricated with two different patterns of Cr/Au and SiC
and then cut into four samples per wafer. Each sample was either exposed to a chemical
etchant or kept as a control. Images, weights, and thicknesses were taken before and after
the test to determine if the etchant had had any effect on the sample. Of the 36 total
samples, 32 were then tested for adhesion strength using a pull test. SEM images were
taken of the four remaining samples to examine how the film covered patterned edges.
Upon examination of the images and comparisons of weights and thicknesses, it
was determined that the SiC film was resistant to each of the chemicals test. No
significant changes were found in height or weight, except for those due to oxide growth
or measurement error. No pin-holing was found upon examination of the images. It was
also shown that the adhesion strength was greater than 108 N/m2 for each sample,
73
meaning that the adhesion strength of the SiC to the gold is as good as or better than that
of the gold to the alumina substrate.
However, it was found through these tests that the SiC film was not conformal on
all of the edges. Significant amounts of gold were etched away from the patterned edges
during the 24hr Au etch. The SiC on two of the Au-etched samples delaminated during
the pull test, but this was determined to be due to a lack of gold and not poor adhesion
strength. The SEM images confirmed the lack of full step coverage for the patterned
gold.
Further investigation into the cause of the lack of conformality is recommended.
The sputtering process itself is not believed to cause the lack of conformality. The
sputtering target is off-center in the chamber, and the sample is rotated throughout
deposition. These steps are taken to eliminate any anisotropy or shadowing during the
deposition process. One possible cause is the thickness of the patterned gold underneath
the SiC film. The gold may have simply been too thick for the SiC to completely cover
the micromachined steps. Another possible cause is the SiC target used to deposit the
film. It was later discovered that the SiC target was cracked. It is unknown if this
occurred before or after deposition on the samples used in this test, but the damaged
target could change the properties of the SiC. If the target were damaged, it would not
have improved the packaging properties of the film, so the results of this portion of the
investigation are not invalidated.
To determine the dielectric constant of the sputtered SiC film, MIM capacitors
were created with gold on alumina, using SiC as the dielectric layer. Based on geometry
74
and the capacitance equation for a parallel plate capacitor, the dielectric constant could be
calculated. It was found that the average dielectric constant measured after a 1 hour
anneal at 300°C was 5.8. This dielectric constant is fairly low, meaning that it should
have less of an effect on the fields passing through it.
It was also shown that the dielectric constant of the SiC before the anneal step
was approximately 13. This indicates that the annealing step does have an effect on the
dielectric properties of the film. It is therefore recommended that investigation be done
into the effect of anneal temperature as well as anneal time on the SiC film.
An LC resonator was fabricated with and without the SiC packaging. Sparameters were measured for each, and it was shown that the added SiC film does not
significantly impact the operation of the RF circuit. This result, along with those
previously discussed, shows that sputtered SiC carbide has almost all of the qualities
needed to package RF devices. The only property lacking is conformality, but when that
issue is resolved, all of the requirements discussed would be satisfied.
75
APPENDICES
76
APPENDIX A: Mathematica Script for Wilkinson Calculations
In[1]:= Zx=Z0*tan*Sqrt[2/(1+tan^2)]
Out[1]= Sqrt[2] tan Sqrt[1/(1+tan^2)] Z0
In[2]:= tan=Tan[2Pi*l](*with l in terms of lambda*)
Out[2]= Tan[2 l \[Pi]]
In[3]:= Zx
L=Zx/(w*tan)
Out[3]= Sqrt[2] Z0 Tan[2 l \[Pi]] Sqrt[1/(1+Tan[2 l \[Pi]]^2)]
Out[4]= (Sqrt[2] Z0 Sqrt[1/(1+Tan[2 l \[Pi]]^2)])/w
In[5]:= Z0=50
w=2Pi*5*10^9 (*f = 5GHz*)
Out[5]= 50
Out[6]= 10000000000 \[Pi]
77
In[7]:= Plot[Zx,{l,0,.25},Frame->True,FrameLabel->{"Line Length (\[Lambda])","Line
Impedance (\[CapitalOmega])"}]
70
Line Impedance HW L
60
50
40
30
20
10
0
0.00
0.05
Out[7]=
0.10
0.15
Line Length HlL
0.20
0.25
In[8]:= Plot[L*10^9,{l,0,.25},Frame->True,FrameLabel->{"Line Length
(\[Lambda])","Inductance (nH)"}]
78
Out[8]:=
Inductance H nHL
2.0
1.5
1.0
0.5
0.0
0.00
0.05
0.10
0.15
Line Length HlL
0.20
0.25
79
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