ar y
n
i
im
prel
iC-ME
DUAL LIGHT-GRID PULSE RECEIVER
Rev A1, Page 1/11
FEATURES
APPLICATIONS
♦ Dual photo diode inputs with photoelectric amplifier
♦ Built-in bandpass filter with 300 kHz center frequency
♦ Differential current-signal output with open drain low-side
drivers
♦ Nonlinear transfer function results in wide dynamic range of
100 nA to 1.5 mA for pulsed photocurrents
♦ Fast flash recovery time of max. 30 µs
♦ Recovery time below 10 µs for excessive photocurrents of up
to 1.8 mA
♦ Shift register and control logic
♦ Compatible to CMOS levels
♦ Single 5 V supply
♦ Low standby current; circuit activation by input data
♦ Power-down reset
♦ ESD protection
♦ FMEA driven circuit and layout topology
♦ Suited for high-risk applications according to IEC 61496-1
♦ Light curtains
♦ Light barriers
♦ Electro-sensitive protective
equipment (ESPE)
PACKAGES
DFN10 4 mm x 4 mm
♦ Option: extended temperature range of -25 to 85 °C
BLOCK DIAGRAM
+5 V
2
VDD
10
BP-AMPLIFIER
iC-ME
PD0
OUTPUT
SN
8
SP
5
NC
7
DOUT
4
IAC
PD
IDC
EN1
6
EN0
PD1
ENA
SAFEN
NEN
SAFETY
SWITCHES
&
SAFEN
NEN
INH
ISUM
LOGIC
LOGIC
INPUTS
1
ISUM
CONTROL
1
1
1
1
DIN
LOGIC OUTPUT
6 μA
D Q
3
C
R
CLK
Q1
D Q
C
R
Q2
D Q
C
R
Q3
D Q
C
R
Q4
D Q
C
R
Q5
D Q
Q6
C
R
6 μA
NPDR
POWER DOWN
RESET
GND
9
Copyright © 2014 iC-Haus
http://www.ichaus.com
ar y
n
i
im
prel
iC-ME
DUAL LIGHT-GRID PULSE RECEIVER
Rev A1, Page 2/11
DESCRIPTION
The iC-ME device is a dual light chain receiver IC.
Typical applications cover light curtains, light barriers
and electro-sensitive protective equipment in general.
Integrated on a single chip the iC-ME contains a
bandpass amplifier with a center frequency of typically 300 kHz, a differential current output plus control logic to activate the amplifier and the output. Deactivated, the current consumption is very low and
the current outputs SN and SP are switched to high
impedance (zero current).
The control logic of the two cascaded channels consists of a three-stage shift register each, in which the
first respective two flip-flops are triggered by the leading edge and the third flip-flop by the trailing edge of
the clock input CLK. This produces an artificial delay in order to avoid race conditions when shifting the
input from channel 0 to channel 1 and via the serial
output to the next device in the chain.
The bandpass amplifier is activated when DIN reads
a logical ‘1’. The current output still remains disabled
(zero current) until the output of the first resp. forth
flip-flop of the Control Logic changes to ‘1’. This acti-
vates the bias for the complete signal path from light
detection to the differential current output. The differential outputs SP and SN are powered up to an equal
current, as far as the attached photodiode does not
receive any changes in light.
The leading edge of a received light pulse (which produces an increase of photocurrent), causes the output current at SP to increase and at SN to decrease
by an equal value. The sum of I(SP) + I(SN) is kept
constant. For light curtain applications in which only
one device is activated at a time, the outputs SN and
SP can be attached to a two-wire bus.
The amplifier and output automatically return to
standby after processing the serial input data at DIN,
whith the Control Logic receiving the fourth leading
CLK edge. Therefore, a chain circuitry with multiple
beams can be set up with just a single data bit within
a shift cycle.
The IC contains protective diodes to prevent destruction by ESD. Control logic input pins feature Schmitttrigger characteristics for high noise immunity. All
pins are short-circuit proof.
PACKAGING INFORMATION DFN10 to JEDEC Standard
PIN CONFIGURATION DFN10
PIN FUNCTIONS
No. Name Function
1
10
2
9
3
4
5
iC−ME
...
yyww
Orientation of the package label (
8
7
6
1
2
3
4
5
6
7
8
9
10
DIN
VDD
CLK
DOUT
SP
PD1
n.c.
SN
GND
PD0
iC-ME ... yyww) may vary!
Data Input
+5 V Supply Voltage
Clock Input
Data Output
Pos. Differential Current Output
Photo Diode #1, Input Cathode
Neg. Differential Current Output
Ground
Photo Diode #0, Input Cathode
iC-ME
DUAL LIGHT-GRID PULSE RECEIVER
ar y
n
i
im
prel
Rev A1, Page 3/11
ABSOLUTE MAXIMUM RATINGS
Beyond these values damage may occur; device operation is not guaranteed.
Item
No.
Symbol
Parameter
Conditions
Unit
Min.
Max.
G001 VDD
Voltage at VDD
-0.5
7
V
G002 V()
Voltage at DIN, CLK, DOUT, SN, SP,
PD
-0.5
VDD +
0.5
V
G003 Vd()
ESD Susceptibility at DIN, CLK, DOUT, HBM, 100 pF discharged through 1.5 kΩ
PD, SN, SP
4
kV
G004 Tj
Junction Temperature
-40
150
°C
G005 Ts
Storage Temperature
-40
150
°C
THERMAL DATA
Operating Conditions: VDD = 5 V ±10 %
Item
No.
T01
Symbol
Parameter
Conditions
Unit
Min.
Ta
Operating Ambient Temperature Range
(extended temperature range of -25 to
85 °C on request)
All voltages are referenced to ground unless otherwise stated.
All currents flowing into the device pins are positive; all currents flowing out of the device pins are negative.
0
Typ.
Max.
70
°C
iC-ME
DUAL LIGHT-GRID PULSE RECEIVER
ar y
n
i
im
prel
Rev A1, Page 4/11
ELECTRICAL CHARACTERISTICS
Operating Conditions: VDD = 5 V ±10 %, V(SN, SP) = 3.5 V...VDD, Tj = -25...85 °C, unless otherwise noted
Item
No.
Symbol
Parameter
Conditions
Unit
Min.
Typ.
Max.
Total Device
001
VDD
Permissible Supply Voltage
Range
4.5
5.5
V
002
VDD
Required Supply Voltage for logic decreasing voltage VDD
function
1.7
003
I(VDD)
Supply Current in VDD (Standby) DIN = lo, CLK = hi or lo: BP-amplifier and output stage disabled, logic levels: lo = 0...0.45 V,
hi = VDD − 0.45 V...VDD
60
µA
004
I(VDD)
Supply Current in VDD
EN = hi: BP-amplifier activated, INH = hi: output stage disabled, I(PD) = -15...0 µA
Tj = 27 °C
0.5
mA
005
I(VDD)
Supply Current in VDD
EN = hi, INH = lo: BP-amplifier and output
stage activated
Tj = 27 °C
V
0.3
mA
3.0
1.1
mA
mA
006
VDDon
Turn-on Threshold VDD (Poweron release)
4.2
V
007
VDDoff
Undervoltage Threshold at VDD
(Power-down reset)
decreasing voltage VDD
2.6
008
VDDhys
Hysteresis
VDDhys = VDDon − VDDoff
200
500
mV
009
Vc()hi
Clamp Voltage hi at DIN, CLK,
DOUT, PD, SN, SP
Vc()hi = V() − VDD, I() = 10 mA
0.4
1.25
V
010
Vc()lo
Clamp Voltage lo at DIN, CLK,
DOUT, PD, SN, SP
I() = -10 mA, VDD = 0 V, other pins open
-1.25
-0.4
V
100
pF
V
Bandpass Amplifier and Output Stage PD0, PD1, SN, SP
101
C(PD)
Permissible capacitance at PD
102
V(PD)
Voltage at PD
103
Idc(PD)
Permissible DC-photocurrent in
PD (ambient light supression)
-15
0
µA
104
I(PD)mg
Monotone Gain Range of I(PD)pk |Ipn()| increases or remains constant when
|I(PD)pk| increases (see Fig. 3)
-1.5
0
mA
105
twhi
Permissible Photocurrent Pulse
Duration
see Fig. 3 and 4
1.0
µs
106
twlo
Permissible Photocurrent Pause
Duration
2nd Gpk ≥ 90 % 1st Gpk (resp. of single pulse,
see Fig. 4)
2.0
µs
107
trec
Flash Recovery Time
I(PD)pk = -1.8 mA
10
µs
108
trec
Power-Flash Recovery Time
I(PD)pk = -5 mA, magnitude of photocurrent
integral equal 15 mAs
30
µs
109
Gpk
Pulse Current Gain
Gpk = [Ipn() − IO * ISUM] / I(PD)pk,
I(PD)dc = -15...0 µA, I(PD)pk = -1...-0.1 µA,
tr = tf = 0.5 µs, twpk = 1 µs (see Fig. 3)
360
490
620
110
fl
Lower Cut-off Frequency (-3dB)
I(PD)dc = -15...-2.5 µA,
I(PD)ac = 5 µApp sinusoidal waveform
65
100
155
kHz
111
fh
Upper Cut-off Frequency (-3dB)
I(PD)dc = -15...-2.5 µA,
I(PD)ac = 5 µApp sinussoidal waveform
380
530
750
kHz
112
f∆
Bandwidth (-3dB)
f∆ = fh − fl
270
430
670
kHz
113
114
V(SN, SP) Permissible Voltage at SN, SP
ISUM
Output currents I(SN) + I(SP)
115
IO
116
0.9
V
3.5
VDD
V
V(SN, SP) = 4...5 V
Tj = 27 °C
4.9
9.7
mA
mA
Relative Current Offset
IO = [I(SN) − I(SP)] / ISUM, I(PD) = 0
-10
Ilk
Leakage Current I(SN) + I(SP)
output disabled
117
Idlk()
Differential Leakage Current
Idlk() = I(SN) − I(SP), I(PD)pk = -600 µA,
twhi = 3 µs, output stage disabled (see Fig. 3)
118
Ipn()
Differential Output Current
Ipn() = I(SN) − I(SP), I(PD)pk = -10 µA (see
Fig. 3)
-7
119
Ipn()
Differential Output Current
Ipn() = I(SN) − I(SP), I(PD)pk = -100 µA (see
Fig. 3)
-9.7
7.5
10
%
4.0
µA
0.1
µA
-5
-3.0
mA
-7.3
-4.0
mA
-0.1
iC-ME
DUAL LIGHT-GRID PULSE RECEIVER
ar y
n
i
im
prel
Rev A1, Page 5/11
ELECTRICAL CHARACTERISTICS
Operating Conditions: VDD = 5 V ±10 %, V(SN, SP) = 3.5 V...VDD, Tj = -25...85 °C, unless otherwise noted
Item
No.
Symbol
Parameter
Conditions
Unit
Min.
Typ.
Max.
120
INoise
Differential Output Current Noise I(PD)dc = -15 µA, RGen = 500 kΩ,
(RMS)
no additional filter, Tj = 27 °C
5
µA
121
INoise
Differential Output Current Noise I(PD)dc = -15 µA, RGen = 500 kΩ,
(RMS)
with BP-filter 50 kHz...1.2 MHz, Tj = 27 °C
3.5
µA
122
tp()IDCon
Output Stage Turn-on Delay:
I(PD)dc = -15 µA...0, I(PD)ac = 0 (see Fig. 4)
CLK lo → hi to 10 % I(SN), I(SP)
3.0
µs
123
tp()IDCoff
Output Stage Turn-off Delay:
I(PD)dc = -15 µA...0, I(PD)ac = 0 (see Fig. 4)
CLK lo → hi to 10 % I(SN), I(SP)
3.0
µs
124
Rsc()
On-Resistance of short circuiting Input deselected (see Fig. 5)
switch at PD0, PD1
40
Ω
66
%VDD
Control Inputs DIN, CLK
201
Vt()hi
Threshold Voltage hi
202
Vt()lo
Threshold Voltage lo
33
203
204
Vhys()
Schmitt-Trigger Input Hysteresis
400
Ipd()
Pull-Down Current
V() = 1 V...VDD
Tj = 27 °C
%VDD
mV
3
12
µA
µA
V
6
Output Buffer DOUT
301
Vs()hi
Saturation Voltage hi
Vs()hi = VDD − V(DOUT); I() = -4 mA
0.4
302
303
Vs()lo
Saturation Voltage lo
I() = 4 mA
0.4
V
Isc()hi
Short-Circuit Current hi
V() = 0 V
Tj = 27 °C
-100
-25
mA
mA
304
Isc()lo
Short-Circuit Current lo
V() = VDD
Tj = 27 °C
25
100
mA
mA
60
ns
ns
60
ns
ns
60
ns
ns
60
ns
ns
305
306
tr()
tf()
Rise Time
Fall Time
Switching Characteristics
401 tplh(CLK- Propagation Delay: CLK hi → lo
DOUT)
until DOUT lo → hi
402 tphl(CLK- Propagation Delay: CLK hi → lo
DOUT)
until DOUT hi → lo
-40
40
CL() = 50 pF
Tj = 27 °C
20
CL() = 50 pF
Tj = 27 °C
20
CL(DOUT) = 50 pF (see Fig. 2)
Tj = 27 °C
25
CL(DOUT) = 50 pF (see Fig. 2)
Tj = 27 °C
25
ar y
n
i
im
prel
iC-ME
DUAL LIGHT-GRID PULSE RECEIVER
Rev A1, Page 6/11
OPERATING REQUIREMENTS: Logic
Operating Conditions: VDD = 5 V ±10 %, Ta = 0...70 °C, CL() = 50 pF,
input levels lo = 0...0.45 V, hi = VDD - 0.45 V...VDD, see Fig. 1 for reference levels and waveforms
Item
No.
Symbol
Parameter
Conditions
Unit
Min.
Max.
I001 ten
Activation Time:
DIN lo → hi to CLK lo → hi
standby to amplifier operation (see Fig. 4)
10
µs
I002 tinh
Output Activation Time:
1st CLK lo → hi until output ready to
report
sufficient decay of transient differential output
current: |I(SN) − I(SP) − IO * ISUM| ≤ 20 µA
(see Fig. 4)
5
µs
I003 tset
Setup time:
DIN stable before CLK lo → hi
see Fig. 2
50
ns
I004 thold
Hold time: DIN stable after CLK lo → hi see Fig. 2
50
I005 fo
Permissible Frequency at CLK
ns
10
MHz
CLK
t set
(DIN)
DIN
Q1
t hold
(DIN)
V
Input/Output
VDD−0.45 V
Vt()hi
Q2
Vt()lo
0.45 V
Q3
t phl (CLK−DOUT)
t plh (CLK−DOUT)
t
1
DOUT
0
Figure 1: Reference levels
I(PD)
Figure 2: Timing characteristics
t
1st
t whi
2nd
CLK
t en
I(PD)pk
2
DIN
Q1
I(PD)pk
Q2
tr
t wpk
tf
Q3
I(SP)
−I(SN)
Ipnpk
EN1
INH= Q1
t inh
I(PD)
t p ( ) IDCon
t wlo
t whi
t p ( ) IDCoff
V(SP)
Offset (= IO * ISUM)
may be positive or negative
t
V(SN)
Figure 3: Differential output current
pulse at SP and SN versus
input current pulse at PD
Figure 4: Timing characteristics (analogue section). Outputs SP and
SN with resistors to VDD
iC-ME
DUAL LIGHT-GRID PULSE RECEIVER
ar y
n
i
im
prel
Rev A1, Page 7/11
INPUT SAFETY SWITCH
The FMEA driven schematic design and layout topology of the iC-ME ensures maximum safety and allows
the utilisation of an input safety switch.
or results in a safe state. Likewise external single failures (e.g. shortcircuit of PD0 to PD1) are safe or detectable even during an internal single failure.
Figure 5 shows the schematic of the input safety
switch. Given this particular topology in addition to the
redundant layout (e.g. of ground switches) any single
fault can either be detected by the evaluation circuitry
Due to the redundancy of the layout, a ground breakage or a simultainous failure of the bypass switches is
practically impossible.
Figure 5: Input safety switch
ar y
n
i
im
prel
iC-ME
DUAL LIGHT-GRID PULSE RECEIVER
Rev A1, Page 8/11
APPLICATIONS INFORMATION
Figure 6: Regular input signals
Figure 7: Excessive input signals
For evaluation purposes the response to the rising
edge of the light pulse (i.e. the rising edge of the output signal) is to be used as it is this edge alone, even
in the most extreme overdrive, which yields definite results. Evaluating the falling edge of the output signal
or the level of the negative output signal half-wave (the
recovery process at the end of a light pulse) is generally not advised.
Signal Processing
Figures 6 and 7 show output signal I(SP) − I(SN) in
normal drive and in extreme overdrive (with the photodiode and input amplifier in saturation).
It is clear from these diagrams that iC-ME, even when
in overdrive, is not blind to a follow-on pulse.
CLK
+5V
DOn
DIN
iC−ME
PD0
DIN
PD0
D
CLK
CONTROL
LOGIC
VDD
iC−ME
PD0
PD1
DIN
iC−ME
PD0
PD2 PD3
GND
VDD
SN
CLK
Q
D
CONTROL
LOGIC
DIN0
ICn
IC2
GND
C
GROUP
SN
CLK
Q
INH EN
D
VDD
CONTROL
LOGIC
DO2
IC1
GND
SN
Q
INH EN
INH EN
DOUT
n.c.
DOUT
n.c.
DOUT
n.c.
SP
PD1
SP
PD1
SP
PD1
SN
SP
GND
Figure 8: Schematic of a chain configuration
Light curtain
The circuit in Figure 8 shows iC-ME chained up to form
a light curtain, where consecutive PIN diodes receive
and evaluate clock-driven light pulses.
on. The signal DIN0 = hi activates the bandpass amplifier and the photo diode input PD0 of IC1. Outputs
SP and SN remain tri-state until the rising CLK edge
shifts in the input hi signal at input DIN0.
When discussing the function of iC-ME, it is assumed
that all flip-flops in IC1 to ICn have been reset, for example after the operating voltage has been switched
With no AC photocurrent fractions in the receiver photodiode, approximately equal currents are drawn in SP
and SN. Within a time tinh ≥ 5 µs, the transient differ-
ar y
n
i
im
prel
iC-ME
DUAL LIGHT-GRID PULSE RECEIVER
Rev A1, Page 9/11
ential currents in the output stage, caused by switching
the chip on, have decayed, and iC-ME is ready to receive.
Current is drawn from pin PD0 (IC1) by a light pulse
on the photodiode PD0, and the currents at outputs
SP and SN react as shown in Figure 9: I(SP) rises
and returns to the initial value with a time constant
determined by the lower bandpass amplifier cutoff frequency, as long as the photodiode is constantly illuminated. When the light pulse decays, the current in SP
first sinks and then ramps up to the standby value.
The current in SN has a mirror-imaged time dependance, as the sum I(SP) + I(SN) is constant.
Simultaneously, FF1 sends the stored information to
FF2. FF3 also accepts this information with the trailing
CLK edge and switches the input safety switch from
PD0 to PD1. With the next rising CLK edge the FF4
accepts the hi signal at its input and the differential output stage is activated again. Evaluation of the photo
current of PD1 und forwarding of the control signal to
output DOUT of IC1 works likewise as described above
for PD0.
The hi signal now present at DOUT of IC1 activates
the the bandpass amplifier and the bias of the next
device, IC2. The pulse diagram is also valid for the
subsequent components in the chain, i.e. the ICs arranged as a light curtain form a clock-driven shift register which passes on the input information.
With DIN0 = 0, the next rising CLK edge resets FF1
and turns off the currents in the differential output.
DIN0
CLK
Q1_0(IC1)
Q3_0(IC1)
DO2
Q3_0(IC2)
RECEIVED
LIGHT PULSE
PD0
PD1
I(SP)
I(SN)
Figure 9: Signals for the chain configuration of Fig. 8
PD2
iC-ME
DUAL LIGHT-GRID PULSE RECEIVER
ar y
n
i
im
prel
Rev A1, Page 10/11
Light curtain PCB layout
The PCB layout for light curtain receivers is not critical.
The photodiode anode should be directly connected to
iC-ME’s GND pin so that voltage drop caused by the
chip’s operating current is not coupled into the photocurrent signal.
As the power consumption is relatively small, only lowlevel back-up capacitors are required (typ. 1 µF electrolytic capacitor in parallel to 47 to 100 nF ceramic capacitor). The ceramic capacitors should be placed at
a 7.5 cm distance, electrolytic capacitors at up to twice
this distance. The number of receivers backed up as a
group in this manner is irrelevant as only one device is
activated drawing current at a time.
iC-Haus expressly reserves the right to change its products and/or specifications. An info letter gives details as to any amendments and additions made to the
relevant current specifications on our internet website www.ichaus.de/infoletter; this letter is generated automatically and shall be sent to registered users by
email.
Copying – even as an excerpt – is only permitted with iC-Haus’ approval in writing and precise reference to source.
iC-Haus does not warrant the accuracy, completeness or timeliness of the specification and does not assume liability for any errors or omissions in these
materials.
The data specified is intended solely for the purpose of product description. No representations or warranties, either express or implied, of merchantability, fitness
for a particular purpose or of any other nature are made hereunder with respect to information/specification or the products to which information refers and no
guarantee with respect to compliance to the intended use is given. In particular, this also applies to the stated possible applications or areas of applications of
the product.
iC-Haus conveys no patent, copyright, mask work right or other trade mark right to this product. iC-Haus assumes no liability for any patent and/or other trade
mark rights of a third party resulting from processing or handling of the product and/or any other use of the product.
iC-ME
DUAL LIGHT-GRID PULSE RECEIVER
ar y
n
i
im
prel
Rev A1, Page 11/11
ORDERING INFORMATION
Type
Package
Order Designation
iC-ME
DFN10
iC-ME DFN10
For technical support, information about prices and terms of delivery please contact:
iC-Haus GmbH
Am Kuemmerling 18
D-55294 Bodenheim
GERMANY
Tel.: +49 (0) 61 35 - 92 92 - 0
Fax: +49 (0) 61 35 - 92 92 - 192
Web: http://www.ichaus.com
E-Mail: sales@ichaus.com
Appointed local distributors: http://www.ichaus.com/sales_partners